On 09.04.13 at 10:32, Richard Earnshaw <rearnsha@arm.com> wrote:
On 09/04/13 08:03, Jan Beulich wrote:
The only thing that's useful to think about is what is permitted by the
architecture. The architecture only permits INT_NEON + FP_NEON + FP, FP
(in various guises) and INT_NEON. It doesn't make sense to me to allow
other random permutations. Ergo
.arch_extension "neon"
.arch_extension "nofp"
should give INT_NEON in the terminology above.
Mind pointing me to where this is stated? As said, the FPSID and
MVFRx register descriptions in the v7-A and v7-R edition of the
ARM Architecture Reference Manual don't say anything to that
effect according to my reading.
Jan