What I believe Sean is specifically asking about is in relation to
Freescale embedded microcontrollers that have two distinct CPUs within
them.
The main processor is a CISC device (S12X)
The second processor is a RISC device (XGATE)
So, within one microcontroller there are two processors that use
different machine code. However, they share common RAM and peripherals
and the XGATE code starts off in the same flash space as the S12X code.
My belief is that this works, given a caveat
- you have to know which target the code was assembled for when
disassembling it and where in memory it is located.
gas and objdump use the CPU specific target
ld uses the m68hc12elf (shared) target