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2011-10-11 Joern Rennecke <joern.rennecke@embecosm.com>
toplevel:
* config.sub: Sync from upstream.
bfd:
* Makefile.am (ALL_MACHINES): Add cpu-epiphany.lo .
(ALL_MACHINES_CFILES): Add cpu-epiphany.c .
(BFD32_BACKENDS): Add elf32-epiphany.lo .
(BFD32_BACKENDS_CFILES): Add elf32-epiphany.c .
* Makefile.in, bfd-in2.h, configure, libbfd.h: Regenerate.
* archures.c (bfd_arch_epiphany): Add.
(bfd_mach_epiphany16, bfd_mach_epiphany32): Define.
(bfd_epiphany_arch): Declare.
(bfd_archures_list): Add &bfd_epiphany_arch.
* config.bfd (epiphany-*-elf): New target case.
* configure.in (bfd_elf32_epiphany_vec): New target vector case.
* reloc.c (BFD_RELOC_EPIPHANY_SIMM8): New relocation.
(BFD_RELOC_EPIPHANY_SIMM24, BFD_RELOC_EPIPHANY_HIGH): Likewise.
(BFD_RELOC_EPIPHANY_LOW, BFD_RELOC_EPIPHANY_SIMM11): Likewise.
(BFD_RELOC_EPIPHANY_IMM11, BFD_RELOC_EPIPHANY_IMM8): Likewise.
* targets.c (bfd_elf32_epiphany_vec): Declare.
(_bfd_target_vector): Add bfd_elf32_epiphany_vec.
* po/SRC-POTFILES.in, po/bfd.pot: Regenerate.
* cpu-epiphany.c, elf32-epiphany.c: New files.
binutils:
* readelf.c (include "elf/epiphany.h")
(guess_is_rela, dump_relocation): Handle EM_ADAPTEVA_EPIPHANY.
(get_machine_name, is_32bit_abs_reloc, is_32bit_pcrel_reloc): Likewise.
(is_16bit_abs_reloc, is_none_reloc): Likewise.
* po/binutils.pot: Regenerate.
gas:
* Makefile.am (TARGET_CPU_CFILES): Add config/tc-epiphany.c .
(TARGET_CPU_HFILES): Add config/tc-epiphany.h .
* Makefile.in, configure, doc/Makefile.in, po/POTFILES.in: Regenerate.
* configure.in: Also set using_cgen for epiphany.
* configure.tgt: Handle epiphany.
* doc/Makefile.am (CPU_DOCS): Add c-epiphany.texi .
* doc/all.texi: Set EPIPHANY.
* doc/as.texinfo: Add EPIPHANY-specific text.
* po/gas.pot: Regenerate.
gas/testsuite:
* gas/epiphany: New directory.
include:
* dis-asm.h (print_insn_epiphany): Declare.
* elf/common.h (EM_ADAPTEVA_EPIPHANY): Define.
ld: * Makefile.am (ALL_EMULATION_SOURCES): Add eelf32epiphany.c .
(eelf32epiphany.c): New rule.
* Makefile.in: Regenerate.
* configure.tgt: Handle epiphany-*-elf.
* po/ld.pot: Regenerate.
* testsuite/ld-srec/srec.exp: xfail epiphany.
* emulparams/elf32epiphany.sh: New file.
libiberty:
* functions.texi: Regenerate.
opcodes:
* Makefile.am (HFILES): Add epiphany-desc.h and epiphany-opc.h .
(TARGET_LIBOPCODES_CFILES): Add epiphany-asm.c, epiphany-desc.c,
epiphany-dis.c, epiphany-ibld.c and epiphany-opc.c .
(CLEANFILES): Add stamp-epiphany.
(EPIPHANY_DEPS): Set. Make CGEN-generated Epiphany files depend on it.
(stamp-epiphany): New rule.
* Makefile.in, configure, po/POTFILES.in, po/opcodes.pot: Regenerate.
* configure.in: Handle bfd_epiphany_arch.
* disassemble.c (ARCH_epiphany): Define.
(disassembler): Handle bfd_arch_epiphany.
* epiphany-asm.c, epiphany-desc.c, epiphany-desc.h: New files.
* epiphany-dis.c, epiphany-ibld.c, epiphany-opc.c: Likewise.
* epiphany-opc.h: Likewise.
Index: config.sub
===================================================================
RCS file: /cvs/src/src/config.sub,v
retrieving revision 1.84
diff -p -u -r1.84 config.sub
--- config.sub 6 Jun 2011 10:36:06 -0000 1.84
+++ config.sub 11 Oct 2011 21:44:35 -0000
@@ -4,7 +4,7 @@
# 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010,
# 2011 Free Software Foundation, Inc.
-timestamp='2011-06-03'
+timestamp='2011-10-08'
# This file is (in principle) common to ALL GNU software.
# The presence of a machine in this file suggests that SOME GNU software
@@ -251,13 +251,17 @@ case $basic_machine in
| alpha64 | alpha64ev[4-8] | alpha64ev56 | alpha64ev6[78] | alpha64pca5[67] \
| am33_2.0 \
| arc | arm | arm[bl]e | arme[lb] | armv[2345] | armv[345][lb] | avr | avr32 \
+ | be32 | be64 \
| bfin \
| c4x | clipper \
| d10v | d30v | dlx | dsp16xx \
+ | epiphany \
| fido | fr30 | frv \
| h8300 | h8500 | hppa | hppa1.[01] | hppa2.0 | hppa2.0[nw] | hppa64 \
+ | hexagon \
| i370 | i860 | i960 | ia64 \
| ip2k | iq2000 \
+ | le32 | le64 \
| lm32 \
| m32c | m32r | m32rle | m68000 | m68k | m88k \
| maxq | mb | microblaze | mcore | mep | metag \
@@ -357,6 +361,7 @@ case $basic_machine in
| alphapca5[67]-* | alpha64pca5[67]-* | arc-* \
| arm-* | armbe-* | armle-* | armeb-* | armv*-* \
| avr-* | avr32-* \
+ | be32-* | be64-* \
| bfin-* | bs2000-* \
| c[123]* | c30-* | [cjt]90-* | c4x-* \
| clipper-* | craynv-* | cydra-* \
@@ -365,8 +370,10 @@ case $basic_machine in
| f30[01]-* | f700-* | fido-* | fr30-* | frv-* | fx80-* \
| h8300-* | h8500-* \
| hppa-* | hppa1.[01]-* | hppa2.0-* | hppa2.0[nw]-* | hppa64-* \
+ | hexagon-* \
| i*86-* | i860-* | i960-* | ia64-* \
| ip2k-* | iq2000-* \
+ | le32-* | le64-* \
| lm32-* \
| m32c-* | m32r-* | m32rle-* \
| m68000-* | m680[012346]0-* | m68360-* | m683?2-* | m68k-* \
@@ -813,6 +820,10 @@ case $basic_machine in
basic_machine=i370-ibm
os=-mvs
;;
+ nacl)
+ basic_machine=le32-unknown
+ os=-nacl
+ ;;
ncr3000)
basic_machine=i486-ncr
os=-sysv4
Index: bfd/Makefile.am
===================================================================
RCS file: /cvs/src/src/bfd/Makefile.am,v
retrieving revision 1.258
diff -p -u -r1.258 Makefile.am
--- bfd/Makefile.am 22 Jul 2011 20:22:29 -0000 1.258
+++ bfd/Makefile.am 11 Oct 2011 21:44:36 -0000
@@ -83,6 +83,7 @@ ALL_MACHINES = \
cpu-d10v.lo \
cpu-d30v.lo \
cpu-dlx.lo \
+ cpu-epiphany.lo \
cpu-fr30.lo \
cpu-frv.lo \
cpu-h8300.lo \
@@ -158,6 +159,7 @@ ALL_MACHINES_CFILES = \
cpu-d10v.c \
cpu-d30v.c \
cpu-dlx.c \
+ cpu-epiphany.c \
cpu-fr30.c \
cpu-frv.c \
cpu-h8300.c \
@@ -286,6 +288,7 @@ BFD32_BACKENDS = \
elf32-d10v.lo \
elf32-d30v.lo \
elf32-dlx.lo \
+ elf32-epiphany.lo \
elf32-fr30.lo \
elf32-frv.lo \
elf32-gen.lo \
@@ -470,6 +473,7 @@ BFD32_BACKENDS_CFILES = \
elf32-d10v.c \
elf32-d30v.c \
elf32-dlx.c \
+ elf32-epiphany.c \
elf32-fr30.c \
elf32-frv.c \
elf32-gen.c \
Index: bfd/archures.c
===================================================================
RCS file: /cvs/src/src/bfd/archures.c,v
retrieving revision 1.158
diff -p -u -r1.158 archures.c
--- bfd/archures.c 1 Aug 2011 23:04:19 -0000 1.158
+++ bfd/archures.c 11 Oct 2011 21:44:36 -0000
@@ -365,6 +365,9 @@ DESCRIPTION
. bfd_arch_iq2000, {* Vitesse IQ2000. *}
.#define bfd_mach_iq2000 1
.#define bfd_mach_iq10 2
+. bfd_arch_epiphany, {* Adapteva EPIPHANY *}
+.#define bfd_mach_epiphany16 1
+.#define bfd_mach_epiphany32 2
. bfd_arch_mt,
.#define bfd_mach_ms1 1
.#define bfd_mach_mrisc2 2
@@ -496,6 +499,7 @@ extern const bfd_arch_info_type bfd_crx_
extern const bfd_arch_info_type bfd_d10v_arch;
extern const bfd_arch_info_type bfd_d30v_arch;
extern const bfd_arch_info_type bfd_dlx_arch;
+extern const bfd_arch_info_type bfd_epiphany_arch;
extern const bfd_arch_info_type bfd_fr30_arch;
extern const bfd_arch_info_type bfd_frv_arch;
extern const bfd_arch_info_type bfd_h8300_arch;
@@ -576,6 +580,7 @@ static const bfd_arch_info_type * const
&bfd_d10v_arch,
&bfd_d30v_arch,
&bfd_dlx_arch,
+ &bfd_epiphany_arch,
&bfd_fr30_arch,
&bfd_frv_arch,
&bfd_h8300_arch,
Index: bfd/config.bfd
===================================================================
RCS file: /cvs/src/src/bfd/config.bfd,v
retrieving revision 1.284
diff -p -u -r1.284 config.bfd
--- bfd/config.bfd 28 Jul 2011 22:35:13 -0000 1.284
+++ bfd/config.bfd 11 Oct 2011 21:44:37 -0000
@@ -361,6 +361,10 @@ case "${targ}" in
targ_defvec=bfd_elf32_d30v_vec
;;
+ epiphany-*-elf)
+ targ_defvec=bfd_elf32_epiphany_vec
+ ;;
+
fido-*-elf* )
targ_defvec=bfd_elf32_m68k_vec
targ_selvecs="m68kcoff_vec ieee_vec"
Index: bfd/configure.in
===================================================================
RCS file: /cvs/src/src/bfd/configure.in,v
retrieving revision 1.302
diff -p -u -r1.302 configure.in
--- bfd/configure.in 22 Sep 2011 08:35:49 -0000 1.302
+++ bfd/configure.in 11 Oct 2011 21:44:39 -0000
@@ -698,6 +698,7 @@ do
bfd_elf32_d10v_vec) tb="$tb elf32-d10v.lo elf32.lo $elf" ;;
bfd_elf32_d30v_vec) tb="$tb elf32-d30v.lo elf32.lo $elf" ;;
bfd_elf32_dlx_big_vec) tb="$tb elf32-dlx.lo elf32.lo $elf" ;;
+ bfd_elf32_epiphany_vec) tb="$tb elf32-epiphany.lo elf32.lo $elf" ;;
bfd_elf32_fr30_vec) tb="$tb elf32-fr30.lo elf32.lo $elf" ;;
bfd_elf32_frv_vec) tb="$tb elf32-frv.lo elf32.lo $elf" ;;
bfd_elf32_frvfdpic_vec) tb="$tb elf32-frv.lo elf32.lo $elf" ;;
Index: bfd/reloc.c
===================================================================
RCS file: /cvs/src/src/bfd/reloc.c,v
retrieving revision 1.216
diff -p -u -r1.216 reloc.c
--- bfd/reloc.c 24 Jul 2011 14:20:06 -0000 1.216
+++ bfd/reloc.c 11 Oct 2011 21:44:39 -0000
@@ -5960,6 +5960,35 @@ ENUMX
ENUMDOC
Tilera TILE-Gx Relocations.
+ENUM
+ BFD_RELOC_EPIPHANY_SIMM8
+ENUMDOC
+ Adapteva EPIPHANY - 8 bit signed pc-relative displacement
+ENUM
+ BFD_RELOC_EPIPHANY_SIMM24
+ENUMDOC
+ Adapteva EPIPHANY - 24 bit signed pc-relative displacement
+ENUM
+ BFD_RELOC_EPIPHANY_HIGH
+ENUMDOC
+ Adapteva EPIPHANY - 16 most-significant bits of absolute address
+ENUM
+ BFD_RELOC_EPIPHANY_LOW
+ENUMDOC
+ Adapteva EPIPHANY - 16 least-significant bits of absolute address
+ENUM
+ BFD_RELOC_EPIPHANY_SIMM11
+ENUMDOC
+ Adapteva EPIPHANY - 11 bit signed number - add/sub immediate
+ENUM
+ BFD_RELOC_EPIPHANY_IMM11
+ENUMDOC
+ Adapteva EPIPHANY - 11 bit sign-magnitude number (ld/st displacement)
+ENUM
+ BFD_RELOC_EPIPHANY_IMM8
+ENUMDOC
+ Adapteva EPIPHANY - 8 bit immediate for 16 bit mov instruction.
+
ENDSENUM
BFD_RELOC_UNUSED
Index: bfd/targets.c
===================================================================
RCS file: /cvs/src/src/bfd/targets.c,v
retrieving revision 1.208
diff -p -u -r1.208 targets.c
--- bfd/targets.c 17 Aug 2011 00:39:38 -0000 1.208
+++ bfd/targets.c 11 Oct 2011 21:44:39 -0000
@@ -607,6 +607,7 @@ extern const bfd_target bfd_elf32_crx_ve
extern const bfd_target bfd_elf32_d10v_vec;
extern const bfd_target bfd_elf32_d30v_vec;
extern const bfd_target bfd_elf32_dlx_big_vec;
+extern const bfd_target bfd_elf32_epiphany_vec;
extern const bfd_target bfd_elf32_fr30_vec;
extern const bfd_target bfd_elf32_frv_vec;
extern const bfd_target bfd_elf32_frvfdpic_vec;
@@ -968,6 +969,7 @@ static const bfd_target * const _bfd_tar
&bfd_elf32_d10v_vec,
&bfd_elf32_d30v_vec,
&bfd_elf32_dlx_big_vec,
+ &bfd_elf32_epiphany_vec,
&bfd_elf32_fr30_vec,
&bfd_elf32_frv_vec,
&bfd_elf32_frvfdpic_vec,
Index: binutils/readelf.c
===================================================================
RCS file: /cvs/src/src/binutils/readelf.c,v
retrieving revision 1.556
diff -p -u -r1.556 readelf.c
--- binutils/readelf.c 5 Oct 2011 14:13:30 -0000 1.556
+++ binutils/readelf.c 11 Oct 2011 21:44:42 -0000
@@ -103,6 +103,7 @@
#include "elf/d10v.h"
#include "elf/d30v.h"
#include "elf/dlx.h"
+#include "elf/epiphany.h"
#include "elf/fr30.h"
#include "elf/frv.h"
#include "elf/h8.h"
@@ -552,6 +553,7 @@ guess_is_rela (unsigned int e_machine)
/* Targets that use RELA relocations. */
case EM_68K:
case EM_860:
+ case EM_ADAPTEVA_EPIPHANY:
case EM_ALPHA:
case EM_ALTERA_NIOS2:
case EM_AVR:
@@ -1168,6 +1170,10 @@ dump_relocations (FILE * file,
rtype = elf_vax_reloc_type (type);
break;
+ case EM_ADAPTEVA_EPIPHANY:
+ rtype = elf_epiphany_reloc_type (type);
+ break;
+
case EM_IP2K:
case EM_IP2K_OLD:
rtype = elf_ip2k_reloc_type (type);
@@ -1911,6 +1917,7 @@ get_machine_name (unsigned e_machine)
case EM_OR32: return "OpenRISC";
case EM_ARC_A5: return "ARC International ARCompact processor";
case EM_CRX: return "National Semiconductor CRX microprocessor";
+ case EM_ADAPTEVA_EPIPHANY: return "Adapteva EPIPHANY";
case EM_DLX: return "OpenDLX";
case EM_IP2K_OLD:
case EM_IP2K: return "Ubicom IP2xxx 8-bit microcontrollers";
@@ -9674,6 +9681,8 @@ is_32bit_abs_reloc (unsigned int reloc_t
case EM_AVR_OLD:
case EM_AVR:
return reloc_type == 1;
+ case EM_ADAPTEVA_EPIPHANY:
+ return reloc_type == 3;
case EM_BLACKFIN:
return reloc_type == 0x12; /* R_byte4_data. */
case EM_CRIS:
@@ -9814,6 +9823,8 @@ is_32bit_pcrel_reloc (unsigned int reloc
return reloc_type == 2; /* R_386_PC32. */
case EM_68K:
return reloc_type == 4; /* R_68K_PC32. */
+ case EM_ADAPTEVA_EPIPHANY:
+ return reloc_type == 6;
case EM_ALPHA:
return reloc_type == 10; /* R_ALPHA_SREL32. */
case EM_ARM:
@@ -9955,6 +9966,8 @@ is_16bit_abs_reloc (unsigned int reloc_t
case EM_AVR_OLD:
case EM_AVR:
return reloc_type == 4; /* R_AVR_16. */
+ case EM_ADAPTEVA_EPIPHANY:
+ return reloc_type == 5;
case EM_CYGNUS_D10V:
case EM_D10V:
return reloc_type == 3; /* R_D10V_16. */
@@ -10000,6 +10013,7 @@ is_none_reloc (unsigned int reloc_type)
case EM_MIPS: /* R_MIPS_NONE. */
case EM_PARISC: /* R_PARISC_NONE. */
case EM_ALPHA: /* R_ALPHA_NONE. */
+ case EM_ADAPTEVA_EPIPHANY:
case EM_PPC: /* R_PPC_NONE. */
case EM_PPC64: /* R_PPC64_NONE. */
case EM_ARM: /* R_ARM_NONE. */
Index: gas/Makefile.am
===================================================================
RCS file: /cvs/src/src/gas/Makefile.am,v
retrieving revision 1.194
diff -p -u -r1.194 Makefile.am
--- gas/Makefile.am 13 Jun 2011 15:18:47 -0000 1.194
+++ gas/Makefile.am 11 Oct 2011 21:44:43 -0000
@@ -118,6 +118,7 @@ TARGET_CPU_CFILES = \
config/tc-d10v.c \
config/tc-d30v.c \
config/tc-dlx.c \
+ config/tc-epiphany.c \
config/tc-fr30.c \
config/tc-frv.c \
config/tc-h8300.c \
@@ -184,6 +185,7 @@ TARGET_CPU_HFILES = \
config/tc-d10v.h \
config/tc-d30v.h \
config/tc-dlx.h \
+ config/tc-epiphany.h \
config/tc-fr30.h \
config/tc-frv.h \
config/tc-h8300.h \
Index: gas/configure.in
===================================================================
RCS file: /cvs/src/src/gas/configure.in,v
retrieving revision 1.223
diff -p -u -r1.223 configure.in
--- gas/configure.in 18 May 2011 09:41:14 -0000 1.223
+++ gas/configure.in 11 Oct 2011 21:44:45 -0000
@@ -305,7 +305,7 @@ changequote([,])dnl
fi
;;
- fr30 | ip2k | iq2000 | lm32 | m32r | openrisc)
+ epiphany | fr30 | ip2k | iq2000 | lm32 | m32r | openrisc)
using_cgen=yes
;;
Index: gas/configure.tgt
===================================================================
RCS file: /cvs/src/src/gas/configure.tgt,v
retrieving revision 1.70
diff -p -u -r1.70 configure.tgt
--- gas/configure.tgt 20 Jun 2011 13:23:21 -0000 1.70
+++ gas/configure.tgt 11 Oct 2011 21:44:45 -0000
@@ -38,6 +38,7 @@ case ${cpu} in
cr16*) cpu_type=cr16 endian=little ;;
crisv32) cpu_type=cris arch=crisv32 ;;
crx*) cpu_type=crx endian=little ;;
+ epiphany*) cpu_type=epiphany endian=little ;;
fido) cpu_type=m68k ;;
hppa*) cpu_type=hppa ;;
i[3-7]86) cpu_type=i386 arch=i386;;
@@ -141,6 +142,8 @@ case ${generic_target} in
d30v-*-*) fmt=elf ;;
dlx-*-*) fmt=elf ;;
+ epiphany-*-*) fmt=elf ;;
+
fr30-*-*) fmt=elf ;;
frv-*-*linux*) fmt=elf em=linux;;
frv-*-*) fmt=elf ;;
Index: gas/doc/Makefile.am
===================================================================
RCS file: /cvs/src/src/gas/doc/Makefile.am,v
retrieving revision 1.62
diff -p -u -r1.62 Makefile.am
--- gas/doc/Makefile.am 20 Jun 2011 10:27:56 -0000 1.62
+++ gas/doc/Makefile.am 11 Oct 2011 21:44:45 -0000
@@ -35,8 +35,9 @@ CPU_DOCS = \
c-avr.texi \
c-bfin.texi \
c-cr16.texi \
- c-d10v.texi \
c-cris.texi \
+ c-d10v.texi \
+ c-epiphany.texi \
c-h8300.texi \
c-hppa.texi \
c-i370.texi \
Index: gas/doc/all.texi
===================================================================
RCS file: /cvs/src/src/gas/doc/all.texi,v
retrieving revision 1.39
diff -p -u -r1.39 all.texi
--- gas/doc/all.texi 20 Jun 2011 10:27:56 -0000 1.39
+++ gas/doc/all.texi 11 Oct 2011 21:44:45 -0000
@@ -35,6 +35,7 @@
@set CRIS
@set D10V
@set D30V
+@set EPIPHANY
@set H8/300
@set HPPA
@set I370
Index: gas/doc/as.texinfo
===================================================================
RCS file: /cvs/src/src/gas/doc/as.texinfo,v
retrieving revision 1.241
diff -p -u -r1.241 as.texinfo
--- gas/doc/as.texinfo 19 Aug 2011 14:48:40 -0000 1.241
+++ gas/doc/as.texinfo 11 Oct 2011 21:44:46 -0000
@@ -307,6 +307,11 @@ gcc(1), ld(1), and the Info entries for
@emph{Target D30V options:}
[@b{-O}|@b{-n}|@b{-N}]
@end ifset
+@ifset EPIPHANY
+
+@emph{Target EPIPHANY options:}
+ [@b{-mepiphany}|@b{-mepiphany16}]
+@end ifset
@ifset H8
@emph{Target H8/300 options:}
@@ -843,6 +848,22 @@ Warn when a nop after a 32-bit multiply
@end ifset
@c man end
+@ifset EPIPHANY
+The following options are available when @value{AS} is configured for the
+Adapteva EPIPHANY series.
+
+@table @gcctabopt
+
+@item -mepiphany
+Specifies that the both 32 and 16 bit instructions are allowed. This is the
+default behavior.
+
+@item -mepiphany16
+Restricts the permitted instructions to just the 16 bit set.
+
+@end table
+@end ifset
+
@ifset I80386
@ifclear man
@@ -6849,6 +6870,9 @@ subject, see the hardware manufacturer's
@ifset D30V
* D30V-Dependent:: D30V Dependent Features
@end ifset
+@ifset EPIPHANY
+* Epiphany-Dependent:: EPIPHANY Dependent Features
+@end ifset
@ifset H8/300
* H8/300-Dependent:: Renesas H8/300 Dependent Features
@end ifset
@@ -7025,6 +7049,10 @@ family.
@include c-d30v.texi
@end ifset
+@ifset EPIPHANY
+@include c-epiphany.texi
+@end ifset
+
@ifset H8/300
@include c-h8300.texi
@end ifset
Index: include/dis-asm.h
===================================================================
RCS file: /cvs/src/src/include/dis-asm.h,v
retrieving revision 1.81
diff -p -u -r1.81 dis-asm.h
--- include/dis-asm.h 13 Jun 2011 15:18:53 -0000 1.81
+++ include/dis-asm.h 11 Oct 2011 21:44:50 -0000
@@ -233,6 +233,7 @@ extern int print_insn_crx
extern int print_insn_d10v (bfd_vma, disassemble_info *);
extern int print_insn_d30v (bfd_vma, disassemble_info *);
extern int print_insn_dlx (bfd_vma, disassemble_info *);
+extern int print_insn_epiphany (bfd_vma, disassemble_info *);
extern int print_insn_fr30 (bfd_vma, disassemble_info *);
extern int print_insn_frv (bfd_vma, disassemble_info *);
extern int print_insn_h8300 (bfd_vma, disassemble_info *);
Index: include/elf/common.h
===================================================================
RCS file: /cvs/src/src/include/elf/common.h,v
retrieving revision 1.132
diff -p -u -r1.132 common.h
--- include/elf/common.h 22 Jul 2011 20:22:36 -0000 1.132
+++ include/elf/common.h 11 Oct 2011 21:44:50 -0000
@@ -401,6 +401,8 @@
#define EM_MICROBLAZE_OLD 0xbaab /* Old MicroBlaze */
+#define EM_ADAPTEVA_EPIPHANY 0x1223 /* Adapteva's Epiphany architecture. */
+
/* See the above comment before you add a new EM_* value here. */
/* Values for e_version. */
Index: ld/Makefile.am
===================================================================
RCS file: /cvs/src/src/ld/Makefile.am,v
retrieving revision 1.305
diff -p -u -r1.305 Makefile.am
--- ld/Makefile.am 22 Jul 2011 20:22:37 -0000 1.305
+++ ld/Makefile.am 11 Oct 2011 21:44:51 -0000
@@ -211,6 +211,7 @@ ALL_EMULATION_SOURCES = \
eelf32ebmipvxworks.c \
eelf32elmip.c \
eelf32elmipvxworks.c \
+ eelf32epiphany.c \
eelf32fr30.c \
eelf32frv.c \
eelf32frvfd.c \
@@ -990,6 +991,9 @@ eelf32elmipvxworks.c: $(srcdir)/emulpara
$(ELF_DEPS) $(srcdir)/emultempl/generic.em $(srcdir)/emultempl/mipself.em \
$(srcdir)/emultempl/vxworks.em $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32elmipvxworks "$(tdir_elf32elmipvxworks)"
+eelf32epiphany.c: $(srcdir)/emulparams/elf32epiphany.sh \
+ $(ELF_DEPS) ${GEN_DEPENDS}
+ ${GENSCRIPTS} elf32epiphany "$(tdir_epiphany)"
eelf32fr30.c: $(srcdir)/emulparams/elf32fr30.sh \
$(ELF_GEN_DEPS) $(srcdir)/scripttempl/elf.sc ${GEN_DEPENDS}
${GENSCRIPTS} elf32fr30 "$(tdir_fr30)"
Index: ld/configure.tgt
===================================================================
RCS file: /cvs/src/src/ld/configure.tgt,v
retrieving revision 1.252
diff -p -u -r1.252 configure.tgt
--- ld/configure.tgt 22 Jul 2011 20:22:37 -0000 1.252
+++ ld/configure.tgt 11 Oct 2011 21:44:53 -0000
@@ -137,6 +137,8 @@ d30v-*-*) targ_emul=d30velf; targ_extra
;;
dlx-*-elf*) targ_emul=elf32_dlx
;;
+epiphany-*-elf) targ_emul=elf32epiphany
+ ;;
fido*-*-elf*) targ_emul=m68kelf ;;
fr30-*-*) targ_emul=elf32fr30
;;
Index: ld/testsuite/ld-srec/srec.exp
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-srec/srec.exp,v
retrieving revision 1.36
diff -p -u -r1.36 srec.exp
--- ld/testsuite/ld-srec/srec.exp 13 Jun 2011 15:18:50 -0000 1.36
+++ ld/testsuite/ld-srec/srec.exp 11 Oct 2011 21:44:54 -0000
@@ -270,6 +270,12 @@ proc run_srec_test { test objs } {
set flags "$flags --no-toc-optimize"
}
+ # Epiphany needs some help too
+ if [istarget epiphany*-*-*] {
+ set flags "$flags --defsym _start=00000060"
+ setup_xfail "epiphany*-*-*"
+ }
+
if { ![ld_simple_link $ld tmpdir/sr1 "$flags $objs"] \
|| ![ld_simple_link $ld tmpdir/sr2.sr "$flags --oformat srec $objs"] } {
fail $test
Index: opcodes/Makefile.am
===================================================================
RCS file: /cvs/src/src/opcodes/Makefile.am,v
retrieving revision 1.164
diff -p -u -r1.164 Makefile.am
--- opcodes/Makefile.am 22 Aug 2011 15:25:06 -0000 1.164
+++ opcodes/Makefile.am 11 Oct 2011 21:44:55 -0000
@@ -41,6 +41,7 @@ BUILD_LIB_DEPS = @BUILD_LIB_DEPS@
# Header files.
HFILES = \
+ epiphany-desc.h epiphany-opc.h \
fr30-desc.h fr30-opc.h \
frv-desc.h frv-opc.h \
h8500-opc.h \
@@ -95,6 +96,11 @@ TARGET_LIBOPCODES_CFILES = \
d30v-dis.c \
d30v-opc.c \
dlx-dis.c \
+ epiphany-asm.c \
+ epiphany-desc.c \
+ epiphany-dis.c \
+ epiphany-ibld.c \
+ epiphany-opc.c \
fr30-asm.c \
fr30-desc.c \
fr30-dis.c \
@@ -311,7 +317,7 @@ po/POTFILES.in: @MAINT@ Makefile
&& mv tmp $(srcdir)/po/POTFILES.in
CLEANFILES = \
- stamp-fr30 stamp-frv stamp-ip2k stamp-iq2000 stamp-lm32 \
+ stamp-epiphany stamp-fr30 stamp-frv stamp-ip2k stamp-iq2000 stamp-lm32 \
stamp-m32c stamp-m32r stamp-mep stamp-mt \
stamp-openrisc stamp-xc16x stamp-xstormy16 \
libopcodes.a stamp-lib
@@ -329,9 +335,10 @@ CGENDEPS = \
$(CGENDIR)/opc-opinst.scm \
cgen-asm.in cgen-dis.in cgen-ibld.in
-CGEN_CPUS = fr30 frv ip2k iq2000 lm32 m32c m32r mep mt openrisc xc16x xstormy16
+CGEN_CPUS = epiphany fr30 frv ip2k iq2000 lm32 m32c m32r mep mt openrisc xc16x xstormy16
if CGEN_MAINT
+EPIPHANY_DEPS = stamp-epiphany
FR30_DEPS = stamp-fr30
FRV_DEPS = stamp-frv
IP2K_DEPS = stamp-ip2k
@@ -345,6 +352,7 @@ OPENRISC_DEPS = stamp-openrisc
XC16X_DEPS = stamp-xc16x
XSTORMY16_DEPS = stamp-xstormy16
else
+EPIPHANY_DEPS =
FR30_DEPS =
FRV_DEPS =
IP2K_DEPS =
@@ -376,6 +384,16 @@ run-cgen-all:
# For now, require developers to configure with --enable-cgen-maint.
+$(srcdir)/epiphany-desc.h $(srcdir)/epiphany-desc.c $(srcdir)/epiphany-opc.h \
+ $(srcdir)/epiphany-opc.c $(srcdir)/epiphany-ibld.c \
+ $(srcdir)/epiphany-opinst.c $(srcdir)/epiphany-asm.c \
+ $(srcdir)/epiphany-dis.c: $(EPIPHANY_DEPS)
+ @true
+
+stamp-epiphany: $(CGENDEPS) $(CPUDIR)/epiphany.cpu $(CPUDIR)/epiphany.opc
+ $(MAKE) run-cgen arch=epiphany prefix=epiphany options= \
+ archfile=$(CPUDIR)/epiphany.cpu opcfile=$(CPUDIR)/epiphany.opc extrafiles=
+
$(srcdir)/fr30-desc.h $(srcdir)/fr30-desc.c $(srcdir)/fr30-opc.h $(srcdir)/fr30-opc.c $(srcdir)/fr30-ibld.c $(srcdir)/fr30-asm.c $(srcdir)/fr30-dis.c: $(FR30_DEPS)
@true
stamp-fr30: $(CGENDEPS) $(CPUDIR)/fr30.cpu $(CPUDIR)/fr30.opc
Index: opcodes/configure.in
===================================================================
RCS file: /cvs/src/src/opcodes/configure.in,v
retrieving revision 1.99
diff -p -u -r1.99 configure.in
--- opcodes/configure.in 24 Jul 2011 14:20:13 -0000 1.99
+++ opcodes/configure.in 11 Oct 2011 21:44:57 -0000
@@ -243,6 +243,7 @@ if test x${all_targets} = xfalse ; then
bfd_i960_arch) ta="$ta i960-dis.lo" ;;
bfd_ia64_arch) ta="$ta ia64-dis.lo ia64-opc.lo" ;;
bfd_ip2k_arch) ta="$ta ip2k-asm.lo ip2k-desc.lo ip2k-dis.lo ip2k-ibld.lo ip2k-opc.lo" using_cgen=yes ;;
+ bfd_epiphany_arch) ta="$ta epiphany-asm.lo epiphany-desc.lo epiphany-dis.lo epiphany-ibld.lo epiphany-opc.lo" using_cgen=yes ;;
bfd_iq2000_arch) ta="$ta iq2000-asm.lo iq2000-desc.lo iq2000-dis.lo iq2000-ibld.lo iq2000-opc.lo" using_cgen=yes ;;
bfd_lm32_arch) ta="$ta lm32-asm.lo lm32-desc.lo lm32-dis.lo lm32-ibld.lo lm32-opc.lo lm32-opinst.lo" using_cgen=yes ;;
bfd_m32c_arch) ta="$ta m32c-asm.lo m32c-desc.lo m32c-dis.lo m32c-ibld.lo m32c-opc.lo" using_cgen=yes ;;
Index: opcodes/disassemble.c
===================================================================
RCS file: /cvs/src/src/opcodes/disassemble.c,v
retrieving revision 1.80
diff -p -u -r1.80 disassemble.c
--- opcodes/disassemble.c 22 Jul 2011 20:22:38 -0000 1.80
+++ opcodes/disassemble.c 11 Oct 2011 21:44:57 -0000
@@ -26,6 +26,7 @@
#define ARCH_alpha
#define ARCH_arc
#define ARCH_arm
+#define ARCH_epiphany
#define ARCH_avr
#define ARCH_bfin
#define ARCH_cr16
@@ -224,6 +225,11 @@ disassembler (abfd)
disassemble = print_insn_ip2k;
break;
#endif
+#ifdef ARCH_epiphany
+ case bfd_arch_epiphany:
+ disassemble = print_insn_epiphany;
+ break;
+#endif
#ifdef ARCH_fr30
case bfd_arch_fr30:
disassemble = print_insn_fr30;
Attachment:
epiphany-binutils.tar.bz2
Description: application/bzip
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