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PATCH: Fix xorx in BMI2
- From: "H.J. Lu" <hongjiu dot lu at intel dot com>
- To: binutils at sourceware dot org
- Date: Thu, 30 Jun 2011 08:48:04 -0700
- Subject: PATCH: Fix xorx in BMI2
- Reply-to: "H.J. Lu" <hjl dot tools at gmail dot com>
Hi,
I checked in this patch to fix xorx in BMI2.
H.J.
--
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index c5408b8..0b24323 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,14 @@
+2011-06-30 H.J. Lu <hongjiu.lu@intel.com>
+
+ AVX Programming Reference (June, 2011)
+ * gas/i386/bmi2.s: Correct rorx tests.
+ * gas/i386/x86-64-bmi2.s: Likewise.
+
+ * gas/i386/bmi2-intel.d: Updated.
+ * gas/i386/bmi2.d: Likewise.
+ * gas/i386/x86-64-bmi2-intel.d: Likewise.
+ * gas/i386/x86-64-bmi2.d: Likewise.
+
2011-06-30 Paul Carroll <pcarroll@codesourcery.com>
* gas/arm/addthumb2err.s: New test file.
diff --git a/gas/testsuite/gas/i386/bmi2-intel.d b/gas/testsuite/gas/i386/bmi2-intel.d
index 8cf48fc..fa12a0c 100644
--- a/gas/testsuite/gas/i386/bmi2-intel.d
+++ b/gas/testsuite/gas/i386/bmi2-intel.d
@@ -9,8 +9,8 @@
Disassembly of section .text:
0+ <_start>:
-[ ]*[a-f0-9]+: c4 e3 63 f0 f0 07 rorx esi,ebx,eax,0x7
-[ ]*[a-f0-9]+: c4 e3 63 f0 31 07 rorx esi,ebx,DWORD PTR \[ecx\],0x7
+[ ]*[a-f0-9]+: c4 e3 7b f0 d8 07 rorx ebx,eax,0x7
+[ ]*[a-f0-9]+: c4 e3 7b f0 19 07 rorx ebx,DWORD PTR \[ecx\],0x7
[ ]*[a-f0-9]+: c4 e2 63 f6 f0 mulx esi,ebx,eax
[ ]*[a-f0-9]+: c4 e2 63 f6 31 mulx esi,ebx,DWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 63 f5 f0 pdep esi,ebx,eax
@@ -25,9 +25,9 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: c4 e2 61 f7 31 shlx esi,DWORD PTR \[ecx\],ebx
[ ]*[a-f0-9]+: c4 e2 7b f7 f3 shrx esi,ebx,eax
[ ]*[a-f0-9]+: c4 e2 63 f7 31 shrx esi,DWORD PTR \[ecx\],ebx
-[ ]*[a-f0-9]+: c4 e3 63 f0 f0 07 rorx esi,ebx,eax,0x7
-[ ]*[a-f0-9]+: c4 e3 63 f0 31 07 rorx esi,ebx,DWORD PTR \[ecx\],0x7
-[ ]*[a-f0-9]+: c4 e3 63 f0 31 07 rorx esi,ebx,DWORD PTR \[ecx\],0x7
+[ ]*[a-f0-9]+: c4 e3 7b f0 d8 07 rorx ebx,eax,0x7
+[ ]*[a-f0-9]+: c4 e3 7b f0 19 07 rorx ebx,DWORD PTR \[ecx\],0x7
+[ ]*[a-f0-9]+: c4 e3 7b f0 19 07 rorx ebx,DWORD PTR \[ecx\],0x7
[ ]*[a-f0-9]+: c4 e2 63 f6 f0 mulx esi,ebx,eax
[ ]*[a-f0-9]+: c4 e2 63 f6 31 mulx esi,ebx,DWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c4 e2 63 f6 31 mulx esi,ebx,DWORD PTR \[ecx\]
diff --git a/gas/testsuite/gas/i386/bmi2.d b/gas/testsuite/gas/i386/bmi2.d
index 35d5e01..d52e4d1 100644
--- a/gas/testsuite/gas/i386/bmi2.d
+++ b/gas/testsuite/gas/i386/bmi2.d
@@ -8,8 +8,8 @@
Disassembly of section .text:
0+ <_start>:
-[ ]*[a-f0-9]+: c4 e3 63 f0 f0 07 rorx \$0x7,%eax,%ebx,%esi
-[ ]*[a-f0-9]+: c4 e3 63 f0 31 07 rorx \$0x7,\(%ecx\),%ebx,%esi
+[ ]*[a-f0-9]+: c4 e3 7b f0 d8 07 rorx \$0x7,%eax,%ebx
+[ ]*[a-f0-9]+: c4 e3 7b f0 19 07 rorx \$0x7,\(%ecx\),%ebx
[ ]*[a-f0-9]+: c4 e2 63 f6 f0 mulx %eax,%ebx,%esi
[ ]*[a-f0-9]+: c4 e2 63 f6 31 mulx \(%ecx\),%ebx,%esi
[ ]*[a-f0-9]+: c4 e2 63 f5 f0 pdep %eax,%ebx,%esi
@@ -24,9 +24,9 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: c4 e2 61 f7 31 shlx %ebx,\(%ecx\),%esi
[ ]*[a-f0-9]+: c4 e2 7b f7 f3 shrx %eax,%ebx,%esi
[ ]*[a-f0-9]+: c4 e2 63 f7 31 shrx %ebx,\(%ecx\),%esi
-[ ]*[a-f0-9]+: c4 e3 63 f0 f0 07 rorx \$0x7,%eax,%ebx,%esi
-[ ]*[a-f0-9]+: c4 e3 63 f0 31 07 rorx \$0x7,\(%ecx\),%ebx,%esi
-[ ]*[a-f0-9]+: c4 e3 63 f0 31 07 rorx \$0x7,\(%ecx\),%ebx,%esi
+[ ]*[a-f0-9]+: c4 e3 7b f0 d8 07 rorx \$0x7,%eax,%ebx
+[ ]*[a-f0-9]+: c4 e3 7b f0 19 07 rorx \$0x7,\(%ecx\),%ebx
+[ ]*[a-f0-9]+: c4 e3 7b f0 19 07 rorx \$0x7,\(%ecx\),%ebx
[ ]*[a-f0-9]+: c4 e2 63 f6 f0 mulx %eax,%ebx,%esi
[ ]*[a-f0-9]+: c4 e2 63 f6 31 mulx \(%ecx\),%ebx,%esi
[ ]*[a-f0-9]+: c4 e2 63 f6 31 mulx \(%ecx\),%ebx,%esi
diff --git a/gas/testsuite/gas/i386/bmi2.s b/gas/testsuite/gas/i386/bmi2.s
index 40b4e55..415994c 100644
--- a/gas/testsuite/gas/i386/bmi2.s
+++ b/gas/testsuite/gas/i386/bmi2.s
@@ -4,9 +4,9 @@
.text
_start:
-# Test for op r32, r32, r/m32, imm8
- rorx $7,%eax,%ebx,%esi
- rorx $7,(%ecx),%ebx,%esi
+# Test for op r32, r/m32, imm8
+ rorx $7,%eax,%ebx
+ rorx $7,(%ecx),%ebx
# Test for op r32, r32, r/m32
mulx %eax,%ebx,%esi
@@ -28,10 +28,10 @@ _start:
.intel_syntax noprefix
-# Test for op r32, r32, r/m32, imm8
- rorx esi,ebx,eax,7
- rorx esi,ebx,DWORD PTR [ecx],7
- rorx esi,ebx,[ecx],7
+# Test for op r32, r/m32, imm8
+ rorx ebx,eax,7
+ rorx ebx,DWORD PTR [ecx],7
+ rorx ebx,[ecx],7
# Test for op r32, r32, r/m32
mulx esi,ebx,eax
diff --git a/gas/testsuite/gas/i386/x86-64-bmi2-intel.d b/gas/testsuite/gas/i386/x86-64-bmi2-intel.d
index 87c8500..b692c1d 100644
--- a/gas/testsuite/gas/i386/x86-64-bmi2-intel.d
+++ b/gas/testsuite/gas/i386/x86-64-bmi2-intel.d
@@ -9,10 +9,10 @@
Disassembly of section .text:
0+ <_start>:
-[ ]*[a-f0-9]+: c4 e3 63 f0 f0 07 rorx esi,ebx,eax,0x7
-[ ]*[a-f0-9]+: c4 e3 63 f0 31 07 rorx esi,ebx,DWORD PTR \[rcx\],0x7
-[ ]*[a-f0-9]+: c4 43 03 f0 d1 07 rorx r10d,r15d,r9d,0x7
-[ ]*[a-f0-9]+: c4 63 03 f0 11 07 rorx r10d,r15d,DWORD PTR \[rcx\],0x7
+[ ]*[a-f0-9]+: c4 e3 7b f0 d8 07 rorx ebx,eax,0x7
+[ ]*[a-f0-9]+: c4 e3 7b f0 19 07 rorx ebx,DWORD PTR \[rcx\],0x7
+[ ]*[a-f0-9]+: c4 43 7b f0 f9 07 rorx r15d,r9d,0x7
+[ ]*[a-f0-9]+: c4 63 7b f0 39 07 rorx r15d,DWORD PTR \[rcx\],0x7
[ ]*[a-f0-9]+: c4 e2 63 f6 f0 mulx esi,ebx,eax
[ ]*[a-f0-9]+: c4 e2 63 f6 31 mulx esi,ebx,DWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 42 03 f6 d1 mulx r10d,r15d,r9d
@@ -41,10 +41,10 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: c4 e2 63 f7 31 shrx esi,DWORD PTR \[rcx\],ebx
[ ]*[a-f0-9]+: c4 42 33 f7 d7 shrx r10d,r15d,r9d
[ ]*[a-f0-9]+: c4 62 33 f7 11 shrx r10d,DWORD PTR \[rcx\],r9d
-[ ]*[a-f0-9]+: c4 e3 e3 f0 f0 07 rorx rsi,rbx,rax,0x7
-[ ]*[a-f0-9]+: c4 e3 e3 f0 31 07 rorx rsi,rbx,QWORD PTR \[rcx\],0x7
-[ ]*[a-f0-9]+: c4 43 83 f0 d1 07 rorx r10,r15,r9,0x7
-[ ]*[a-f0-9]+: c4 63 83 f0 11 07 rorx r10,r15,QWORD PTR \[rcx\],0x7
+[ ]*[a-f0-9]+: c4 e3 fb f0 d8 07 rorx rbx,rax,0x7
+[ ]*[a-f0-9]+: c4 e3 fb f0 19 07 rorx rbx,QWORD PTR \[rcx\],0x7
+[ ]*[a-f0-9]+: c4 43 fb f0 f9 07 rorx r15,r9,0x7
+[ ]*[a-f0-9]+: c4 63 fb f0 39 07 rorx r15,QWORD PTR \[rcx\],0x7
[ ]*[a-f0-9]+: c4 e2 e3 f6 f0 mulx rsi,rbx,rax
[ ]*[a-f0-9]+: c4 e2 e3 f6 31 mulx rsi,rbx,QWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 42 83 f6 d1 mulx r10,r15,r9
@@ -73,11 +73,11 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: c4 e2 fb f7 31 shrx rsi,QWORD PTR \[rcx\],rax
[ ]*[a-f0-9]+: c4 42 b3 f7 d7 shrx r10,r15,r9
[ ]*[a-f0-9]+: c4 62 b3 f7 11 shrx r10,QWORD PTR \[rcx\],r9
-[ ]*[a-f0-9]+: c4 e3 63 f0 f0 07 rorx esi,ebx,eax,0x7
-[ ]*[a-f0-9]+: c4 e3 63 f0 31 07 rorx esi,ebx,DWORD PTR \[rcx\],0x7
-[ ]*[a-f0-9]+: c4 43 2b f0 f9 07 rorx r15d,r10d,r9d,0x7
-[ ]*[a-f0-9]+: c4 63 2b f0 39 07 rorx r15d,r10d,DWORD PTR \[rcx\],0x7
-[ ]*[a-f0-9]+: c4 e3 63 f0 31 07 rorx esi,ebx,DWORD PTR \[rcx\],0x7
+[ ]*[a-f0-9]+: c4 e3 7b f0 d8 07 rorx ebx,eax,0x7
+[ ]*[a-f0-9]+: c4 e3 7b f0 19 07 rorx ebx,DWORD PTR \[rcx\],0x7
+[ ]*[a-f0-9]+: c4 43 7b f0 d1 07 rorx r10d,r9d,0x7
+[ ]*[a-f0-9]+: c4 63 7b f0 11 07 rorx r10d,DWORD PTR \[rcx\],0x7
+[ ]*[a-f0-9]+: c4 e3 7b f0 19 07 rorx ebx,DWORD PTR \[rcx\],0x7
[ ]*[a-f0-9]+: c4 e2 63 f6 f0 mulx esi,ebx,eax
[ ]*[a-f0-9]+: c4 e2 63 f6 31 mulx esi,ebx,DWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 42 2b f6 f9 mulx r15d,r10d,r9d
@@ -113,11 +113,11 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: c4 42 33 f7 fa shrx r15d,r10d,r9d
[ ]*[a-f0-9]+: c4 62 33 f7 39 shrx r15d,DWORD PTR \[rcx\],r9d
[ ]*[a-f0-9]+: c4 e2 63 f7 31 shrx esi,DWORD PTR \[rcx\],ebx
-[ ]*[a-f0-9]+: c4 e3 e3 f0 f0 07 rorx rsi,rbx,rax,0x7
-[ ]*[a-f0-9]+: c4 e3 e3 f0 31 07 rorx rsi,rbx,QWORD PTR \[rcx\],0x7
-[ ]*[a-f0-9]+: c4 43 83 f0 d1 07 rorx r10,r15,r9,0x7
-[ ]*[a-f0-9]+: c4 63 83 f0 11 07 rorx r10,r15,QWORD PTR \[rcx\],0x7
-[ ]*[a-f0-9]+: c4 e3 e3 f0 31 07 rorx rsi,rbx,QWORD PTR \[rcx\],0x7
+[ ]*[a-f0-9]+: c4 e3 fb f0 d8 07 rorx rbx,rax,0x7
+[ ]*[a-f0-9]+: c4 e3 fb f0 19 07 rorx rbx,QWORD PTR \[rcx\],0x7
+[ ]*[a-f0-9]+: c4 43 fb f0 f9 07 rorx r15,r9,0x7
+[ ]*[a-f0-9]+: c4 63 fb f0 39 07 rorx r15,QWORD PTR \[rcx\],0x7
+[ ]*[a-f0-9]+: c4 e3 fb f0 19 07 rorx rbx,QWORD PTR \[rcx\],0x7
[ ]*[a-f0-9]+: c4 e2 e3 f6 f0 mulx rsi,rbx,rax
[ ]*[a-f0-9]+: c4 e2 e3 f6 31 mulx rsi,rbx,QWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c4 42 83 f6 d1 mulx r10,r15,r9
diff --git a/gas/testsuite/gas/i386/x86-64-bmi2.d b/gas/testsuite/gas/i386/x86-64-bmi2.d
index 0d5d37d..0bcdb28 100644
--- a/gas/testsuite/gas/i386/x86-64-bmi2.d
+++ b/gas/testsuite/gas/i386/x86-64-bmi2.d
@@ -8,10 +8,10 @@
Disassembly of section .text:
0+ <_start>:
-[ ]*[a-f0-9]+: c4 e3 63 f0 f0 07 rorx \$0x7,%eax,%ebx,%esi
-[ ]*[a-f0-9]+: c4 e3 63 f0 31 07 rorx \$0x7,\(%rcx\),%ebx,%esi
-[ ]*[a-f0-9]+: c4 43 03 f0 d1 07 rorx \$0x7,%r9d,%r15d,%r10d
-[ ]*[a-f0-9]+: c4 63 03 f0 11 07 rorx \$0x7,\(%rcx\),%r15d,%r10d
+[ ]*[a-f0-9]+: c4 e3 7b f0 d8 07 rorx \$0x7,%eax,%ebx
+[ ]*[a-f0-9]+: c4 e3 7b f0 19 07 rorx \$0x7,\(%rcx\),%ebx
+[ ]*[a-f0-9]+: c4 43 7b f0 f9 07 rorx \$0x7,%r9d,%r15d
+[ ]*[a-f0-9]+: c4 63 7b f0 39 07 rorx \$0x7,\(%rcx\),%r15d
[ ]*[a-f0-9]+: c4 e2 63 f6 f0 mulx %eax,%ebx,%esi
[ ]*[a-f0-9]+: c4 e2 63 f6 31 mulx \(%rcx\),%ebx,%esi
[ ]*[a-f0-9]+: c4 42 03 f6 d1 mulx %r9d,%r15d,%r10d
@@ -40,10 +40,10 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: c4 e2 63 f7 31 shrx %ebx,\(%rcx\),%esi
[ ]*[a-f0-9]+: c4 42 33 f7 d7 shrx %r9d,%r15d,%r10d
[ ]*[a-f0-9]+: c4 62 33 f7 11 shrx %r9d,\(%rcx\),%r10d
-[ ]*[a-f0-9]+: c4 e3 e3 f0 f0 07 rorx \$0x7,%rax,%rbx,%rsi
-[ ]*[a-f0-9]+: c4 e3 e3 f0 31 07 rorx \$0x7,\(%rcx\),%rbx,%rsi
-[ ]*[a-f0-9]+: c4 43 83 f0 d1 07 rorx \$0x7,%r9,%r15,%r10
-[ ]*[a-f0-9]+: c4 63 83 f0 11 07 rorx \$0x7,\(%rcx\),%r15,%r10
+[ ]*[a-f0-9]+: c4 e3 fb f0 d8 07 rorx \$0x7,%rax,%rbx
+[ ]*[a-f0-9]+: c4 e3 fb f0 19 07 rorx \$0x7,\(%rcx\),%rbx
+[ ]*[a-f0-9]+: c4 43 fb f0 f9 07 rorx \$0x7,%r9,%r15
+[ ]*[a-f0-9]+: c4 63 fb f0 39 07 rorx \$0x7,\(%rcx\),%r15
[ ]*[a-f0-9]+: c4 e2 e3 f6 f0 mulx %rax,%rbx,%rsi
[ ]*[a-f0-9]+: c4 e2 e3 f6 31 mulx \(%rcx\),%rbx,%rsi
[ ]*[a-f0-9]+: c4 42 83 f6 d1 mulx %r9,%r15,%r10
@@ -72,11 +72,11 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: c4 e2 fb f7 31 shrx %rax,\(%rcx\),%rsi
[ ]*[a-f0-9]+: c4 42 b3 f7 d7 shrx %r9,%r15,%r10
[ ]*[a-f0-9]+: c4 62 b3 f7 11 shrx %r9,\(%rcx\),%r10
-[ ]*[a-f0-9]+: c4 e3 63 f0 f0 07 rorx \$0x7,%eax,%ebx,%esi
-[ ]*[a-f0-9]+: c4 e3 63 f0 31 07 rorx \$0x7,\(%rcx\),%ebx,%esi
-[ ]*[a-f0-9]+: c4 43 2b f0 f9 07 rorx \$0x7,%r9d,%r10d,%r15d
-[ ]*[a-f0-9]+: c4 63 2b f0 39 07 rorx \$0x7,\(%rcx\),%r10d,%r15d
-[ ]*[a-f0-9]+: c4 e3 63 f0 31 07 rorx \$0x7,\(%rcx\),%ebx,%esi
+[ ]*[a-f0-9]+: c4 e3 7b f0 d8 07 rorx \$0x7,%eax,%ebx
+[ ]*[a-f0-9]+: c4 e3 7b f0 19 07 rorx \$0x7,\(%rcx\),%ebx
+[ ]*[a-f0-9]+: c4 43 7b f0 d1 07 rorx \$0x7,%r9d,%r10d
+[ ]*[a-f0-9]+: c4 63 7b f0 11 07 rorx \$0x7,\(%rcx\),%r10d
+[ ]*[a-f0-9]+: c4 e3 7b f0 19 07 rorx \$0x7,\(%rcx\),%ebx
[ ]*[a-f0-9]+: c4 e2 63 f6 f0 mulx %eax,%ebx,%esi
[ ]*[a-f0-9]+: c4 e2 63 f6 31 mulx \(%rcx\),%ebx,%esi
[ ]*[a-f0-9]+: c4 42 2b f6 f9 mulx %r9d,%r10d,%r15d
@@ -112,11 +112,11 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: c4 42 33 f7 fa shrx %r9d,%r10d,%r15d
[ ]*[a-f0-9]+: c4 62 33 f7 39 shrx %r9d,\(%rcx\),%r15d
[ ]*[a-f0-9]+: c4 e2 63 f7 31 shrx %ebx,\(%rcx\),%esi
-[ ]*[a-f0-9]+: c4 e3 e3 f0 f0 07 rorx \$0x7,%rax,%rbx,%rsi
-[ ]*[a-f0-9]+: c4 e3 e3 f0 31 07 rorx \$0x7,\(%rcx\),%rbx,%rsi
-[ ]*[a-f0-9]+: c4 43 83 f0 d1 07 rorx \$0x7,%r9,%r15,%r10
-[ ]*[a-f0-9]+: c4 63 83 f0 11 07 rorx \$0x7,\(%rcx\),%r15,%r10
-[ ]*[a-f0-9]+: c4 e3 e3 f0 31 07 rorx \$0x7,\(%rcx\),%rbx,%rsi
+[ ]*[a-f0-9]+: c4 e3 fb f0 d8 07 rorx \$0x7,%rax,%rbx
+[ ]*[a-f0-9]+: c4 e3 fb f0 19 07 rorx \$0x7,\(%rcx\),%rbx
+[ ]*[a-f0-9]+: c4 43 fb f0 f9 07 rorx \$0x7,%r9,%r15
+[ ]*[a-f0-9]+: c4 63 fb f0 39 07 rorx \$0x7,\(%rcx\),%r15
+[ ]*[a-f0-9]+: c4 e3 fb f0 19 07 rorx \$0x7,\(%rcx\),%rbx
[ ]*[a-f0-9]+: c4 e2 e3 f6 f0 mulx %rax,%rbx,%rsi
[ ]*[a-f0-9]+: c4 e2 e3 f6 31 mulx \(%rcx\),%rbx,%rsi
[ ]*[a-f0-9]+: c4 42 83 f6 d1 mulx %r9,%r15,%r10
diff --git a/gas/testsuite/gas/i386/x86-64-bmi2.s b/gas/testsuite/gas/i386/x86-64-bmi2.s
index 4976e84..677421f 100644
--- a/gas/testsuite/gas/i386/x86-64-bmi2.s
+++ b/gas/testsuite/gas/i386/x86-64-bmi2.s
@@ -4,11 +4,11 @@
.text
_start:
-# Test for op r32, r32, r/m32, imm8
- rorx $7,%eax,%ebx,%esi
- rorx $7,(%rcx),%ebx,%esi
- rorx $7,%r9d,%r15d,%r10d
- rorx $7,(%rcx),%r15d,%r10d
+# Test for op r32, r/m32, imm8
+ rorx $7,%eax,%ebx
+ rorx $7,(%rcx),%ebx
+ rorx $7,%r9d,%r15d
+ rorx $7,(%rcx),%r15d
# Test for op r32, r32, r/m32
mulx %eax,%ebx,%esi
@@ -42,11 +42,11 @@ _start:
shrx %r9d,%r15d,%r10d
shrx %r9d,(%rcx),%r10d
-# Test for op r64, r64, r/m64, imm8
- rorx $7,%rax,%rbx,%rsi
- rorx $7,(%rcx),%rbx,%rsi
- rorx $7,%r9,%r15,%r10
- rorx $7,(%rcx),%r15,%r10
+# Test for op r64, r/m64, imm8
+ rorx $7,%rax,%rbx
+ rorx $7,(%rcx),%rbx
+ rorx $7,%r9,%r15
+ rorx $7,(%rcx),%r15
# Test for op r64, r64, r/m64
mulx %rax,%rbx,%rsi
@@ -82,12 +82,12 @@ _start:
.intel_syntax noprefix
-# Test for op r32, r32, r/m32, imm8
- rorx esi,ebx,eax,7
- rorx esi,ebx,DWORD PTR [rcx],7
- rorx r15d,r10d,r9d,7
- rorx r15d,r10d,DWORD PTR [rcx],7
- rorx esi,ebx,[rcx],7
+# Test for op r32, r/m32, imm8
+ rorx ebx,eax,7
+ rorx ebx,DWORD PTR [rcx],7
+ rorx r10d,r9d,7
+ rorx r10d,DWORD PTR [rcx],7
+ rorx ebx,[rcx],7
# Test for op r32, r32, r/m32
mulx esi,ebx,eax
@@ -128,12 +128,12 @@ _start:
shrx r15d,DWORD PTR [rcx],r9d
shrx esi,[rcx],ebx
-# Test for op r64, r64, r/m64, imm8
- rorx rsi,rbx,rax,7
- rorx rsi,rbx,QWORD PTR [rcx],7
- rorx r10,r15,r9,7
- rorx r10,r15,QWORD PTR [rcx],7
- rorx rsi,rbx,[rcx],7
+# Test for op r64, r/m64, imm8
+ rorx rbx,rax,7
+ rorx rbx,QWORD PTR [rcx],7
+ rorx r15,r9,7
+ rorx r15,QWORD PTR [rcx],7
+ rorx rbx,[rcx],7
# Test for op r64, r64, r/m64
mulx rsi,rbx,rax
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 10c9a28..51c6aa9 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,11 @@
+2011-06-30 H.J. Lu <hongjiu.lu@intel.com>
+
+ AVX Programming Reference (June, 2011)
+ * i386-dis.c (vex_len_table): Correct rorxS.
+
+ * i386-opc.tbl: Correct rorx.
+ * i386-tbl.h: Regenerated.
+
2011-06-29 H.J. Lu <hongjiu.lu@intel.com>
* tilegx-opc.c (find_opcode): Replace "index" with "i".
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index 1626365..04ab2bd 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -8961,7 +8961,7 @@ static const struct dis386 vex_len_table[][2] = {
/* VEX_LEN_0F3AF0_P_3 */
{
- { "rorxS", { Gdq, VexGdq, Edq, Ib } },
+ { "rorxS", { Gv, Ev, Ib } },
},
/* VEX_LEN_0FXOP_09_80 */
diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl
index a6836b7..4c29ab7 100644
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -2692,7 +2692,7 @@ bzhi, 3, 0xf5, None, 1, CpuBMI2, Modrm|CheckRegSize|Vex=3|VexOpcode=1|VexVVVV=1|
mulx, 3, 0xf2f6, None, 1, CpuBMI2, Modrm|CheckRegSize|Vex=3|VexOpcode=1|VexVVVV=1|No_bSuf|No_wSuf|No_sSuf|No_ldSuf, { Reg32|Reg64|Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg32|Reg64, Reg32|Reg64 }
pdep, 3, 0xf2f5, None, 1, CpuBMI2, Modrm|CheckRegSize|Vex=3|VexOpcode=1|VexVVVV=1|No_bSuf|No_wSuf|No_sSuf|No_ldSuf, { Reg32|Reg64|Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg32|Reg64, Reg32|Reg64 }
pext, 3, 0xf3f5, None, 1, CpuBMI2, Modrm|CheckRegSize|Vex=3|VexOpcode=1|VexVVVV=1|No_bSuf|No_wSuf|No_sSuf|No_ldSuf, { Reg32|Reg64|Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg32|Reg64, Reg32|Reg64 }
-rorx, 4, 0xf2f0, None, 1, CpuBMI2, Modrm|CheckRegSize|Vex=3|VexOpcode=2|VexVVVV=1|No_bSuf|No_wSuf|No_sSuf|No_ldSuf, { Imm8, Reg32|Reg64|Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg32|Reg64, Reg32|Reg64 }
+rorx, 3, 0xf2f0, None, 1, CpuBMI2, Modrm|CheckRegSize|Vex=3|VexOpcode=2|VexVVVV=0|No_bSuf|No_wSuf|No_sSuf|No_ldSuf, { Imm8, Reg32|Reg64|Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg32|Reg64 }
sarx, 3, 0xf3f7, None, 1, CpuBMI2, Modrm|CheckRegSize|Vex=3|VexOpcode=1|VexVVVV=1|No_bSuf|No_wSuf|No_sSuf|No_ldSuf, { Reg32|Reg64, Reg32|Reg64|Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg32|Reg64 }
shlx, 3, 0x66f7, None, 1, CpuBMI2, Modrm|CheckRegSize|Vex=3|VexOpcode=1|VexVVVV=1|No_bSuf|No_wSuf|No_sSuf|No_ldSuf, { Reg32|Reg64, Reg32|Reg64|Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg32|Reg64 }
shrx, 3, 0xf2f7, None, 1, CpuBMI2, Modrm|CheckRegSize|Vex=3|VexOpcode=1|VexVVVV=1|No_bSuf|No_wSuf|No_sSuf|No_ldSuf, { Reg32|Reg64, Reg32|Reg64|Dword|Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, Reg32|Reg64 }
diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h
index ac47646..941164c 100644
--- a/opcodes/i386-tbl.h
+++ b/opcodes/i386-tbl.h
@@ -31708,12 +31708,12 @@ const insn_template i386_optab[] =
{ { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0 } } } },
- { "rorx", 4, 0xf2f0, None, 1,
+ { "rorx", 3, 0xf2f0, None, 1,
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0 } },
{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 1, 1,
- 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 1,
+ 0, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, 0,
0, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
{ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
@@ -31723,9 +31723,6 @@ const insn_template i386_optab[] =
0, 0, 1, 0, 0, 0 } },
{ { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0 } },
- { { 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
- 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 0 } } } },
{ "sarx", 3, 0xf3f7, None, 1,
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,