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Re: MIPS stubs in Gold


In ARM, this is done in a relaxing pass.  We don't know if we need a
stub until the addresses are finalized but adding stub also changes
addresses.  So this is done in iteratively no address is change.  The
main hook is Target::do_relax.  The main function to look at is
Target_arm::do_relax.

I am not very familiar with the MIPS architecture. When I looked at
the 32-bit ISA, it seems to me that the j and jal instructions cannot
reach the whole 4G address range.  I suspect you might want to do what
I did for ARM.

-Doug


On Fri, Jun 24, 2011 at 7:35 AM, Aleksandar Simeonov
<Aleksandar.Simeonov@rt-rk.com> wrote:
> Hi gain,
> After some time I have to bother you again. I need some additional
> details about ARM implementation of stubs and few tips how to implement
> them for MIPS.
>
> Situation is as follows:
> Some function calls need special handling depend on flags and relocation
> type. In that case, some additional stub code is needed. There are two
> types of stubs. One that goes immediately before function and it only
> contains loading of function address in some register and second that
> goes on arbitrary place in .text section (usually at the end) and
> contains loading of function address in some register and jump to that
> function. Also, relocations that are related to that function call has
> to be changed in a way to point to that new code. New relocation has to
> be added to the stub code to fix function address in it. Additional
> problem for the first type of stub is that is has to be just before
> function in .text section (it is only used if function is at the
> beginning of the .text section).
>
> I looked at ARM code, also I looked at implementation of plt, but I
> didn't manage to find what I needed.
>
> Can someone give me some hints or ideas what to do and how to proceed
> with this? Also, which details can help and which can't (there are quite
> some code in ARM implementation of Gold :-)).
>
> Thank you in advance for your help,
> Aleksandar
>
>
> On 01/06/2011 20:21, Doug Kwan (éæå) wrote:
>> The ARM stubs do a number of things
>>
>> -extending branch range
>> -handling transistion between ARM and THUMB with BX and BLX
>> instructions cannot be used.
>> -avoid a hardware erratum in involving page straddling long branches
>> in THUMB2 mode.
>>
>> The base class is Stub, from which other stub kinds are derived. ÂStub
>> generation in ARM is a relaxation. ÂI need to iterate a number of time
>> because addresses are changed by the inserted stubs. ÂI hope that this
>> is not the case in MIPS. ÂThere are hooks for doing relaxation. ÂLook
>> for do_relax() in the ARM backend.
>>
>> -Doug
>>
>> On Wed, Jun 1, 2011 at 8:43 AM, Ian Lance Taylor <iant@google.com> wrote:
>>> Aleksandar Simeonov <Aleksandar.Simeonov@RT-RK.com> writes:
>>>
>>>> Again I have problem that occupy me for some time and for what I can't
>>>> find solution. Situation is as follows (next text is taken from
>>>> elfxx-mips.c from ld):
>>>>
>>>> "Information about a non-PIC interface to a PIC function. ÂThere are
>>>> Â Âtwo ways of creating these interfaces. ÂThe first is to add:
>>>>
>>>>    lui   $25,%hi(func)
>>>>    addiu  $25,$25,%lo(func)
>>>>
>>>> Â Âimmediately before a PIC function "func". ÂThe second is to add:
>>>>
>>>>    lui   $25,%hi(func)
>>>>    j    func
>>>>    addiu  $25,$25,%lo(func)
>>>>
>>>> Â Âto a separate trampoline section.
>>>>
>>>> Â ÂStubs of the first kind go in a new section immediately before the
>>>> Â Âtarget function. ÂStubs of the second kind go in a single section
>>>> Â Âpointed to by the hash table's "strampoline" field."
>>>>
>>>> I tried to find something similar in Gold for other architectures, but
>>>> without success. Can you give me some suggestions where to look and what
>>>> to do to implement this.
>>>
>>> The ARM backend implements stubs, e.g., for calls between ARM and Thumb
>>> code. ÂSearch for "stub" and "Stub". ÂYou probably don't have to do
>>> anything as complex for the MIPS backend. ÂAt least, I hope not.
>>>
>>> Ian
>>>
>>
>


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