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Re: [PATCH] AMD bdver2 processors 1/2 - BMI
- From: Quentin Neill <quentin dot neill dot gnu at gmail dot com>
- To: "H.J. Lu" <hjl dot tools at gmail dot com>
- Cc: Sebastian Pop <sebpop at gmail dot com>, binutils at sourceware dot org
- Date: Mon, 3 Jan 2011 18:06:45 -0600
- Subject: Re: [PATCH] AMD bdver2 processors 1/2 - BMI
- References: <AANLkTim1Vi--MmdH91TX7Wyto9T16Y3DoGnKX05Kw5dK@mail.gmail.com> <AANLkTi=1Hxuqe319svSyFnym5orYxq0pn4wPw3s3jJ7g@mail.gmail.com> <AANLkTincZ2UA_cM-o9=Wsu+ucQDES=-tRvS+Bg9eY=+3@mail.gmail.com> <AANLkTin6gDhYPmPvRNU-uwFRPrLgR4_ZYytHHA2apG8V@mail.gmail.com> <AANLkTim8N=sACQ5tDa360KQnHRUnL-y9Txf7DZjS5=dq@mail.gmail.com> <AANLkTineZkJXOZnS4LdQoApDs-ON3OaZgqOxCMcdFvF_@mail.gmail.com> <AANLkTikQu5zsQ-Jq6233yqNcZXu6dDmqsPzRoxFTB+Lh@mail.gmail.com>
On Mon, Jan 3, 2011 at 10:35 AM, H.J. Lu <hjl.tools@gmail.com> wrote:
> On Mon, Jan 3, 2011 at 8:10 AM, Quentin Neill
> <quentin.neill.gnu@gmail.com> wrote:
>> On Tue, Dec 28, 2010 at 8:10 AM, H.J. Lu <hjl.tools@gmail.com> wrote:
>>> On Tue, Dec 28, 2010 at 5:53 AM, H.J. Lu <hjl.tools@gmail.com> wrote:
>>>> On Mon, Dec 20, 2010 at 2:55 PM, Quentin Neill
>>>> <quentin.neill.gnu@gmail.com> wrote:
>>>>> On Mon, Dec 20, 2010 at 4:39 PM, Sebastian Pop <sebpop@gmail.com> wrote:
>>>>>> On Mon, Dec 20, 2010 at 16:32, Quentin Neill
>>>>>> <quentin.neill.gnu@gmail.com> wrote:
>>>>>>> These two patches add support for BMI and TBM ISAs to be introduced in
>>>>>>> AMD bdver2 processors.
>>>>>>>
>>>>>>> The full encoding specification is delayed, however I have posted
>>>>>>> abbreviated specs on the gcc mailing list:
>>>>>>> BMI: http://gcc.gnu.org/ml/gcc-patches/2010-10/msg01766.html
>>>>>>> TBM: http://gcc.gnu.org/ml/gcc-patches/2010-10/msg01767.html
>>>>>>>
>>>>>>
>>>>>> Looks like your patch is reversed. ?Could you please send another one
>>>>>> that you get from git format-patch -1
>>>>>>
>>>>>> Thanks,
>>>>>> Sebastian
>>>>>
>>>>> Oops. ?Reposting with reversed patch. ?Thanks for reviewing Sebastian.
>>>>> --
>>>>> Quentin
>>>>>
>>>>
>>>> Please don't add ModrmRegExt, There are many examples in i386-opt.tbl
>>>> without ModrmRegExt.
>>>>
>>>>
>>>
>>> You should check i.tm.extension_opcode != None instead.
>>>
>>> --
>>> H.J.
>>
>> Hi H.J.,
>> Thanks for the feedback.
>> So you are saying remove ModrmRegExt from both patches, right?
>
> Yes.
Hi H.J.,
I concur that ModrmRegExt is not needed (I see opcode_extension used
later to encode modrm.reg). But I need a way to distinguish TBM/BMI
from LWP instructions which don't swap the operand order:
lwpins, 3, 0x12, 0x0, 1, CpuLWP, Modrm|VexOpcode=5|VexW=1|VexVVVV=3|Vex|...
llwpcb, 1, 0x12, 0x0, 1, CpuLWP, Modrm|VexOpcode=4|VexW=1|Vex|...
blsfill, 2, 0x01, 0x2, 1, CpuTBM, Modrm|VexOpcode=4|VexW=1|VexVVVV=3|Vex|...
blcmsk, 2, 0x02, 0x1, 1, CpuTBM, Modrm|VexOpcode=4|VexW=1|VexVVVV=3|Vex|...
Is it okay to branch on the number of instructions to make encoding
decisions? That seems about as kludgy as branching on the opcode or
opcode_modifier, but rather than post a patch I thought I'd email
first.
--
Quentin