Re: C6x: Fix another problem with rela. and rel. sections

["Joseph S. Myers" <joseph at codesourcery dot com>]

On Thu, 23 Sep 2010, Bernd Schmidt wrote:

> TI's compiler for C6x produces both rel. and rela. sections.  When compiling
> the kernel with it, we end up with rela.init.text and rel.init.text, and when
> we then try to use GNU ld to link these objects together using "-r", the
> linker aborts with
> 
> ld: init/mounts.o: relocation size mismatch in init/do_mounts.o section .text
> ld: final link failed: File in wrong format
> 
> That's because in the output we've only made one of the two sections.  I
> looked around in other targets for ways to fix it, and came across a
> definition of elf_fake_sections in elf32-m32r.c.  Adding such a function to
> elf32-tic6x.c seems to fix the problem.
> 
> Ok?

The variable "name" in the function you add appears to be set but not 
used.  OK with that variable removed.

Is it possible to test this in the linker testsuite?  That is, can the bug 
be exercised starting with objects where each object only contains REL or 
only contains RELA relocations, or do you need a single input containing 
both (which the GNU assembler won't generate)?  (Specify -mgenerate-rel in 
#source rather than #as in the .d file to have it apply only to some of 
the input files.)  If it can be tested, a test should be added to 
ld-tic6x.

-- 
Joseph S. Myers
joseph@codesourcery.com