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[Patch] [MIPS] Change opcode membership for the ssnop and ehb instructions
- From: Catherine Moore <clm at codesourcery dot com>
- To: binutils at sourceware dot org
- Cc: Catherine Moore <clm at codesourcery dot com>
- Date: Thu, 20 May 2010 14:00:32 -0400
- Subject: [Patch] [MIPS] Change opcode membership for the ssnop and ehb instructions
This patch changes the opcode membership for the ssnop instruction to
I1 from I32 | N55. It also changes the opcode membership of the ehb
instruction to I32 from I33. For those ASE's which don't support ehb
and/or ssnop, the instruction executes as a nop. This change make the
disassembly read more cleanly. Does this look okay to install?
Thanks,
Catherine
2010-05-20 Catherine Moore <clm@codesourcery.com>
opcodes/
* mips-opc.c (mips_builtin_op): Change membership for
ehb and ssnop instructions.
gas/testsuite
* gas/mips/set-arch.d: Update expected output.
Index: gas/testsuite/gas/mips/set-arch.d
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/mips/set-arch.d,v
retrieving revision 1.5
diff -p -r1.5 set-arch.d
*** gas/testsuite/gas/mips/set-arch.d 4 May 2006 10:47:05 -0000 1.5
--- gas/testsuite/gas/mips/set-arch.d 20 May 2010 17:51:37 -0000
*************** Disassembly of section \.text:
*** 165,171 ****
00000274 <[^>]*> 7000003f sdbbp
00000278 <[^>]*> 7000003f sdbbp
0000027c <[^>]*> 7159e27f sdbbp 0x56789
! 00000280 <[^>]*> 000000c0 sll zero,zero,0x3
00000284 <[^>]*> 7ca43980 0x7ca43980
00000288 <[^>]*> 7ca46984 0x7ca46984
0000028c <[^>]*> 0100fc09 jalr.hb t0
--- 165,171 ----
00000274 <[^>]*> 7000003f sdbbp
00000278 <[^>]*> 7000003f sdbbp
0000027c <[^>]*> 7159e27f sdbbp 0x56789
! 00000280 <[^>]*> 000000c0 ehb
00000284 <[^>]*> 7ca43980 0x7ca43980
00000288 <[^>]*> 7ca46984 0x7ca46984
0000028c <[^>]*> 0100fc09 jalr.hb t0
Index: opcodes/mips-opc.c
===================================================================
RCS file: /cvs/src/src/opcodes/mips-opc.c,v
retrieving revision 1.75
diff -p -r1.75 mips-opc.c
*** opcodes/mips-opc.c 2 Sep 2009 07:20:30 -0000 1.75
--- opcodes/mips-opc.c 20 May 2010 17:51:37 -0000
*************** const struct mips_opcode mips_builtin_op
*** 188,195 ****
{"pref", "k,o(b)", 0xcc000000, 0xfc000000, RD_b, 0, I4_32|G3 },
{"prefx", "h,t(b)", 0x4c00000f, 0xfc0007ff, RD_b|RD_t|FP_S, 0, I4_33 },
{"nop", "", 0x00000000, 0xffffffff, 0, INSN2_ALIAS, I1 }, /* sll */
! {"ssnop", "", 0x00000040, 0xffffffff, 0, INSN2_ALIAS, I32|N55 }, /* sll */
! {"ehb", "", 0x000000c0, 0xffffffff, 0, INSN2_ALIAS, I33 }, /* sll */
{"li", "t,j", 0x24000000, 0xffe00000, WR_t, INSN2_ALIAS, I1 }, /* addiu */
{"li", "t,i", 0x34000000, 0xffe00000, WR_t, INSN2_ALIAS, I1 }, /* ori */
{"li", "t,I", 0, (int) M_LI, INSN_MACRO, 0, I1 },
--- 188,195 ----
{"pref", "k,o(b)", 0xcc000000, 0xfc000000, RD_b, 0, I4_32|G3 },
{"prefx", "h,t(b)", 0x4c00000f, 0xfc0007ff, RD_b|RD_t|FP_S, 0, I4_33 },
{"nop", "", 0x00000000, 0xffffffff, 0, INSN2_ALIAS, I1 }, /* sll */
! {"ssnop", "", 0x00000040, 0xffffffff, 0, INSN2_ALIAS, I1 }, /* sll */
! {"ehb", "", 0x000000c0, 0xffffffff, 0, INSN2_ALIAS, I32 }, /* sll */
{"li", "t,j", 0x24000000, 0xffe00000, WR_t, INSN2_ALIAS, I1 }, /* addiu */
{"li", "t,i", 0x34000000, 0xffe00000, WR_t, INSN2_ALIAS, I1 }, /* ori */
{"li", "t,I", 0, (int) M_LI, INSN_MACRO, 0, I1 },