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Add -mpwr* synonyms for -mpower*
- From: Richard Sandiford <rdsandiford at googlemail dot com>
- To: binutils at sourceware dot org
- Date: Tue, 09 Feb 2010 22:04:13 +0000
- Subject: Add -mpwr* synonyms for -mpower*
As discussed on the list recently, this patch adds -mpwr* synonyms
for -mpower*, to be compatible with AIX. It does the same for the
.machine pseudo-op.
It looks like all the ppc_opts entries are in alphabetical order except
for "a2" (which is in architectural order instead). I moved it as part
of this patch because I wasn't sure at first where the new elements
should go. I'm happy to leave it where it is if it's already in the
right place though.
Tested on powerpc-ibm-aix5.3.0. It makes the GCC -mcpu=power* options
work, and means that the GCC configure script now passes various
configure tests that use '.machine "pwrX"'. OK to apply?
Richard
gas/
* config/tc-ppc.c (md_show_usage): Add -mpwr4, -mpwr5, -mpwr5x,
-mpwr6 and -mpwr7.
opcodes/
* ppc-dis.c (ppc_opts): Add "pwr4", "pwr5", "pwr5x", "pwr6"
and "pwr7". Move "a2" into alphabetical order.
Index: gas/config/tc-ppc.c
===================================================================
--- gas/config/tc-ppc.c 2010-01-29 11:07:54.000000000 +0000
+++ gas/config/tc-ppc.c 2010-01-29 11:08:00.000000000 +0000
@@ -1199,10 +1199,11 @@ md_show_usage (FILE *stream)
-mppc64bridge generate code for PowerPC 64, including bridge insns\n\
-mbooke generate code for 32-bit PowerPC BookE\n\
-ma2 generate code for A2 architecture\n\
--mpower4 generate code for Power4 architecture\n\
--mpower5 generate code for Power5 architecture\n\
--mpower6 generate code for Power6 architecture\n\
--mpower7 generate code for Power7 architecture\n\
+-mpower4, -mpwr4 generate code for Power4 architecture\n\
+-mpower5, -mpwr5, -mpwr5x\n\
+ generate code for Power5 architecture\n\
+-mpower6, -mpwr6 generate code for Power6 architecture\n\
+-mpower7, -mpwr7 generate code for Power7 architecture\n\
-mcell generate code for Cell Broadband Engine architecture\n\
-mcom generate code Power/PowerPC common instructions\n\
-many generate code for any architecture (PWR/PWRX/PPC)\n"));
Index: opcodes/ppc-dis.c
===================================================================
--- opcodes/ppc-dis.c 2010-01-29 11:07:54.000000000 +0000
+++ opcodes/ppc-dis.c 2010-02-09 08:23:18.000000000 +0000
@@ -89,6 +89,10 @@ struct ppc_mopt ppc_opts[] = {
0 },
{ "750cl", (PPC_OPCODE_PPC | PPC_OPCODE_PPCPS)
, 0 },
+ { "a2", (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ISEL
+ | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_CACHELCK
+ | PPC_OPCODE_64 | PPC_OPCODE_A2),
+ 0 },
{ "altivec", (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC),
PPC_OPCODE_ALTIVEC },
{ "any", 0,
@@ -150,16 +154,30 @@ struct ppc_mopt ppc_opts[] = {
{ "ppc64bridge", (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64_BRIDGE
| PPC_OPCODE_64),
0 },
- { "a2", (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ISEL
- | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_CACHELCK
- | PPC_OPCODE_64 | PPC_OPCODE_A2),
- 0 },
{ "ppcps", (PPC_OPCODE_PPC | PPC_OPCODE_PPCPS),
0 },
{ "pwr", (PPC_OPCODE_POWER | PPC_OPCODE_32),
0 },
{ "pwr2", (PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32),
0 },
+ { "pwr4", (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64
+ | PPC_OPCODE_POWER4),
+ 0 },
+ { "pwr5", (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64
+ | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5),
+ 0 },
+ { "pwr5x", (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64
+ | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5),
+ 0 },
+ { "pwr6", (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_64
+ | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
+ | PPC_OPCODE_ALTIVEC),
+ 0 },
+ { "pwr7", (PPC_OPCODE_PPC | PPC_OPCODE_CLASSIC | PPC_OPCODE_ISEL
+ | PPC_OPCODE_64 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5
+ | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7 | PPC_OPCODE_ALTIVEC
+ | PPC_OPCODE_VSX),
+ 0 },
{ "pwrx", (PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_32),
0 },
{ "spe", (PPC_OPCODE_PPC | PPC_OPCODE_EFS),