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RE: MIPS JAL/JALR to BAL transformation for Linux (o32 ABI)


Richard Sandiford wrote:
> "Fu, Chao-Ying" <fu@mips.com> writes:
> > Adam Nemet wrote:
> >> > +/* True if ABFD is for CPUs that are faster if jal/jalr is 
> >> converted to bal.
> >> > +   This should be safe for all architectures, but for now 
> >> we enable it
> >> > +   for RM9000, mips32, mips32r2, mips64, and mips64r2.  */
> >> > +#define JAL_JALR_TO_BAL_P(abfd) \
> >> > +  (   ((elf_elfheader (abfd)->e_flags & EF_MIPS_MACH) == 
> >> E_MIPS_MACH_9000) \
> >> > +   || ((elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH) == 
> >> E_MIPS_ARCH_32) \
> >> > +   || ((elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH) == 
> >> E_MIPS_ARCH_32R2) \
> >> > +   || ((elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH) == 
> >> E_MIPS_ARCH_64) \
> >> > +   || ((elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH) == 
> >> E_MIPS_ARCH_64R2))
> >> 
> >> I think this should be a negative predicate.  As you say JALR->BAL
> >> should be a profitable transformation on most CPUs.
> >
> >   Yes.  If everyone is ok, we can just set 
> JAL_JALR_TO_BAL_P(abfd) to 1.
> > (And, fix new test failures due to BAL mismatching.)
> 
> Sounds good to me FWIW.  Also, I don't think MIPS_JALR_HINT_P should
> be predicated on ISA level.  It should be a format-based decision
> instead.  The question then is whether we want to unconditionally
> enable this for all non-IRIX targets, at the potential risk of
> breaking compatibility with other non-GNU & non-IRIX o32 abicalls
> linkers, or whether we want to be more conservative.
> 
> I'm not sure whether such linkers exist.  And even if they do,
> anyone with specific requirements could easily create a new GAS
> configuration that had this macro turned off.  So how about:
> 
> #ifdef TE_IRIX
> #define MIPS_JALR_HINT_P HAVE_NEWABI
> #else
> /* As a GNU extension, we use R_MIPS_JALR for o32 too.  */
> #define MIPS_JALR_HINT_P 1
> #endif
> 

  Yes.  Here is the new patch to use your define in "tc-mips.c".

  And I used JALR_TO_BAL_P and JAL_TO_BAL_P to guard the transformation
in "elfxx-mips.c".  JALR_TO_BAL_P is true for all CPUs, because
BAL should be faster than JALR.  JAL_TO_BAL_P is true for RM9000, since
the original code supports RM9000.  For other CPUs, JAL should perform
well similar to BAL.  In the future, we can still add more CPUs to JAL_TO_BAL_P.

  I fixed three GAS tests to include R_MIPS_JALR relocations after JALR.
The target "mips-linux-gnu" was tested and there are no new failures
under GAS, LD, and Binutils.  Is the patch ok?  Thanks!

Note: We still need a GCC patch to insert R_MIPS_JALR reloc when -mexplicit-relocs.

Regards,
Chao-ying

gas/ChangeLog
2009-08-03  Chao-ying Fu  <fu@mips.com>

	* config/tc-mips.c (MIPS_JALR_HINT_P): New define. For IRIX, it is true
	for new abi.  For non-IRIX targets, it is always true.
	(macro_build_jalr): If MIPS_JALR_HINT_P, emit BFD_RELOC_MIPS_JALR.

bfd/ChangeLog
2009-08-03  Chao-ying Fu  <fu@mips.com>

	* elf32-mips.c (mips_reloc_map): Add BFD_RELOC_MIPS_JALR.
	* elfxx-mips.c (JAL_TO_BAL_P): New define to transform JAL
	to BAL for CPUs.  It is true for RM9000.
	(JALR_TO_BAL_P): New define to transform JALR to BAL.  It is true for all CPUs.
	(mips_elf_perform_relocation): Use JAL_TO_BAL_P and JALR_TO_BAL_P
	to guard the transformation.

gas/testsuite/ChangeLog
2009-08-03  Chao-ying Fu  <fu@mips.com>

	* gas/mips/jal-svr4pic.d, gas/mips/jal-xgot.d, gas/mips/mips-abi32-pic2.d:
	Add R_MIPS_JALR relocations after jalr.

Index: src/gas/config/tc-mips.c
===================================================================
--- src.orig/gas/config/tc-mips.c	2009-08-03 17:51:53.079188000 -0700
+++ src/gas/config/tc-mips.c	2009-08-03 17:52:15.061183000 -0700
@@ -290,6 +290,14 @@ static int file_ase_mips16;
 			      || mips_opts.isa == ISA_MIPS64		\
 			      || mips_opts.isa == ISA_MIPS64R2)
 
+/* True if we want to create R_MIPS_JALR for jalr $25.  */
+#ifdef TE_IRIX
+#define MIPS_JALR_HINT_P HAVE_NEWABI
+#else
+/* As a GNU extension, we use R_MIPS_JALR for o32 too.  */
+#define MIPS_JALR_HINT_P 1
+#endif
+
 /* True if -mips3d was passed or implied by arguments passed on the
    command line (e.g., by -march).  */
 static int file_ase_mips3d;
@@ -3922,13 +3930,13 @@ macro_build_jalr (expressionS *ep)
 {
   char *f = NULL;
 
-  if (HAVE_NEWABI)
+  if (MIPS_JALR_HINT_P)
     {
       frag_grow (8);
       f = frag_more (0);
     }
   macro_build (NULL, "jalr", "d,s", RA, PIC_CALL_REG);
-  if (HAVE_NEWABI)
+  if (MIPS_JALR_HINT_P)
     fix_new_exp (frag_now, f - frag_now->fr_literal,
 		 4, ep, FALSE, BFD_RELOC_MIPS_JALR);
 }
Index: src/bfd/elf32-mips.c
===================================================================
--- src.orig/bfd/elf32-mips.c	2009-08-03 17:51:53.358906000 -0700
+++ src/bfd/elf32-mips.c	2009-08-03 17:52:15.074169000 -0700
@@ -1261,6 +1261,7 @@ static const struct elf_reloc_map mips_r
   { BFD_RELOC_MIPS_GOT_PAGE, R_MIPS_GOT_PAGE },
   { BFD_RELOC_MIPS_GOT_OFST, R_MIPS_GOT_OFST },
   { BFD_RELOC_MIPS_GOT_DISP, R_MIPS_GOT_DISP },
+  { BFD_RELOC_MIPS_JALR, R_MIPS_JALR },
   { BFD_RELOC_MIPS_TLS_DTPMOD32, R_MIPS_TLS_DTPMOD32 },
   { BFD_RELOC_MIPS_TLS_DTPREL32, R_MIPS_TLS_DTPREL32 },
   { BFD_RELOC_MIPS_TLS_DTPMOD64, R_MIPS_TLS_DTPMOD64 },
Index: src/bfd/elfxx-mips.c
===================================================================
--- src.orig/bfd/elfxx-mips.c	2009-08-03 17:51:53.412852000 -0700
+++ src/bfd/elfxx-mips.c	2009-08-03 17:53:13.611573000 -0700
@@ -668,6 +668,17 @@ static bfd *reldyn_sorting_bfd;
   (   ((elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH) != E_MIPS_ARCH_1) \
    || ((elf_elfheader (abfd)->e_flags & EF_MIPS_MACH) == E_MIPS_MACH_3900))
 
+/* True if ABFD is for CPUs that are faster if JAL is converted to BAL.
+   This should be safe for all architectures.  We enable this predicate
+   for RM9000 for now.  */
+#define JAL_TO_BAL_P(abfd) \
+  ((elf_elfheader (abfd)->e_flags & EF_MIPS_MACH) == E_MIPS_MACH_9000)
+
+/* True if ABFD is for CPUs that are faster if JALR is converted to BAL.
+   This should be safe for all architectures.  We enable this predicate for
+   all CPUs.  */
+#define JALR_TO_BAL_P(abfd) 1
+
 /* True if ABFD is a PIC object.  */
 #define PIC_OBJECT_P(abfd) \
   ((elf_elfheader (abfd)->e_flags & EF_MIPS_PIC) != 0)
@@ -5590,11 +5601,12 @@ mips_elf_perform_relocation (struct bfd_
      prediction hardware.  If we are linking for the RM9000, and we
      see jal, and bal fits, use it instead.  Note that this
      transformation should be safe for all architectures.  */
-  if (bfd_get_mach (input_bfd) == bfd_mach_mips9000
-      && !info->relocatable
+  if (!info->relocatable
       && !require_jalx
-      && ((r_type == R_MIPS_26 && (x >> 26) == 0x3)	    /* jal addr */
-	  || (r_type == R_MIPS_JALR && x == 0x0320f809)))   /* jalr t9 */
+      && ((JAL_TO_BAL_P (input_bfd)
+	   && (r_type == R_MIPS_26 && (x >> 26) == 0x3))	/* jal addr */
+	  || (JALR_TO_BAL_P (input_bfd) && (r_type == R_MIPS_JALR
+	      && x == 0x0320f809))))	/* jalr t9 */
     {
       bfd_vma addr;
       bfd_vma dest;
Index: src/gas/testsuite/gas/mips/jal-svr4pic.d
===================================================================
--- src.orig/gas/testsuite/gas/mips/jal-svr4pic.d	2009-08-03 17:51:53.210056000 -0700
+++ src/gas/testsuite/gas/mips/jal-svr4pic.d	2009-08-03 17:52:15.130113000 -0700
@@ -26,6 +26,7 @@ Disassembly of section .text:
 0+0034 <[^>]*> addiu	t9,t9,0
 [ 	]*34: R_MIPS_LO16	.text
 0+0038 <[^>]*> jalr	t9
+[ 	]*38: R_MIPS_JALR	.text
 0+003c <[^>]*> nop
 0+0040 <[^>]*> lw	gp,0\(sp\)
 0+0044 <[^>]*> nop
@@ -33,6 +34,7 @@ Disassembly of section .text:
 [ 	]*48: R_MIPS_CALL16	weak_text_label
 0+004c <[^>]*> nop
 0+0050 <[^>]*> jalr	t9
+[ 	]*50: R_MIPS_JALR	weak_text_label
 0+0054 <[^>]*> nop
 0+0058 <[^>]*> lw	gp,0\(sp\)
 0+005c <[^>]*> nop
@@ -40,6 +42,7 @@ Disassembly of section .text:
 [ 	]*60: R_MIPS_CALL16	external_text_label
 0+0064 <[^>]*> nop
 0+0068 <[^>]*> jalr	t9
+[ 	]*68: R_MIPS_JALR	external_text_label
 0+006c <[^>]*> nop
 0+0070 <[^>]*> lw	gp,0\(sp\)
 0+0074 <[^>]*> b	0+0000 <text_label>
Index: src/gas/testsuite/gas/mips/jal-xgot.d
===================================================================
--- src.orig/gas/testsuite/gas/mips/jal-xgot.d	2009-08-03 17:51:53.246022000 -0700
+++ src/gas/testsuite/gas/mips/jal-xgot.d	2009-08-03 17:52:15.135111000 -0700
@@ -27,6 +27,7 @@ Disassembly of section .text:
 0+0034 <[^>]*> addiu	t9,t9,0
 [ 	]*34: R_MIPS_LO16	.text
 0+0038 <[^>]*> jalr	t9
+[ 	]*38: R_MIPS_JALR	.text
 0+003c <[^>]*> nop
 0+0040 <[^>]*> lw	gp,0\(sp\)
 0+0044 <[^>]*> lui	t9,0x0
@@ -36,6 +37,7 @@ Disassembly of section .text:
 [ 	]*4c: R_MIPS_CALL_LO16	weak_text_label
 0+0050 <[^>]*> nop
 0+0054 <[^>]*> jalr	t9
+[ 	]*54: R_MIPS_JALR	weak_text_label
 0+0058 <[^>]*> nop
 0+005c <[^>]*> lw	gp,0\(sp\)
 0+0060 <[^>]*> lui	t9,0x0
@@ -45,6 +47,7 @@ Disassembly of section .text:
 [ 	]*68: R_MIPS_CALL_LO16	external_text_label
 0+006c <[^>]*> nop
 0+0070 <[^>]*> jalr	t9
+[ 	]*70: R_MIPS_JALR	external_text_label
 0+0074 <[^>]*> nop
 0+0078 <[^>]*> lw	gp,0\(sp\)
 0+007c <[^>]*> b	0+0000 <text_label>
Index: src/gas/testsuite/gas/mips/mips-abi32-pic2.d
===================================================================
--- src.orig/gas/testsuite/gas/mips/mips-abi32-pic2.d	2009-08-03 17:51:53.283983000 -0700
+++ src/gas/testsuite/gas/mips/mips-abi32-pic2.d	2009-08-03 17:52:15.140104000 -0700
@@ -16,6 +16,7 @@ Disassembly of section \.text:
 0+014 <[^>]*> 273900cc 	addiu	t9,t9,204
 			14: R_MIPS_LO16	\.text
 0+018 <[^>]*> 0320f809 	jalr	t9
+			18: R_MIPS_JALR	\.text
 0+01c <[^>]*> 00000000 	nop
 0+020 <[^>]*> 8fbc0008 	lw	gp,8\(sp\)
 0+024 <[^>]*> 00000000 	nop
@@ -35,6 +36,7 @@ Disassembly of section \.text:
 0+050 <[^>]*> 273900cc 	addiu	t9,t9,204
 			50: R_MIPS_LO16	\.text
 0+054 <[^>]*> 0320f809 	jalr	t9
+			54: R_MIPS_JALR	\.text
 0+058 <[^>]*> 00000000 	nop
 0+05c <[^>]*> 3c010001 	lui	at,0x1
 0+060 <[^>]*> 003d0821 	addu	at,at,sp
@@ -58,6 +60,7 @@ Disassembly of section \.text:
 0+09c <[^>]*> 273900cc 	addiu	t9,t9,204
 			9c: R_MIPS_LO16	\.text
 0+0a0 <[^>]*> 0320f809 	jalr	t9
+			a0: R_MIPS_JALR	\.text
 0+0a4 <[^>]*> 00000000 	nop
 0+0a8 <[^>]*> 3c010001 	lui	at,0x1
 0+0ac <[^>]*> 003d0821 	addu	at,at,sp





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