Fu, Chao-Ying writes:
+/* True if ABFD is for CPUs that are faster if jal/jalr is
converted to bal.
+ This should be safe for all architectures, but for now
we enable it
+ for RM9000, mips32, mips32r2, mips64, and mips64r2. */
+#define JAL_JALR_TO_BAL_P(abfd) \
+ ( ((elf_elfheader (abfd)->e_flags & EF_MIPS_MACH) ==
E_MIPS_MACH_9000) \
+ || ((elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH) ==
E_MIPS_ARCH_32) \
+ || ((elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH) ==
E_MIPS_ARCH_32R2) \
+ || ((elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH) ==
E_MIPS_ARCH_64) \
+ || ((elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH) ==
E_MIPS_ARCH_64R2))
I think this should be a negative predicate. As you say JALR->BAL
should be a profitable transformation on most CPUs.
Yes. If everyone is ok, we can just set JAL_JALR_TO_BAL_P(abfd) to 1.
(And, fix new test failures due to BAL mismatching.)
Just to be sure, what I said applies to JALR->BAL for Octeon. JAL->BAL is not
necessarily profitable on Octeon but I thought the relaxation code was
performing JALR->BAL or JALR->JAL and not JAL->BAL? Am I missing something
here?