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Re: Reuse of reloc_howto_type depending on section


2009/7/27 Dave Korn <dave.korn.cygwin@googlemail.com>:
> Martin Walter wrote:
>> 2009/7/27 Dave Korn <dave.korn.cygwin@googlemail.com>:
>>> Martin Walter wrote:
>
>>>> What I would like to do is to let relocations be right shifted by an
>>>> additional 1 if the symbol within lo(), hi(), etc. refers to the .text
>>>> section. Currently, all symbols are right shifted by this amount in
>>>> the relocation process (but this is a failure for symbols referring to
>>>> the data memory).
>
>>> ?Would it be simplest to define two different relocations, R_SPEAR32_HI and
>>> R_SPEAR32_HI_TEXT for example, that use different rightshift values, and take
>>> care to emit the correct one according to the symbol section in the assembler
>>> when parsing the lo()/hi()/etc. ?
>
>> I also thought about this solution, but the parse function of the
>> assembler has signature
>> (CGEN_CPU_DESC cd, const char **strp, int opindex, long *valuep) and
>> therefore does not include any information about the section of the
>> symbol.
>
> ?But you don't do it in the parse section anyway. ?Since you're using cgen,
> relocs are generated in md_cgen_lookup_reloc(), where you have access to the
> underlying fixS struct.
>
> ? ?cheers,
> ? ? ?DaveK
>

Of course, you are right. Please take a look at this excerpt from my
md_cgen_lookup_reloc():

bfd_reloc_code_real_type
md_cgen_lookup_reloc(const CGEN_INSN *insn ATTRIBUTE_UNUSED, const
CGEN_OPERAND *operand, fixS *fixP)
{
  bfd_reloc_code_real_type type;
  type = BFD_RELOC_NONE;

  switch (operand->type)
  {
    case SPEAR32_OPERAND_SIMM8:
      fixP->fx_pcrel = 0;

      if (fixP->fx_cgen.opinfo != 0)
        type = fixP->fx_cgen.opinfo;
      break;

      ...

    default:
      break;
  }

  return type;
}

I am not sure where fixP->fx_cgen.opinfo is set, but I assume it is
done by the cgen_parse_address() function within the function that
parses to the SIMM8 operand in the target's .opc file. Currently, the
opinfo field can either hold: BFD_RELOC_SPEAR32_LO,
BFD_RELOC_SPEAR32_HI, BFD_RELOC_SPEAR32_3RD, or BFD_RELOC_SPEAR32_4TH.

If my assumption is true, then I don't see where I could provide, as
an example, either BFD_RELOC_SPEAR32_LO or BFD_RELOC_SPEAR32_LO_TEXT
in the SIMM8 operand's parse function.

Thank you for clarifying this!
Martin


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