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PATCH: Add 256bit vmovntdq, vmovntpd and vmovntps
- From: "H.J. Lu" <hongjiu dot lu at intel dot com>
- To: binutils at sources dot redhat dot com
- Date: Tue, 6 Jan 2009 09:11:58 -0800
- Subject: PATCH: Add 256bit vmovntdq, vmovntpd and vmovntps
- Reply-to: "H.J. Lu" <hjl dot tools at gmail dot com>
Hi,
I am checking in this patch to add 256bit vmovntdq, vmovntpd and
vmovntps.
H.J.
---
Index: gas/testsuite/ChangeLog
===================================================================
--- gas/testsuite/ChangeLog (revision 4858)
+++ gas/testsuite/ChangeLog (working copy)
@@ -1,3 +1,15 @@
+2009-01-06 H.J. Lu <hongjiu.lu@intel.com>
+
+ AVX Programming Reference (December, 2008)
+ * gas/i386/avx.s: Add tests for 256bit vmovntdq, vmovntpd and
+ vmovntps.
+ * gas/i386/x86-64-avx.s: Likewise.
+
+ * gas/i386/avx.d: Updated.
+ * gas/i386/avx-intel.d: Likewise.
+ * gas/i386/x86-64-avx.d: Likewise.
+ * gas/i386/x86-64-avx-intel.d: Likewise.
+
2009-01-05 H.J. Lu <hongjiu.lu@intel.com>
AVX Programming Reference (December, 2008)
Index: gas/testsuite/gas/i386/avx.d
===================================================================
--- gas/testsuite/gas/i386/avx.d (revision 4831)
+++ gas/testsuite/gas/i386/avx.d (working copy)
@@ -259,6 +259,9 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: c4 e2 7d 0e f4 vtestps %ymm4,%ymm6
[ ]*[a-f0-9]+: c4 e2 7d 0e 21 vtestps \(%ecx\),%ymm4
[ ]*[a-f0-9]+: c5 ff f0 21 vlddqu \(%ecx\),%ymm4
+[ ]*[a-f0-9]+: c5 fd e7 21 vmovntdq %ymm4,\(%ecx\)
+[ ]*[a-f0-9]+: c5 fd 2b 21 vmovntpd %ymm4,\(%ecx\)
+[ ]*[a-f0-9]+: c5 fc 2b 21 vmovntps %ymm4,\(%ecx\)
[ ]*[a-f0-9]+: c4 e3 4d 0d d4 07 vblendpd \$0x7,%ymm4,%ymm6,%ymm2
[ ]*[a-f0-9]+: c4 e3 4d 0d 11 07 vblendpd \$0x7,\(%ecx\),%ymm6,%ymm2
[ ]*[a-f0-9]+: c4 e3 4d 0c d4 07 vblendps \$0x7,%ymm4,%ymm6,%ymm2
@@ -1669,6 +1672,12 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: c4 e2 7d 0e 21 vtestps \(%ecx\),%ymm4
[ ]*[a-f0-9]+: c5 ff f0 21 vlddqu \(%ecx\),%ymm4
[ ]*[a-f0-9]+: c5 ff f0 21 vlddqu \(%ecx\),%ymm4
+[ ]*[a-f0-9]+: c5 fd e7 21 vmovntdq %ymm4,\(%ecx\)
+[ ]*[a-f0-9]+: c5 fd e7 21 vmovntdq %ymm4,\(%ecx\)
+[ ]*[a-f0-9]+: c5 fd 2b 21 vmovntpd %ymm4,\(%ecx\)
+[ ]*[a-f0-9]+: c5 fd 2b 21 vmovntpd %ymm4,\(%ecx\)
+[ ]*[a-f0-9]+: c5 fc 2b 21 vmovntps %ymm4,\(%ecx\)
+[ ]*[a-f0-9]+: c5 fc 2b 21 vmovntps %ymm4,\(%ecx\)
[ ]*[a-f0-9]+: c4 e3 4d 0d d4 07 vblendpd \$0x7,%ymm4,%ymm6,%ymm2
[ ]*[a-f0-9]+: c4 e3 4d 0d 11 07 vblendpd \$0x7,\(%ecx\),%ymm6,%ymm2
[ ]*[a-f0-9]+: c4 e3 4d 0d 11 07 vblendpd \$0x7,\(%ecx\),%ymm6,%ymm2
Index: gas/testsuite/gas/i386/avx.s
===================================================================
--- gas/testsuite/gas/i386/avx.s (revision 4831)
+++ gas/testsuite/gas/i386/avx.s (working copy)
@@ -273,6 +273,11 @@ _start:
# Tests for op mem256, ymm
vlddqu (%ecx),%ymm4
+# Tests for op ymm, mem256
+ vmovntdq %ymm4,(%ecx)
+ vmovntpd %ymm4,(%ecx)
+ vmovntps %ymm4,(%ecx)
+
# Tests for op imm8, ymm/mem256, ymm, ymm
vblendpd $7,%ymm4,%ymm6,%ymm2
vblendpd $7,(%ecx),%ymm6,%ymm2
@@ -1809,6 +1814,14 @@ _start:
vlddqu ymm4,YMMWORD PTR [ecx]
vlddqu ymm4,[ecx]
+# Tests for op ymm, mem256
+ vmovntdq YMMWORD PTR [ecx],ymm4
+ vmovntdq [ecx],ymm4
+ vmovntpd YMMWORD PTR [ecx],ymm4
+ vmovntpd [ecx],ymm4
+ vmovntps YMMWORD PTR [ecx],ymm4
+ vmovntps [ecx],ymm4
+
# Tests for op imm8, ymm/mem256, ymm, ymm
vblendpd ymm2,ymm6,ymm4,7
vblendpd ymm2,ymm6,YMMWORD PTR [ecx],7
Index: gas/testsuite/gas/i386/x86-64-avx.d
===================================================================
--- gas/testsuite/gas/i386/x86-64-avx.d (revision 4831)
+++ gas/testsuite/gas/i386/x86-64-avx.d (working copy)
@@ -259,6 +259,9 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: c4 e2 7d 0e f4 vtestps %ymm4,%ymm6
[ ]*[a-f0-9]+: c4 e2 7d 0e 21 vtestps \(%rcx\),%ymm4
[ ]*[a-f0-9]+: c5 ff f0 21 vlddqu \(%rcx\),%ymm4
+[ ]*[a-f0-9]+: c5 fd e7 21 vmovntdq %ymm4,\(%rcx\)
+[ ]*[a-f0-9]+: c5 fd 2b 21 vmovntpd %ymm4,\(%rcx\)
+[ ]*[a-f0-9]+: c5 fc 2b 21 vmovntps %ymm4,\(%rcx\)
[ ]*[a-f0-9]+: c4 e3 4d 0d d4 07 vblendpd \$0x7,%ymm4,%ymm6,%ymm2
[ ]*[a-f0-9]+: c4 e3 4d 0d 11 07 vblendpd \$0x7,\(%rcx\),%ymm6,%ymm2
[ ]*[a-f0-9]+: c4 e3 4d 0c d4 07 vblendps \$0x7,%ymm4,%ymm6,%ymm2
@@ -1200,26 +1203,26 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: c4 43 7d 19 87 99 00 00 00 07 vextractf128 \$0x7,%ymm8,0x99\(%r15\)
[ ]*[a-f0-9]+: c4 43 3d 06 bf 99 00 00 00 07 vperm2f128 \$0x7,0x99\(%r15\),%ymm8,%ymm15
[ ]*[a-f0-9]+: c4 43 1d 4b b7 99 00 00 00 80 vblendvpd %ymm8,0x99\(%r15\),%ymm12,%ymm14
-[ ]*[a-f0-9]+: c5 f8 ae 15 99 00 00 00 vldmxcsr 0x99\(%rip\) # 17bc <_start\+0x17bc>
-[ ]*[a-f0-9]+: c5 79 6f 05 99 00 00 00 vmovdqa 0x99\(%rip\),%xmm8 # 17c4 <_start\+0x17c4>
-[ ]*[a-f0-9]+: c5 79 7f 05 99 00 00 00 vmovdqa %xmm8,0x99\(%rip\) # 17cc <_start\+0x17cc>
-[ ]*[a-f0-9]+: c5 79 7e 05 99 00 00 00 vmovd %xmm8,0x99\(%rip\) # 17d4 <_start\+0x17d4>
-[ ]*[a-f0-9]+: c5 7b 2d 05 99 00 00 00 vcvtsd2si 0x99\(%rip\),%r8d # 17dc <_start\+0x17dc>
-[ ]*[a-f0-9]+: c5 7e e6 05 99 00 00 00 vcvtdq2pd 0x99\(%rip\),%ymm8 # 17e4 <_start\+0x17e4>
-[ ]*[a-f0-9]+: c5 7d 5a 05 99 00 00 00 vcvtpd2psy 0x99\(%rip\),%xmm8 # 17ec <_start\+0x17ec>
-[ ]*[a-f0-9]+: c5 39 e0 3d 99 00 00 00 vpavgb 0x99\(%rip\),%xmm8,%xmm15 # 17f4 <_start\+0x17f4>
-[ ]*[a-f0-9]+: c4 63 79 df 05 99 00 00 00 07 vaeskeygenassist \$0x7,0x99\(%rip\),%xmm8 # 17fe <_start\+0x17fe>
-[ ]*[a-f0-9]+: c4 63 79 14 05 99 00 00 00 07 vpextrb \$0x7,%xmm8,0x99\(%rip\) # 1808 <_start\+0x1808>
-[ ]*[a-f0-9]+: c5 3b 2a 3d 99 00 00 00 vcvtsi2sdl 0x99\(%rip\),%xmm8,%xmm15 # 1810 <_start\+0x1810>
-[ ]*[a-f0-9]+: c4 63 19 4a 35 99 00 00 00 80 vblendvps %xmm8,0x99\(%rip\),%xmm12,%xmm14 # 181a <_start\+0x181a>
-[ ]*[a-f0-9]+: c4 63 39 20 3d 99 00 00 00 07 vpinsrb \$0x7,0x99\(%rip\),%xmm8,%xmm15 # 1824 <_start\+0x1824>
-[ ]*[a-f0-9]+: c5 7d 6f 05 99 00 00 00 vmovdqa 0x99\(%rip\),%ymm8 # 182c <_start\+0x182c>
-[ ]*[a-f0-9]+: c5 7d 7f 05 99 00 00 00 vmovdqa %ymm8,0x99\(%rip\) # 1834 <_start\+0x1834>
-[ ]*[a-f0-9]+: c4 62 3d 0d 3d 99 00 00 00 vpermilpd 0x99\(%rip\),%ymm8,%ymm15 # 183d <_start\+0x183d>
-[ ]*[a-f0-9]+: c4 63 7d 09 05 99 00 00 00 07 vroundpd \$0x7,0x99\(%rip\),%ymm8 # 1847 <_start\+0x1847>
-[ ]*[a-f0-9]+: c4 63 7d 19 05 99 00 00 00 07 vextractf128 \$0x7,%ymm8,0x99\(%rip\) # 1851 <_start\+0x1851>
-[ ]*[a-f0-9]+: c4 63 3d 06 3d 99 00 00 00 07 vperm2f128 \$0x7,0x99\(%rip\),%ymm8,%ymm15 # 185b <_start\+0x185b>
-[ ]*[a-f0-9]+: c4 63 1d 4b 35 99 00 00 00 80 vblendvpd %ymm8,0x99\(%rip\),%ymm12,%ymm14 # 1865 <_start\+0x1865>
+[ ]*[a-f0-9]+: c5 f8 ae 15 99 00 00 00 vldmxcsr 0x99\(%rip\) # 17c8 <_start\+0x17c8>
+[ ]*[a-f0-9]+: c5 79 6f 05 99 00 00 00 vmovdqa 0x99\(%rip\),%xmm8 # 17d0 <_start\+0x17d0>
+[ ]*[a-f0-9]+: c5 79 7f 05 99 00 00 00 vmovdqa %xmm8,0x99\(%rip\) # 17d8 <_start\+0x17d8>
+[ ]*[a-f0-9]+: c5 79 7e 05 99 00 00 00 vmovd %xmm8,0x99\(%rip\) # 17e0 <_start\+0x17e0>
+[ ]*[a-f0-9]+: c5 7b 2d 05 99 00 00 00 vcvtsd2si 0x99\(%rip\),%r8d # 17e8 <_start\+0x17e8>
+[ ]*[a-f0-9]+: c5 7e e6 05 99 00 00 00 vcvtdq2pd 0x99\(%rip\),%ymm8 # 17f0 <_start\+0x17f0>
+[ ]*[a-f0-9]+: c5 7d 5a 05 99 00 00 00 vcvtpd2psy 0x99\(%rip\),%xmm8 # 17f8 <_start\+0x17f8>
+[ ]*[a-f0-9]+: c5 39 e0 3d 99 00 00 00 vpavgb 0x99\(%rip\),%xmm8,%xmm15 # 1800 <_start\+0x1800>
+[ ]*[a-f0-9]+: c4 63 79 df 05 99 00 00 00 07 vaeskeygenassist \$0x7,0x99\(%rip\),%xmm8 # 180a <_start\+0x180a>
+[ ]*[a-f0-9]+: c4 63 79 14 05 99 00 00 00 07 vpextrb \$0x7,%xmm8,0x99\(%rip\) # 1814 <_start\+0x1814>
+[ ]*[a-f0-9]+: c5 3b 2a 3d 99 00 00 00 vcvtsi2sdl 0x99\(%rip\),%xmm8,%xmm15 # 181c <_start\+0x181c>
+[ ]*[a-f0-9]+: c4 63 19 4a 35 99 00 00 00 80 vblendvps %xmm8,0x99\(%rip\),%xmm12,%xmm14 # 1826 <_start\+0x1826>
+[ ]*[a-f0-9]+: c4 63 39 20 3d 99 00 00 00 07 vpinsrb \$0x7,0x99\(%rip\),%xmm8,%xmm15 # 1830 <_start\+0x1830>
+[ ]*[a-f0-9]+: c5 7d 6f 05 99 00 00 00 vmovdqa 0x99\(%rip\),%ymm8 # 1838 <_start\+0x1838>
+[ ]*[a-f0-9]+: c5 7d 7f 05 99 00 00 00 vmovdqa %ymm8,0x99\(%rip\) # 1840 <_start\+0x1840>
+[ ]*[a-f0-9]+: c4 62 3d 0d 3d 99 00 00 00 vpermilpd 0x99\(%rip\),%ymm8,%ymm15 # 1849 <_start\+0x1849>
+[ ]*[a-f0-9]+: c4 63 7d 09 05 99 00 00 00 07 vroundpd \$0x7,0x99\(%rip\),%ymm8 # 1853 <_start\+0x1853>
+[ ]*[a-f0-9]+: c4 63 7d 19 05 99 00 00 00 07 vextractf128 \$0x7,%ymm8,0x99\(%rip\) # 185d <_start\+0x185d>
+[ ]*[a-f0-9]+: c4 63 3d 06 3d 99 00 00 00 07 vperm2f128 \$0x7,0x99\(%rip\),%ymm8,%ymm15 # 1867 <_start\+0x1867>
+[ ]*[a-f0-9]+: c4 63 1d 4b 35 99 00 00 00 80 vblendvpd %ymm8,0x99\(%rip\),%ymm12,%ymm14 # 1871 <_start\+0x1871>
[ ]*[a-f0-9]+: c5 f8 ae 94 24 99 00 00 00 vldmxcsr 0x99\(%rsp\)
[ ]*[a-f0-9]+: c5 79 6f 84 24 99 00 00 00 vmovdqa 0x99\(%rsp\),%xmm8
[ ]*[a-f0-9]+: c5 79 7f 84 24 99 00 00 00 vmovdqa %xmm8,0x99\(%rsp\)
@@ -1821,6 +1824,12 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: c4 e2 7d 0e 21 vtestps \(%rcx\),%ymm4
[ ]*[a-f0-9]+: c5 ff f0 21 vlddqu \(%rcx\),%ymm4
[ ]*[a-f0-9]+: c5 ff f0 21 vlddqu \(%rcx\),%ymm4
+[ ]*[a-f0-9]+: c5 fd e7 21 vmovntdq %ymm4,\(%rcx\)
+[ ]*[a-f0-9]+: c5 fd e7 21 vmovntdq %ymm4,\(%rcx\)
+[ ]*[a-f0-9]+: c5 fd 2b 21 vmovntpd %ymm4,\(%rcx\)
+[ ]*[a-f0-9]+: c5 fd 2b 21 vmovntpd %ymm4,\(%rcx\)
+[ ]*[a-f0-9]+: c5 fc 2b 21 vmovntps %ymm4,\(%rcx\)
+[ ]*[a-f0-9]+: c5 fc 2b 21 vmovntps %ymm4,\(%rcx\)
[ ]*[a-f0-9]+: c4 e3 4d 0d d4 07 vblendpd \$0x7,%ymm4,%ymm6,%ymm2
[ ]*[a-f0-9]+: c4 e3 4d 0d 11 07 vblendpd \$0x7,\(%rcx\),%ymm6,%ymm2
[ ]*[a-f0-9]+: c4 e3 4d 0d 11 07 vblendpd \$0x7,\(%rcx\),%ymm6,%ymm2
@@ -3155,26 +3164,26 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: c4 43 7d 19 87 99 00 00 00 07 vextractf128 \$0x7,%ymm8,0x99\(%r15\)
[ ]*[a-f0-9]+: c4 43 3d 06 bf 99 00 00 00 07 vperm2f128 \$0x7,0x99\(%r15\),%ymm8,%ymm15
[ ]*[a-f0-9]+: c4 43 1d 4b b7 99 00 00 00 80 vblendvpd %ymm8,0x99\(%r15\),%ymm12,%ymm14
-[ ]*[a-f0-9]+: c5 f8 ae 15 99 00 00 00 vldmxcsr 0x99\(%rip\) # 415a <_start\+0x415a>
-[ ]*[a-f0-9]+: c5 79 6f 05 99 00 00 00 vmovdqa 0x99\(%rip\),%xmm8 # 4162 <_start\+0x4162>
-[ ]*[a-f0-9]+: c5 79 7f 05 99 00 00 00 vmovdqa %xmm8,0x99\(%rip\) # 416a <_start\+0x416a>
-[ ]*[a-f0-9]+: c5 79 7e 05 99 00 00 00 vmovd %xmm8,0x99\(%rip\) # 4172 <_start\+0x4172>
-[ ]*[a-f0-9]+: c5 7b 2d 05 99 00 00 00 vcvtsd2si 0x99\(%rip\),%r8d # 417a <_start\+0x417a>
-[ ]*[a-f0-9]+: c5 7e e6 05 99 00 00 00 vcvtdq2pd 0x99\(%rip\),%ymm8 # 4182 <_start\+0x4182>
-[ ]*[a-f0-9]+: c5 7d 5a 05 99 00 00 00 vcvtpd2psy 0x99\(%rip\),%xmm8 # 418a <_start\+0x418a>
-[ ]*[a-f0-9]+: c5 39 e0 3d 99 00 00 00 vpavgb 0x99\(%rip\),%xmm8,%xmm15 # 4192 <_start\+0x4192>
-[ ]*[a-f0-9]+: c4 63 79 df 05 99 00 00 00 07 vaeskeygenassist \$0x7,0x99\(%rip\),%xmm8 # 419c <_start\+0x419c>
-[ ]*[a-f0-9]+: c4 63 79 14 05 99 00 00 00 07 vpextrb \$0x7,%xmm8,0x99\(%rip\) # 41a6 <_start\+0x41a6>
-[ ]*[a-f0-9]+: c5 3b 2a 3d 99 00 00 00 vcvtsi2sdl 0x99\(%rip\),%xmm8,%xmm15 # 41ae <_start\+0x41ae>
-[ ]*[a-f0-9]+: c4 63 19 4a 35 99 00 00 00 80 vblendvps %xmm8,0x99\(%rip\),%xmm12,%xmm14 # 41b8 <_start\+0x41b8>
-[ ]*[a-f0-9]+: c4 63 39 20 3d 99 00 00 00 07 vpinsrb \$0x7,0x99\(%rip\),%xmm8,%xmm15 # 41c2 <_start\+0x41c2>
-[ ]*[a-f0-9]+: c5 7d 6f 05 99 00 00 00 vmovdqa 0x99\(%rip\),%ymm8 # 41ca <_start\+0x41ca>
-[ ]*[a-f0-9]+: c5 7d 7f 05 99 00 00 00 vmovdqa %ymm8,0x99\(%rip\) # 41d2 <_start\+0x41d2>
-[ ]*[a-f0-9]+: c4 62 3d 0d 3d 99 00 00 00 vpermilpd 0x99\(%rip\),%ymm8,%ymm15 # 41db <_start\+0x41db>
-[ ]*[a-f0-9]+: c4 63 7d 09 05 99 00 00 00 07 vroundpd \$0x7,0x99\(%rip\),%ymm8 # 41e5 <_start\+0x41e5>
-[ ]*[a-f0-9]+: c4 63 7d 19 05 99 00 00 00 07 vextractf128 \$0x7,%ymm8,0x99\(%rip\) # 41ef <_start\+0x41ef>
-[ ]*[a-f0-9]+: c4 63 3d 06 3d 99 00 00 00 07 vperm2f128 \$0x7,0x99\(%rip\),%ymm8,%ymm15 # 41f9 <_start\+0x41f9>
-[ ]*[a-f0-9]+: c4 63 1d 4b 35 99 00 00 00 80 vblendvpd %ymm8,0x99\(%rip\),%ymm12,%ymm14 # 4203 <_start\+0x4203>
+[ ]*[a-f0-9]+: c5 f8 ae 15 99 00 00 00 vldmxcsr 0x99\(%rip\) # 417e <_start\+0x417e>
+[ ]*[a-f0-9]+: c5 79 6f 05 99 00 00 00 vmovdqa 0x99\(%rip\),%xmm8 # 4186 <_start\+0x4186>
+[ ]*[a-f0-9]+: c5 79 7f 05 99 00 00 00 vmovdqa %xmm8,0x99\(%rip\) # 418e <_start\+0x418e>
+[ ]*[a-f0-9]+: c5 79 7e 05 99 00 00 00 vmovd %xmm8,0x99\(%rip\) # 4196 <_start\+0x4196>
+[ ]*[a-f0-9]+: c5 7b 2d 05 99 00 00 00 vcvtsd2si 0x99\(%rip\),%r8d # 419e <_start\+0x419e>
+[ ]*[a-f0-9]+: c5 7e e6 05 99 00 00 00 vcvtdq2pd 0x99\(%rip\),%ymm8 # 41a6 <_start\+0x41a6>
+[ ]*[a-f0-9]+: c5 7d 5a 05 99 00 00 00 vcvtpd2psy 0x99\(%rip\),%xmm8 # 41ae <_start\+0x41ae>
+[ ]*[a-f0-9]+: c5 39 e0 3d 99 00 00 00 vpavgb 0x99\(%rip\),%xmm8,%xmm15 # 41b6 <_start\+0x41b6>
+[ ]*[a-f0-9]+: c4 63 79 df 05 99 00 00 00 07 vaeskeygenassist \$0x7,0x99\(%rip\),%xmm8 # 41c0 <_start\+0x41c0>
+[ ]*[a-f0-9]+: c4 63 79 14 05 99 00 00 00 07 vpextrb \$0x7,%xmm8,0x99\(%rip\) # 41ca <_start\+0x41ca>
+[ ]*[a-f0-9]+: c5 3b 2a 3d 99 00 00 00 vcvtsi2sdl 0x99\(%rip\),%xmm8,%xmm15 # 41d2 <_start\+0x41d2>
+[ ]*[a-f0-9]+: c4 63 19 4a 35 99 00 00 00 80 vblendvps %xmm8,0x99\(%rip\),%xmm12,%xmm14 # 41dc <_start\+0x41dc>
+[ ]*[a-f0-9]+: c4 63 39 20 3d 99 00 00 00 07 vpinsrb \$0x7,0x99\(%rip\),%xmm8,%xmm15 # 41e6 <_start\+0x41e6>
+[ ]*[a-f0-9]+: c5 7d 6f 05 99 00 00 00 vmovdqa 0x99\(%rip\),%ymm8 # 41ee <_start\+0x41ee>
+[ ]*[a-f0-9]+: c5 7d 7f 05 99 00 00 00 vmovdqa %ymm8,0x99\(%rip\) # 41f6 <_start\+0x41f6>
+[ ]*[a-f0-9]+: c4 62 3d 0d 3d 99 00 00 00 vpermilpd 0x99\(%rip\),%ymm8,%ymm15 # 41ff <_start\+0x41ff>
+[ ]*[a-f0-9]+: c4 63 7d 09 05 99 00 00 00 07 vroundpd \$0x7,0x99\(%rip\),%ymm8 # 4209 <_start\+0x4209>
+[ ]*[a-f0-9]+: c4 63 7d 19 05 99 00 00 00 07 vextractf128 \$0x7,%ymm8,0x99\(%rip\) # 4213 <_start\+0x4213>
+[ ]*[a-f0-9]+: c4 63 3d 06 3d 99 00 00 00 07 vperm2f128 \$0x7,0x99\(%rip\),%ymm8,%ymm15 # 421d <_start\+0x421d>
+[ ]*[a-f0-9]+: c4 63 1d 4b 35 99 00 00 00 80 vblendvpd %ymm8,0x99\(%rip\),%ymm12,%ymm14 # 4227 <_start\+0x4227>
[ ]*[a-f0-9]+: c5 f8 ae 94 24 99 00 00 00 vldmxcsr 0x99\(%rsp\)
[ ]*[a-f0-9]+: c5 79 6f 84 24 99 00 00 00 vmovdqa 0x99\(%rsp\),%xmm8
[ ]*[a-f0-9]+: c5 79 7f 84 24 99 00 00 00 vmovdqa %xmm8,0x99\(%rsp\)
Index: gas/testsuite/gas/i386/x86-64-avx.s
===================================================================
--- gas/testsuite/gas/i386/x86-64-avx.s (revision 4831)
+++ gas/testsuite/gas/i386/x86-64-avx.s (working copy)
@@ -273,6 +273,11 @@ _start:
# Tests for op mem256, ymm
vlddqu (%rcx),%ymm4
+# Tests for op ymm, mem256
+ vmovntdq %ymm4,(%rcx)
+ vmovntpd %ymm4,(%rcx)
+ vmovntps %ymm4,(%rcx)
+
# Tests for op imm8, ymm/mem256, ymm, ymm
vblendpd $7,%ymm4,%ymm6,%ymm2
vblendpd $7,(%rcx),%ymm6,%ymm2
@@ -1980,6 +1985,14 @@ _start:
vlddqu ymm4,YMMWORD PTR [rcx]
vlddqu ymm4,[rcx]
+# Tests for op ymm, mem256
+ vmovntdq YMMWORD PTR [rcx],ymm4
+ vmovntdq [rcx],ymm4
+ vmovntpd YMMWORD PTR [rcx],ymm4
+ vmovntpd [rcx],ymm4
+ vmovntps YMMWORD PTR [rcx],ymm4
+ vmovntps [rcx],ymm4
+
# Tests for op imm8, ymm/mem256, ymm, ymm
vblendpd ymm2,ymm6,ymm4,7
vblendpd ymm2,ymm6,YMMWORD PTR [rcx],7
Index: gas/testsuite/gas/i386/avx-intel.d
===================================================================
--- gas/testsuite/gas/i386/avx-intel.d (revision 4831)
+++ gas/testsuite/gas/i386/avx-intel.d (working copy)
@@ -260,6 +260,9 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: c4 e2 7d 0e f4 vtestps ymm6,ymm4
[ ]*[a-f0-9]+: c4 e2 7d 0e 21 vtestps ymm4,YMMWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c5 ff f0 21 vlddqu ymm4,\[ecx\]
+[ ]*[a-f0-9]+: c5 fd e7 21 vmovntdq YMMWORD PTR \[ecx\],ymm4
+[ ]*[a-f0-9]+: c5 fd 2b 21 vmovntpd YMMWORD PTR \[ecx\],ymm4
+[ ]*[a-f0-9]+: c5 fc 2b 21 vmovntps YMMWORD PTR \[ecx\],ymm4
[ ]*[a-f0-9]+: c4 e3 4d 0d d4 07 vblendpd ymm2,ymm6,ymm4,0x7
[ ]*[a-f0-9]+: c4 e3 4d 0d 11 07 vblendpd ymm2,ymm6,YMMWORD PTR \[ecx\],0x7
[ ]*[a-f0-9]+: c4 e3 4d 0c d4 07 vblendps ymm2,ymm6,ymm4,0x7
@@ -1670,6 +1673,12 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: c4 e2 7d 0e 21 vtestps ymm4,YMMWORD PTR \[ecx\]
[ ]*[a-f0-9]+: c5 ff f0 21 vlddqu ymm4,\[ecx\]
[ ]*[a-f0-9]+: c5 ff f0 21 vlddqu ymm4,\[ecx\]
+[ ]*[a-f0-9]+: c5 fd e7 21 vmovntdq YMMWORD PTR \[ecx\],ymm4
+[ ]*[a-f0-9]+: c5 fd e7 21 vmovntdq YMMWORD PTR \[ecx\],ymm4
+[ ]*[a-f0-9]+: c5 fd 2b 21 vmovntpd YMMWORD PTR \[ecx\],ymm4
+[ ]*[a-f0-9]+: c5 fd 2b 21 vmovntpd YMMWORD PTR \[ecx\],ymm4
+[ ]*[a-f0-9]+: c5 fc 2b 21 vmovntps YMMWORD PTR \[ecx\],ymm4
+[ ]*[a-f0-9]+: c5 fc 2b 21 vmovntps YMMWORD PTR \[ecx\],ymm4
[ ]*[a-f0-9]+: c4 e3 4d 0d d4 07 vblendpd ymm2,ymm6,ymm4,0x7
[ ]*[a-f0-9]+: c4 e3 4d 0d 11 07 vblendpd ymm2,ymm6,YMMWORD PTR \[ecx\],0x7
[ ]*[a-f0-9]+: c4 e3 4d 0d 11 07 vblendpd ymm2,ymm6,YMMWORD PTR \[ecx\],0x7
Index: gas/testsuite/gas/i386/x86-64-avx-intel.d
===================================================================
--- gas/testsuite/gas/i386/x86-64-avx-intel.d (revision 4831)
+++ gas/testsuite/gas/i386/x86-64-avx-intel.d (working copy)
@@ -260,6 +260,9 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: c4 e2 7d 0e f4 vtestps ymm6,ymm4
[ ]*[a-f0-9]+: c4 e2 7d 0e 21 vtestps ymm4,YMMWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c5 ff f0 21 vlddqu ymm4,\[rcx\]
+[ ]*[a-f0-9]+: c5 fd e7 21 vmovntdq YMMWORD PTR \[rcx\],ymm4
+[ ]*[a-f0-9]+: c5 fd 2b 21 vmovntpd YMMWORD PTR \[rcx\],ymm4
+[ ]*[a-f0-9]+: c5 fc 2b 21 vmovntps YMMWORD PTR \[rcx\],ymm4
[ ]*[a-f0-9]+: c4 e3 4d 0d d4 07 vblendpd ymm2,ymm6,ymm4,0x7
[ ]*[a-f0-9]+: c4 e3 4d 0d 11 07 vblendpd ymm2,ymm6,YMMWORD PTR \[rcx\],0x7
[ ]*[a-f0-9]+: c4 e3 4d 0c d4 07 vblendps ymm2,ymm6,ymm4,0x7
@@ -1201,26 +1204,26 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: c4 43 7d 19 87 99 00 00 00 07 vextractf128 XMMWORD PTR \[r15\+0x99\],ymm8,0x7
[ ]*[a-f0-9]+: c4 43 3d 06 bf 99 00 00 00 07 vperm2f128 ymm15,ymm8,YMMWORD PTR \[r15\+0x99\],0x7
[ ]*[a-f0-9]+: c4 43 1d 4b b7 99 00 00 00 80 vblendvpd ymm14,ymm12,YMMWORD PTR \[r15\+0x99\],ymm8
-[ ]*[a-f0-9]+: c5 f8 ae 15 99 00 00 00 vldmxcsr DWORD PTR \[rip\+0x99\] # 17bc <_start\+0x17bc>
-[ ]*[a-f0-9]+: c5 79 6f 05 99 00 00 00 vmovdqa xmm8,XMMWORD PTR \[rip\+0x99\] # 17c4 <_start\+0x17c4>
-[ ]*[a-f0-9]+: c5 79 7f 05 99 00 00 00 vmovdqa XMMWORD PTR \[rip\+0x99\],xmm8 # 17cc <_start\+0x17cc>
-[ ]*[a-f0-9]+: c5 79 7e 05 99 00 00 00 vmovd DWORD PTR \[rip\+0x99\],xmm8 # 17d4 <_start\+0x17d4>
-[ ]*[a-f0-9]+: c5 7b 2d 05 99 00 00 00 vcvtsd2si r8d,QWORD PTR \[rip\+0x99\] # 17dc <_start\+0x17dc>
-[ ]*[a-f0-9]+: c5 7e e6 05 99 00 00 00 vcvtdq2pd ymm8,XMMWORD PTR \[rip\+0x99\] # 17e4 <_start\+0x17e4>
-[ ]*[a-f0-9]+: c5 7d 5a 05 99 00 00 00 vcvtpd2ps xmm8,YMMWORD PTR \[rip\+0x99\] # 17ec <_start\+0x17ec>
-[ ]*[a-f0-9]+: c5 39 e0 3d 99 00 00 00 vpavgb xmm15,xmm8,XMMWORD PTR \[rip\+0x99\] # 17f4 <_start\+0x17f4>
-[ ]*[a-f0-9]+: c4 63 79 df 05 99 00 00 00 07 vaeskeygenassist xmm8,XMMWORD PTR \[rip\+0x99\],0x7 # 17fe <_start\+0x17fe>
-[ ]*[a-f0-9]+: c4 63 79 14 05 99 00 00 00 07 vpextrb BYTE PTR \[rip\+0x99\],xmm8,0x7 # 1808 <_start\+0x1808>
-[ ]*[a-f0-9]+: c5 3b 2a 3d 99 00 00 00 vcvtsi2sd xmm15,xmm8,DWORD PTR \[rip\+0x99\] # 1810 <_start\+0x1810>
-[ ]*[a-f0-9]+: c4 63 19 4a 35 99 00 00 00 80 vblendvps xmm14,xmm12,XMMWORD PTR \[rip\+0x99\],xmm8 # 181a <_start\+0x181a>
-[ ]*[a-f0-9]+: c4 63 39 20 3d 99 00 00 00 07 vpinsrb xmm15,xmm8,BYTE PTR \[rip\+0x99\],0x7 # 1824 <_start\+0x1824>
-[ ]*[a-f0-9]+: c5 7d 6f 05 99 00 00 00 vmovdqa ymm8,YMMWORD PTR \[rip\+0x99\] # 182c <_start\+0x182c>
-[ ]*[a-f0-9]+: c5 7d 7f 05 99 00 00 00 vmovdqa YMMWORD PTR \[rip\+0x99\],ymm8 # 1834 <_start\+0x1834>
-[ ]*[a-f0-9]+: c4 62 3d 0d 3d 99 00 00 00 vpermilpd ymm15,ymm8,YMMWORD PTR \[rip\+0x99\] # 183d <_start\+0x183d>
-[ ]*[a-f0-9]+: c4 63 7d 09 05 99 00 00 00 07 vroundpd ymm8,YMMWORD PTR \[rip\+0x99\],0x7 # 1847 <_start\+0x1847>
-[ ]*[a-f0-9]+: c4 63 7d 19 05 99 00 00 00 07 vextractf128 XMMWORD PTR \[rip\+0x99\],ymm8,0x7 # 1851 <_start\+0x1851>
-[ ]*[a-f0-9]+: c4 63 3d 06 3d 99 00 00 00 07 vperm2f128 ymm15,ymm8,YMMWORD PTR \[rip\+0x99\],0x7 # 185b <_start\+0x185b>
-[ ]*[a-f0-9]+: c4 63 1d 4b 35 99 00 00 00 80 vblendvpd ymm14,ymm12,YMMWORD PTR \[rip\+0x99\],ymm8 # 1865 <_start\+0x1865>
+[ ]*[a-f0-9]+: c5 f8 ae 15 99 00 00 00 vldmxcsr DWORD PTR \[rip\+0x99\] # 17c8 <_start\+0x17c8>
+[ ]*[a-f0-9]+: c5 79 6f 05 99 00 00 00 vmovdqa xmm8,XMMWORD PTR \[rip\+0x99\] # 17d0 <_start\+0x17d0>
+[ ]*[a-f0-9]+: c5 79 7f 05 99 00 00 00 vmovdqa XMMWORD PTR \[rip\+0x99\],xmm8 # 17d8 <_start\+0x17d8>
+[ ]*[a-f0-9]+: c5 79 7e 05 99 00 00 00 vmovd DWORD PTR \[rip\+0x99\],xmm8 # 17e0 <_start\+0x17e0>
+[ ]*[a-f0-9]+: c5 7b 2d 05 99 00 00 00 vcvtsd2si r8d,QWORD PTR \[rip\+0x99\] # 17e8 <_start\+0x17e8>
+[ ]*[a-f0-9]+: c5 7e e6 05 99 00 00 00 vcvtdq2pd ymm8,XMMWORD PTR \[rip\+0x99\] # 17f0 <_start\+0x17f0>
+[ ]*[a-f0-9]+: c5 7d 5a 05 99 00 00 00 vcvtpd2ps xmm8,YMMWORD PTR \[rip\+0x99\] # 17f8 <_start\+0x17f8>
+[ ]*[a-f0-9]+: c5 39 e0 3d 99 00 00 00 vpavgb xmm15,xmm8,XMMWORD PTR \[rip\+0x99\] # 1800 <_start\+0x1800>
+[ ]*[a-f0-9]+: c4 63 79 df 05 99 00 00 00 07 vaeskeygenassist xmm8,XMMWORD PTR \[rip\+0x99\],0x7 # 180a <_start\+0x180a>
+[ ]*[a-f0-9]+: c4 63 79 14 05 99 00 00 00 07 vpextrb BYTE PTR \[rip\+0x99\],xmm8,0x7 # 1814 <_start\+0x1814>
+[ ]*[a-f0-9]+: c5 3b 2a 3d 99 00 00 00 vcvtsi2sd xmm15,xmm8,DWORD PTR \[rip\+0x99\] # 181c <_start\+0x181c>
+[ ]*[a-f0-9]+: c4 63 19 4a 35 99 00 00 00 80 vblendvps xmm14,xmm12,XMMWORD PTR \[rip\+0x99\],xmm8 # 1826 <_start\+0x1826>
+[ ]*[a-f0-9]+: c4 63 39 20 3d 99 00 00 00 07 vpinsrb xmm15,xmm8,BYTE PTR \[rip\+0x99\],0x7 # 1830 <_start\+0x1830>
+[ ]*[a-f0-9]+: c5 7d 6f 05 99 00 00 00 vmovdqa ymm8,YMMWORD PTR \[rip\+0x99\] # 1838 <_start\+0x1838>
+[ ]*[a-f0-9]+: c5 7d 7f 05 99 00 00 00 vmovdqa YMMWORD PTR \[rip\+0x99\],ymm8 # 1840 <_start\+0x1840>
+[ ]*[a-f0-9]+: c4 62 3d 0d 3d 99 00 00 00 vpermilpd ymm15,ymm8,YMMWORD PTR \[rip\+0x99\] # 1849 <_start\+0x1849>
+[ ]*[a-f0-9]+: c4 63 7d 09 05 99 00 00 00 07 vroundpd ymm8,YMMWORD PTR \[rip\+0x99\],0x7 # 1853 <_start\+0x1853>
+[ ]*[a-f0-9]+: c4 63 7d 19 05 99 00 00 00 07 vextractf128 XMMWORD PTR \[rip\+0x99\],ymm8,0x7 # 185d <_start\+0x185d>
+[ ]*[a-f0-9]+: c4 63 3d 06 3d 99 00 00 00 07 vperm2f128 ymm15,ymm8,YMMWORD PTR \[rip\+0x99\],0x7 # 1867 <_start\+0x1867>
+[ ]*[a-f0-9]+: c4 63 1d 4b 35 99 00 00 00 80 vblendvpd ymm14,ymm12,YMMWORD PTR \[rip\+0x99\],ymm8 # 1871 <_start\+0x1871>
[ ]*[a-f0-9]+: c5 f8 ae 94 24 99 00 00 00 vldmxcsr DWORD PTR \[rsp\+0x99\]
[ ]*[a-f0-9]+: c5 79 6f 84 24 99 00 00 00 vmovdqa xmm8,XMMWORD PTR \[rsp\+0x99\]
[ ]*[a-f0-9]+: c5 79 7f 84 24 99 00 00 00 vmovdqa XMMWORD PTR \[rsp\+0x99\],xmm8
@@ -1822,6 +1825,12 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: c4 e2 7d 0e 21 vtestps ymm4,YMMWORD PTR \[rcx\]
[ ]*[a-f0-9]+: c5 ff f0 21 vlddqu ymm4,\[rcx\]
[ ]*[a-f0-9]+: c5 ff f0 21 vlddqu ymm4,\[rcx\]
+[ ]*[a-f0-9]+: c5 fd e7 21 vmovntdq YMMWORD PTR \[rcx\],ymm4
+[ ]*[a-f0-9]+: c5 fd e7 21 vmovntdq YMMWORD PTR \[rcx\],ymm4
+[ ]*[a-f0-9]+: c5 fd 2b 21 vmovntpd YMMWORD PTR \[rcx\],ymm4
+[ ]*[a-f0-9]+: c5 fd 2b 21 vmovntpd YMMWORD PTR \[rcx\],ymm4
+[ ]*[a-f0-9]+: c5 fc 2b 21 vmovntps YMMWORD PTR \[rcx\],ymm4
+[ ]*[a-f0-9]+: c5 fc 2b 21 vmovntps YMMWORD PTR \[rcx\],ymm4
[ ]*[a-f0-9]+: c4 e3 4d 0d d4 07 vblendpd ymm2,ymm6,ymm4,0x7
[ ]*[a-f0-9]+: c4 e3 4d 0d 11 07 vblendpd ymm2,ymm6,YMMWORD PTR \[rcx\],0x7
[ ]*[a-f0-9]+: c4 e3 4d 0d 11 07 vblendpd ymm2,ymm6,YMMWORD PTR \[rcx\],0x7
@@ -3156,26 +3165,26 @@ Disassembly of section .text:
[ ]*[a-f0-9]+: c4 43 7d 19 87 99 00 00 00 07 vextractf128 XMMWORD PTR \[r15\+0x99\],ymm8,0x7
[ ]*[a-f0-9]+: c4 43 3d 06 bf 99 00 00 00 07 vperm2f128 ymm15,ymm8,YMMWORD PTR \[r15\+0x99\],0x7
[ ]*[a-f0-9]+: c4 43 1d 4b b7 99 00 00 00 80 vblendvpd ymm14,ymm12,YMMWORD PTR \[r15\+0x99\],ymm8
-[ ]*[a-f0-9]+: c5 f8 ae 15 99 00 00 00 vldmxcsr DWORD PTR \[rip\+0x99\] # 415a <_start\+0x415a>
-[ ]*[a-f0-9]+: c5 79 6f 05 99 00 00 00 vmovdqa xmm8,XMMWORD PTR \[rip\+0x99\] # 4162 <_start\+0x4162>
-[ ]*[a-f0-9]+: c5 79 7f 05 99 00 00 00 vmovdqa XMMWORD PTR \[rip\+0x99\],xmm8 # 416a <_start\+0x416a>
-[ ]*[a-f0-9]+: c5 79 7e 05 99 00 00 00 vmovd DWORD PTR \[rip\+0x99\],xmm8 # 4172 <_start\+0x4172>
-[ ]*[a-f0-9]+: c5 7b 2d 05 99 00 00 00 vcvtsd2si r8d,QWORD PTR \[rip\+0x99\] # 417a <_start\+0x417a>
-[ ]*[a-f0-9]+: c5 7e e6 05 99 00 00 00 vcvtdq2pd ymm8,XMMWORD PTR \[rip\+0x99\] # 4182 <_start\+0x4182>
-[ ]*[a-f0-9]+: c5 7d 5a 05 99 00 00 00 vcvtpd2ps xmm8,YMMWORD PTR \[rip\+0x99\] # 418a <_start\+0x418a>
-[ ]*[a-f0-9]+: c5 39 e0 3d 99 00 00 00 vpavgb xmm15,xmm8,XMMWORD PTR \[rip\+0x99\] # 4192 <_start\+0x4192>
-[ ]*[a-f0-9]+: c4 63 79 df 05 99 00 00 00 07 vaeskeygenassist xmm8,XMMWORD PTR \[rip\+0x99\],0x7 # 419c <_start\+0x419c>
-[ ]*[a-f0-9]+: c4 63 79 14 05 99 00 00 00 07 vpextrb BYTE PTR \[rip\+0x99\],xmm8,0x7 # 41a6 <_start\+0x41a6>
-[ ]*[a-f0-9]+: c5 3b 2a 3d 99 00 00 00 vcvtsi2sd xmm15,xmm8,DWORD PTR \[rip\+0x99\] # 41ae <_start\+0x41ae>
-[ ]*[a-f0-9]+: c4 63 19 4a 35 99 00 00 00 80 vblendvps xmm14,xmm12,XMMWORD PTR \[rip\+0x99\],xmm8 # 41b8 <_start\+0x41b8>
-[ ]*[a-f0-9]+: c4 63 39 20 3d 99 00 00 00 07 vpinsrb xmm15,xmm8,BYTE PTR \[rip\+0x99\],0x7 # 41c2 <_start\+0x41c2>
-[ ]*[a-f0-9]+: c5 7d 6f 05 99 00 00 00 vmovdqa ymm8,YMMWORD PTR \[rip\+0x99\] # 41ca <_start\+0x41ca>
-[ ]*[a-f0-9]+: c5 7d 7f 05 99 00 00 00 vmovdqa YMMWORD PTR \[rip\+0x99\],ymm8 # 41d2 <_start\+0x41d2>
-[ ]*[a-f0-9]+: c4 62 3d 0d 3d 99 00 00 00 vpermilpd ymm15,ymm8,YMMWORD PTR \[rip\+0x99\] # 41db <_start\+0x41db>
-[ ]*[a-f0-9]+: c4 63 7d 09 05 99 00 00 00 07 vroundpd ymm8,YMMWORD PTR \[rip\+0x99\],0x7 # 41e5 <_start\+0x41e5>
-[ ]*[a-f0-9]+: c4 63 7d 19 05 99 00 00 00 07 vextractf128 XMMWORD PTR \[rip\+0x99\],ymm8,0x7 # 41ef <_start\+0x41ef>
-[ ]*[a-f0-9]+: c4 63 3d 06 3d 99 00 00 00 07 vperm2f128 ymm15,ymm8,YMMWORD PTR \[rip\+0x99\],0x7 # 41f9 <_start\+0x41f9>
-[ ]*[a-f0-9]+: c4 63 1d 4b 35 99 00 00 00 80 vblendvpd ymm14,ymm12,YMMWORD PTR \[rip\+0x99\],ymm8 # 4203 <_start\+0x4203>
+[ ]*[a-f0-9]+: c5 f8 ae 15 99 00 00 00 vldmxcsr DWORD PTR \[rip\+0x99\] # 417e <_start\+0x417e>
+[ ]*[a-f0-9]+: c5 79 6f 05 99 00 00 00 vmovdqa xmm8,XMMWORD PTR \[rip\+0x99\] # 4186 <_start\+0x4186>
+[ ]*[a-f0-9]+: c5 79 7f 05 99 00 00 00 vmovdqa XMMWORD PTR \[rip\+0x99\],xmm8 # 418e <_start\+0x418e>
+[ ]*[a-f0-9]+: c5 79 7e 05 99 00 00 00 vmovd DWORD PTR \[rip\+0x99\],xmm8 # 4196 <_start\+0x4196>
+[ ]*[a-f0-9]+: c5 7b 2d 05 99 00 00 00 vcvtsd2si r8d,QWORD PTR \[rip\+0x99\] # 419e <_start\+0x419e>
+[ ]*[a-f0-9]+: c5 7e e6 05 99 00 00 00 vcvtdq2pd ymm8,XMMWORD PTR \[rip\+0x99\] # 41a6 <_start\+0x41a6>
+[ ]*[a-f0-9]+: c5 7d 5a 05 99 00 00 00 vcvtpd2ps xmm8,YMMWORD PTR \[rip\+0x99\] # 41ae <_start\+0x41ae>
+[ ]*[a-f0-9]+: c5 39 e0 3d 99 00 00 00 vpavgb xmm15,xmm8,XMMWORD PTR \[rip\+0x99\] # 41b6 <_start\+0x41b6>
+[ ]*[a-f0-9]+: c4 63 79 df 05 99 00 00 00 07 vaeskeygenassist xmm8,XMMWORD PTR \[rip\+0x99\],0x7 # 41c0 <_start\+0x41c0>
+[ ]*[a-f0-9]+: c4 63 79 14 05 99 00 00 00 07 vpextrb BYTE PTR \[rip\+0x99\],xmm8,0x7 # 41ca <_start\+0x41ca>
+[ ]*[a-f0-9]+: c5 3b 2a 3d 99 00 00 00 vcvtsi2sd xmm15,xmm8,DWORD PTR \[rip\+0x99\] # 41d2 <_start\+0x41d2>
+[ ]*[a-f0-9]+: c4 63 19 4a 35 99 00 00 00 80 vblendvps xmm14,xmm12,XMMWORD PTR \[rip\+0x99\],xmm8 # 41dc <_start\+0x41dc>
+[ ]*[a-f0-9]+: c4 63 39 20 3d 99 00 00 00 07 vpinsrb xmm15,xmm8,BYTE PTR \[rip\+0x99\],0x7 # 41e6 <_start\+0x41e6>
+[ ]*[a-f0-9]+: c5 7d 6f 05 99 00 00 00 vmovdqa ymm8,YMMWORD PTR \[rip\+0x99\] # 41ee <_start\+0x41ee>
+[ ]*[a-f0-9]+: c5 7d 7f 05 99 00 00 00 vmovdqa YMMWORD PTR \[rip\+0x99\],ymm8 # 41f6 <_start\+0x41f6>
+[ ]*[a-f0-9]+: c4 62 3d 0d 3d 99 00 00 00 vpermilpd ymm15,ymm8,YMMWORD PTR \[rip\+0x99\] # 41ff <_start\+0x41ff>
+[ ]*[a-f0-9]+: c4 63 7d 09 05 99 00 00 00 07 vroundpd ymm8,YMMWORD PTR \[rip\+0x99\],0x7 # 4209 <_start\+0x4209>
+[ ]*[a-f0-9]+: c4 63 7d 19 05 99 00 00 00 07 vextractf128 XMMWORD PTR \[rip\+0x99\],ymm8,0x7 # 4213 <_start\+0x4213>
+[ ]*[a-f0-9]+: c4 63 3d 06 3d 99 00 00 00 07 vperm2f128 ymm15,ymm8,YMMWORD PTR \[rip\+0x99\],0x7 # 421d <_start\+0x421d>
+[ ]*[a-f0-9]+: c4 63 1d 4b 35 99 00 00 00 80 vblendvpd ymm14,ymm12,YMMWORD PTR \[rip\+0x99\],ymm8 # 4227 <_start\+0x4227>
[ ]*[a-f0-9]+: c5 f8 ae 94 24 99 00 00 00 vldmxcsr DWORD PTR \[rsp\+0x99\]
[ ]*[a-f0-9]+: c5 79 6f 84 24 99 00 00 00 vmovdqa xmm8,XMMWORD PTR \[rsp\+0x99\]
[ ]*[a-f0-9]+: c5 79 7f 84 24 99 00 00 00 vmovdqa XMMWORD PTR \[rsp\+0x99\],xmm8
Index: opcodes/ChangeLog
===================================================================
--- opcodes/ChangeLog (revision 4858)
+++ opcodes/ChangeLog (working copy)
@@ -1,3 +1,16 @@
+2009-01-06 H.J. Lu <hongjiu.lu@intel.com>
+
+ AVX Programming Reference (December, 2008)
+ * i386-dis.c (VEX_LEN_2B_M_0): Removed.
+ (VEX_LEN_E7_P_2_M_0): Likewise.
+ (VEX_LEN_2C_P_1): Updated.
+ (VEX_LEN_E8_P_2): Likewise.
+ (vex_len_table): Remove VEX_LEN_2B_M_0 and VEX_LEN_E7_P_2_M_0.
+ (mod_table): Likewise.
+
+ * i386-opc.tbl: Add 256bit vmovntdq, vmovntpd and vmovntps.
+ * i386-tbl.h: Regenerated.
+
2009-01-05 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (process_copyright): Update for 2009.
Index: opcodes/i386-tbl.h
===================================================================
--- opcodes/i386-tbl.h (revision 4858)
+++ opcodes/i386-tbl.h (working copy)
@@ -21548,6 +21548,18 @@ const template i386_optab[] =
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1, 0, 1, 0, 0, 0 } } } },
+ { "vmovntdq", 2, 0x66e7, None, 1,
+ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+ { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1,
+ 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 1, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
+ { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0 } },
+ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 1, 1, 0, 0, 0 } } } },
{ "vmovntdqa", 2, 0x662a, None, 1,
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -21572,6 +21584,18 @@ const template i386_optab[] =
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1, 0, 1, 0, 0, 0 } } } },
+ { "vmovntpd", 2, 0x662b, None, 1,
+ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+ { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1,
+ 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 1, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
+ { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0 } },
+ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 1, 1, 0, 0, 0 } } } },
{ "vmovntps", 2, 0x2b, None, 1,
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
@@ -21584,6 +21608,18 @@ const template i386_optab[] =
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1, 0, 1, 0, 0, 0 } } } },
+ { "vmovntps", 2, 0x2b, None, 1,
+ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
+ { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1,
+ 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 1, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
+ { { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0 } },
+ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 1, 1, 0, 0, 0 } } } },
{ "vmovq", 2, 0xf37e, None, 1,
{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
Index: opcodes/i386-dis.c
===================================================================
--- opcodes/i386-dis.c (revision 4858)
+++ opcodes/i386-dis.c (working copy)
@@ -1066,8 +1066,7 @@ fetch_data (struct disassemble_info *inf
#define VEX_LEN_17_M_0 (VEX_LEN_16_P_2 + 1)
#define VEX_LEN_2A_P_1 (VEX_LEN_17_M_0 + 1)
#define VEX_LEN_2A_P_3 (VEX_LEN_2A_P_1 + 1)
-#define VEX_LEN_2B_M_0 (VEX_LEN_2A_P_3 + 1)
-#define VEX_LEN_2C_P_1 (VEX_LEN_2B_M_0 + 1)
+#define VEX_LEN_2C_P_1 (VEX_LEN_2A_P_3 + 1)
#define VEX_LEN_2C_P_3 (VEX_LEN_2C_P_1 + 1)
#define VEX_LEN_2D_P_1 (VEX_LEN_2C_P_3 + 1)
#define VEX_LEN_2D_P_3 (VEX_LEN_2D_P_1 + 1)
@@ -1153,8 +1152,7 @@ fetch_data (struct disassemble_info *inf
#define VEX_LEN_E3_P_2 (VEX_LEN_E2_P_2 + 1)
#define VEX_LEN_E4_P_2 (VEX_LEN_E3_P_2 + 1)
#define VEX_LEN_E5_P_2 (VEX_LEN_E4_P_2 + 1)
-#define VEX_LEN_E7_P_2_M_0 (VEX_LEN_E5_P_2 + 1)
-#define VEX_LEN_E8_P_2 (VEX_LEN_E7_P_2_M_0 + 1)
+#define VEX_LEN_E8_P_2 (VEX_LEN_E5_P_2 + 1)
#define VEX_LEN_E9_P_2 (VEX_LEN_E8_P_2 + 1)
#define VEX_LEN_EA_P_2 (VEX_LEN_E9_P_2 + 1)
#define VEX_LEN_EB_P_2 (VEX_LEN_EA_P_2 + 1)
@@ -7971,12 +7969,6 @@ static const struct dis386 vex_len_table
{ "(bad)", { XX } },
},
- /* VEX_LEN_2B_M_0 */
- {
- { "vmovntpX", { Mx, XM } },
- { "(bad)", { XX } },
- },
-
/* VEX_LEN_2C_P_1 */
{
{ "vcvttss2siY", { Gv, EXd } },
@@ -8493,12 +8485,6 @@ static const struct dis386 vex_len_table
{ "(bad)", { XX } },
},
- /* VEX_LEN_E7_P_2_M_0 */
- {
- { "vmovntdq", { Mx, XM } },
- { "(bad)", { XX } },
- },
-
/* VEX_LEN_E8_P_2 */
{
{ "vpsubsb", { XM, Vex128, EXx } },
@@ -9356,7 +9342,7 @@ static const struct dis386 mod_table[][2
},
{
/* MOD_VEX_2B */
- { VEX_LEN_TABLE (VEX_LEN_2B_M_0) },
+ { "vmovntpX", { Mx, XM } },
{ "(bad)", { XX } },
},
{
@@ -9431,7 +9417,7 @@ static const struct dis386 mod_table[][2
},
{
/* MOD_VEX_E7_PREFIX_2 */
- { VEX_LEN_TABLE (VEX_LEN_E7_P_2_M_0) },
+ { "vmovntdq", { Mx, XM } },
{ "(bad)", { XX } },
},
{
Index: opcodes/i386-opc.tbl
===================================================================
--- opcodes/i386-opc.tbl (revision 4858)
+++ opcodes/i386-opc.tbl (working copy)
@@ -2119,9 +2119,12 @@ vmovmskpd, 2, 0x6650, None, 1, CpuAVX, M
vmovmskps, 2, 0x50, None, 1, CpuAVX, Modrm|Vex|Vex0F|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_ldSuf|NoRex64, { RegXMM, Reg32|Reg64 }
vmovmskps, 2, 0x50, None, 1, CpuAVX, Modrm|Vex|Vex0F|Vex256|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_ldSuf|NoRex64, { RegYMM, Reg32|Reg64 }
vmovntdq, 2, 0x66e7, None, 1, CpuAVX, Modrm|Vex|Vex0F|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM, Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S }
+vmovntdq, 2, 0x66e7, None, 1, CpuAVX, Modrm|Vex|Vex0F|Vex256|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegYMM, Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S }
vmovntdqa, 2, 0x662a, None, 1, CpuAVX, Modrm|Vex|Vex0F38|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, RegXMM }
vmovntpd, 2, 0x662b, None, 1, CpuAVX, Modrm|Vex|Vex0F|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM, Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S }
+vmovntpd, 2, 0x662b, None, 1, CpuAVX, Modrm|Vex|Vex0F|Vex256|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegYMM, Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S }
vmovntps, 2, 0x2b, None, 1, CpuAVX, Modrm|Vex|Vex0F|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM, Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S }
+vmovntps, 2, 0x2b, None, 1, CpuAVX, Modrm|Vex|Vex0F|Vex256|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegYMM, Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S }
vmovq, 2, 0xf37e, None, 1, CpuAVX, S|Modrm|Vex|Vex0F|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|NoRex64, { Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
vmovq, 2, 0x66d6, None, 1, CpuAVX, Modrm|Vex|Vex0F|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|NoRex64, { RegXMM, Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM }
vmovq, 2, 0x666e, None, 1, CpuAVX|Cpu64, Modrm|Vex|Vex0F|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Reg64|Qword|Unspecified|BaseIndex|Disp8|Disp32|Disp32S, RegXMM }