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Two new spu features
- From: Alan Modra <amodra at bigpond dot net dot au>
- To: binutils at sourceware dot org
- Date: Thu, 8 May 2008 00:17:47 +0930
- Subject: Two new spu features
1) Support for a special "._ea" section (see spu_elf_relocate_section
comment below for details).
2) Keep embedded image program handles together, and provide
"__spe_handle" symbol to make finding them easy.
bfd/
* elf32-spu.c (spu_elf_special_sections): Add "._ea".
(spu_elf_relocate_section): Handle relocations against symbols
defined in ._ea specially.
binutils/
* embedspu.sh: Take note of R_SPU_PPU32/64 relocs without a symbol,
and if present, put image in ".data.speelf". Put program handle
in ".data.spehandle".
ld/emulparams/
* elf32_spu.sh (OTHER_SECTIONS): Add "._ea".
* elf32ppc.sh: If building with spu support, put ".data.spehandle"
sections at the start of ".data" and provide a symbol to locate
the directory of embedded spe programs.
ld/testsuite/
* ld-spu/ear.s: Align various sections.
* ld-spu/embed.rd: Update.
Index: bfd/elf32-spu.c
===================================================================
RCS file: /cvs/src/src/bfd/elf32-spu.c,v
retrieving revision 1.39
diff -u -p -r1.39 elf32-spu.c
--- bfd/elf32-spu.c 8 Apr 2008 05:48:28 -0000 1.39
+++ bfd/elf32-spu.c 7 May 2008 05:11:49 -0000
@@ -91,6 +91,7 @@ static reloc_howto_type elf_howto_table[
};
static struct bfd_elf_special_section const spu_elf_special_sections[] = {
+ { "._ea", 4, 0, SHT_PROGBITS, SHF_WRITE },
{ ".toe", 4, 0, SHT_NOBITS, SHF_ALLOC },
{ NULL, 0, 0, 0, 0 }
};
@@ -3887,8 +3888,10 @@ spu_elf_relocate_section (bfd *output_bf
struct elf_link_hash_entry **sym_hashes;
Elf_Internal_Rela *rel, *relend;
struct spu_link_hash_table *htab;
+ asection *ea = bfd_get_section_by_name (output_bfd, "._ea");
int ret = TRUE;
bfd_boolean emit_these_relocs = FALSE;
+ bfd_boolean is_ea;
bfd_boolean stubs;
htab = spu_hash_table (info);
@@ -3903,7 +3906,7 @@ spu_elf_relocate_section (bfd *output_bf
{
int r_type;
reloc_howto_type *howto;
- unsigned long r_symndx;
+ unsigned int r_symndx;
Elf_Internal_Sym *sym;
asection *sec;
struct elf_link_hash_entry *h;
@@ -3916,12 +3919,6 @@ spu_elf_relocate_section (bfd *output_bf
r_symndx = ELF32_R_SYM (rel->r_info);
r_type = ELF32_R_TYPE (rel->r_info);
- if (r_type == R_SPU_PPU32 || r_type == R_SPU_PPU64)
- {
- emit_these_relocs = TRUE;
- continue;
- }
-
howto = elf_howto_table + r_type;
unresolved_reloc = FALSE;
warned = FALSE;
@@ -3958,6 +3955,31 @@ spu_elf_relocate_section (bfd *output_bf
if (info->relocatable)
continue;
+ is_ea = (ea != NULL
+ && sec != NULL
+ && sec->output_section == ea);
+ if (r_type == R_SPU_PPU32 || r_type == R_SPU_PPU64)
+ {
+ if (is_ea)
+ {
+ /* ._ea is a special section that isn't allocated in SPU
+ memory, but rather occupies space in PPU memory as
+ part of an embedded ELF image. If this reloc is
+ against a symbol defined in ._ea, then transform the
+ reloc into an equivalent one without a symbol
+ relative to the start of the ELF image. */
+ rel->r_addend += (relocation
+ - ea->vma
+ + elf_section_data (ea)->this_hdr.sh_offset);
+ rel->r_info = ELF32_R_INFO (0, r_type);
+ }
+ emit_these_relocs = TRUE;
+ continue;
+ }
+
+ if (is_ea)
+ unresolved_reloc = TRUE;
+
if (unresolved_reloc)
{
(*_bfd_error_handler)
@@ -4059,7 +4081,6 @@ spu_elf_relocate_section (bfd *output_bf
if (ret
&& emit_these_relocs
- && !info->relocatable
&& !info->emitrelocations)
{
Elf_Internal_Rela *wrel;
Index: binutils/embedspu.sh
===================================================================
RCS file: /cvs/src/src/binutils/embedspu.sh,v
retrieving revision 1.11
diff -u -p -r1.11 embedspu.sh
--- binutils/embedspu.sh 5 Jul 2007 16:54:45 -0000 1.11
+++ binutils/embedspu.sh 7 May 2008 04:41:18 -0000
@@ -138,7 +138,7 @@ main ()
# sections.
# Find all _EAR_ symbols in .toe using readelf, sort by address, and
# write the address of the corresponding PowerPC symbol in a table
- # built in .data.spetoe. For _EAE_ symbols not in .toe, create
+ # built in .data.spetoe. For _EAR_ symbols not in .toe, create
# .reloc commands to relocate their location directly.
# 3. Look for R_SPU_PPU32 and R_SPU_PPU64 relocations in the SPU ELF image
# and create .reloc commands for them.
@@ -202,6 +202,7 @@ $3 ~ /R_SPU_PPU/ { \
print "#else"; \
print " .reloc __speelf__+" strtonum ("0x" $1) + sec_off[rela[sec]] + (substr($3, 10) == "64" ? 4 : 0)", R_PPC_ADDR32, " ($5 != "" ? $5 "+0x" $7 : "__speelf__ + 0x" $4); \
print "#endif"; \
+ if (!has_ea && $5 == "") { print "#define HAS_EA 1"; has_ea = 1; }; \
if (!donedef) { print "#define HAS_RELOCS 1"; donedef = 1; }; \
} \
$3 ~ /unrecognized:/ { \
@@ -210,10 +211,13 @@ $3 ~ /unrecognized:/ { \
print "#else"; \
print " .reloc __speelf__+" strtonum ("0x" $1) + sec_off[rela[sec]] + ($4 == "f" ? 4 : 0)", R_PPC_ADDR32, " ($6 != "" ? $6 "+0x" $8 : "__speelf__ + 0x" $5); \
print "#endif"; \
+ if (!has_ea && $5 == "") { print "#define HAS_EA 1"; has_ea = 1; }; \
if (!donedef) { print "#define HAS_RELOCS 1"; donedef = 1; }; \
} \
'`
-#if defined (HAS_RELOCS) && (defined (__PIC__) || defined (__PIE__))
+#ifdef HAS_EA
+ .section .data.speelf,"aw",@progbits
+#elif defined (HAS_RELOCS) && (defined (__PIC__) || defined (__PIE__))
.section .data.rel.ro.speelf,"a",@progbits
#else
.section .rodata.speelf,"a",@progbits
@@ -222,7 +226,7 @@ $3 ~ /unrecognized:/ { \
__speelf__:
.incbin "${INFILE}"
- .section .data,"aw",@progbits
+ .section .data.spehandle,"aw",@progbits
.globl ${SYMBOL}
.type ${SYMBOL}, @object
# fill in a struct spe_program_handle
Index: ld/emulparams/elf32_spu.sh
===================================================================
RCS file: /cvs/src/src/ld/emulparams/elf32_spu.sh,v
retrieving revision 1.3
diff -u -p -r1.3 elf32_spu.sh
--- ld/emulparams/elf32_spu.sh 20 Jun 2007 00:28:44 -0000 1.3
+++ ld/emulparams/elf32_spu.sh 7 May 2008 04:41:38 -0000
@@ -17,4 +17,5 @@ EMBEDDED=true
MAXPAGESIZE=0x80
DATA_ADDR="ALIGN(${MAXPAGESIZE})"
OTHER_BSS_SECTIONS=".toe ALIGN(128) : { *(.toe) } = 0"
-OTHER_SECTIONS=".note.spu_name 0 : { KEEP(*(.note.spu_name)) }"
+OTHER_SECTIONS=".note.spu_name 0 : { KEEP(*(.note.spu_name)) }
+ ._ea 0 : { KEEP(*(._ea)) }"
Index: ld/emulparams/elf32ppc.sh
===================================================================
RCS file: /cvs/src/src/ld/emulparams/elf32ppc.sh,v
retrieving revision 1.20
diff -u -p -r1.20 elf32ppc.sh
--- ld/emulparams/elf32ppc.sh 27 Apr 2007 00:09:31 -0000 1.20
+++ ld/emulparams/elf32ppc.sh 7 May 2008 04:41:38 -0000
@@ -14,3 +14,11 @@ PLT=".plt ${RELOCATING-0} : SPE
GOTPLT="${PLT}"
OTHER_TEXT_SECTIONS="*(.glink)"
EXTRA_EM_FILE=ppc32elf
+if grep -q 'ld_elf32_spu_emulation' ldemul-list.h; then
+# crt1.o defines data_start and __data_start. Keep them first.
+# Next put all the .data.spehandle sections, with a trailing zero word.
+ DATA_START_SYMBOLS="${RELOCATING+*crt1.o(.data .data.* .gnu.linkonce.d.*)
+ PROVIDE (__spe_handle = .);
+ *(.data.spehandle)
+ . += 4 * (DEFINED (__spe_handle) || . != 0);}"
+fi
Index: ld/testsuite/ld-spu/ear.s
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-spu/ear.s,v
retrieving revision 1.1
diff -u -p -r1.1 ear.s
--- ld/testsuite/ld-spu/ear.s 27 Mar 2007 08:36:27 -0000 1.1
+++ ld/testsuite/ld-spu/ear.s 7 May 2008 04:41:40 -0000
@@ -5,6 +5,7 @@ _start:
#test old-style toe _EAR_ syms
.section .toe,"a",@nobits
+ .p2align 4
_EAR_:
.space 16
_EAR_bar:
@@ -12,6 +13,7 @@ _EAR_bar:
#test new-style _EAR_ syms
.data
+ .p2align 4
_EAR_main:
.space 16
@@ -21,5 +23,6 @@ _EAR_foo:
.space 16
.section .data.blah,"aw",@progbits
+ .p2align 4
_EAR_blah:
.space 16
Index: ld/testsuite/ld-spu/embed.rd
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-spu/embed.rd,v
retrieving revision 1.1
diff -u -p -r1.1 embed.rd
--- ld/testsuite/ld-spu/embed.rd 27 Mar 2007 08:36:27 -0000 1.1
+++ ld/testsuite/ld-spu/embed.rd 7 May 2008 04:41:40 -0000
@@ -1,16 +1,16 @@
Relocation section '\.rela\.rodata\.speelf' at .* contains 3 entries:
- Offset Info Type Sym\. Value Symbol's Name \+ Addend
-00000184 00000601 R_PPC_ADDR32 00000000 main \+ 0
-000001a4 00000901 R_PPC_ADDR32 00000000 foo \+ 0
-000001b4 00000701 R_PPC_ADDR32 00000000 blah \+ 0
-
-Relocation section '\.rela\.data' at .* contains 2 entries:
- Offset Info Type Sym\. Value Symbol's Name \+ Addend
-00000004 00000201 R_PPC_ADDR32 00000000 \.rodata\.speelf \+ 0
-00000008 00000401 R_PPC_ADDR32 00000000 \.data\.spetoe \+ 0
+ Offset +Info +Type +Sym\. Value +Symbol's Name \+ Addend
+0+184 .* R_PPC_ADDR32 +0+0 +main \+ 0
+0+1a4 .* R_PPC_ADDR32 +0+0 +foo \+ 0
+0+1b4 .* R_PPC_ADDR32 +0+0 +blah \+ 0
Relocation section '\.rela\.data\.spetoe' at .* contains 2 entries:
- Offset Info Type Sym\. Value Symbol's Name \+ Addend
-00000004 00000201 R_PPC_ADDR32 00000000 \.rodata\.speelf \+ 0
-00000014 00000a01 R_PPC_ADDR32 00000000 bar \+ 0
+ Offset +Info +Type +Sym\. Value +Symbol's Name \+ Addend
+0+004 .* R_PPC_ADDR32 +0+0 +\.rodata\.speelf \+ 0
+0+014 .* R_PPC_ADDR32 +0+0 +bar \+ 0
+
+Relocation section '\.rela\.data\.spehandle' at .* contains 2 entries:
+ Offset +Info +Type +Sym\. Value +Symbol's Name \+ Addend
+0+004 .* R_PPC_ADDR32 +0+0 +\.rodata\.speelf \+ 0
+0+008 .* R_PPC_ADDR32 +0+0 +\.data\.spetoe \+ 0
--
Alan Modra
Australia Development Lab, IBM