PATCH: update ia64 (ar.ruc)

[Tristan Gingold <gingold at adacore dot com>]

Hi,

with the recently released latest itanium processor (Montvale), a new  
register was defined: ar.ruc.

This patch updates the assembler, the disassembler and the  
dependencies table according to the latest
Intel specification (248699-011).

Tristan.

gas:
2007-11-13  Tristan Gingold  <gingold@adacore.com>

	* config/tc-ia64.c (AR_RUC): Defined.
	(ar): "ar.ruc" added.
	(specify_resource): Register ar.ruc behaves like ar.itc (ie reading
	or writing depends on psr).

gas/testsuite:
2007-11-13  Tristan Gingold  <gingold@adacore.com>

	* gas/ia64/regs.s: More ar registers added.
	* gas/ia64/regs.d: Update expected results.

opcodes:
2007-11-13  Tristan Gingold  <gingold@adacore.com>

	* ia64-dis.c (print_insn_ia64): Generate symbolic names for
	ar.fcr, ar.eflag, ar.csd, ar.ssd, ar.cflg, ar.fsr, ar.fir, ar.fdr
	and ar.ruc.
	* ia64-gen.c (lookup_regindex): Handle ar.ruc.
	* ia64-ic.tbl: Add entries for mov-from-AR-RUC and mov-to-AR-RUC.
	* ia64-raw.tbl: Update to latest Itanium2 specification (ar.ruc)
	* ia64-waw.tbl: Likewise.
	* ia64-asmtab.c: Regenerated.

Attachment: ruc.diff
Description: Binary data