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PATCH: Add SMX instructions
- From: "H.J. Lu" <hjl at lucon dot org>
- To: binutils at sources dot redhat dot com
- Date: Fri, 5 Oct 2007 12:01:48 -0700
- Subject: PATCH: Add SMX instructions
I am checking in this patch to add SMX instructions.
H.J.
----
gas/testsuite/
2007-10-05 H.J. Lu <hongjiu.lu@intel.com>
* gas/i386/i386.exp: Run smx.
* gas/i386/smx.d: New.
* gas/i386/smx.s: Likewise.
opcodes/
2007-10-05 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (dis386_twobyte): Add getsec.
* i386-gen.c (cpu_flags): Add CpuSMX.
* i386-opc.h (CpuSMX): New.
(CpuSSSE3): Updated.
(i386_cpu_flags): Add cpusmx.
* i386-opc.tbl: Add getsec.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
--- binutils/gas/testsuite/gas/i386/i386.exp.smx 2007-09-27 14:34:59.000000000 -0700
+++ binutils/gas/testsuite/gas/i386/i386.exp 2007-10-05 11:45:14.000000000 -0700
@@ -48,6 +48,7 @@ if [expr ([istarget "i*86-*-*"] || [ist
run_dump_test "sib"
run_dump_test "sib-intel"
run_dump_test "vmx"
+ run_dump_test "smx"
run_dump_test "suffix"
run_dump_test "immed32"
run_dump_test "equ"
--- binutils/gas/testsuite/gas/i386/smx.d.smx 2007-10-05 11:45:00.000000000 -0700
+++ binutils/gas/testsuite/gas/i386/smx.d 2007-10-05 11:54:38.000000000 -0700
@@ -0,0 +1,10 @@
+#objdump: -dw
+#name: i386 SMX
+
+.*: +file format .*
+
+Disassembly of section .text:
+
+0+000 <foo>:
+[ ]*[a-f0-9]+: 0f 37 getsec
+#pass
--- binutils/gas/testsuite/gas/i386/smx.s.smx 2007-10-05 11:45:02.000000000 -0700
+++ binutils/gas/testsuite/gas/i386/smx.s 2007-10-05 11:47:25.000000000 -0700
@@ -0,0 +1,5 @@
+# SMX Instructions
+
+ .text
+foo:
+ getsec
--- binutils/opcodes/i386-dis.c.smx 2007-10-05 11:37:29.000000000 -0700
+++ binutils/opcodes/i386-dis.c 2007-10-05 11:49:14.000000000 -0700
@@ -1075,7 +1075,7 @@ static const struct dis386 dis386_twobyt
{ "sysenter", { XX } },
{ "sysexit", { XX } },
{ "(bad)", { XX } },
- { "(bad)", { XX } },
+ { "getsec", { XX } },
/* 38 */
{ THREE_BYTE_TABLE (THREE_BYTE_0F38) },
{ "(bad)", { XX } },
--- binutils/opcodes/i386-gen.c.smx 2007-09-26 09:51:24.000000000 -0700
+++ binutils/opcodes/i386-gen.c 2007-10-05 11:42:03.000000000 -0700
@@ -239,6 +239,7 @@ static bitfield cpu_flags[] =
BITFIELD (CpuPadLock),
BITFIELD (CpuSVME),
BITFIELD (CpuVMX),
+ BITFIELD (CpuSMX),
BITFIELD (CpuABM),
BITFIELD (CpuLM),
BITFIELD (Cpu64),
--- binutils/opcodes/i386-opc.h.smx 2007-09-26 09:51:24.000000000 -0700
+++ binutils/opcodes/i386-opc.h 2007-10-05 11:41:36.000000000 -0700
@@ -68,8 +68,10 @@
#define CpuSVME (CpuPadLock + 1)
/* VMX Instructions required */
#define CpuVMX (CpuSVME + 1)
+/* SMX Instructions required */
+#define CpuSMX (CpuVMX + 1)
/* SSSE3 support required */
-#define CpuSSSE3 (CpuVMX + 1)
+#define CpuSSSE3 (CpuSMX + 1)
/* SSE4a support required */
#define CpuSSE4a (CpuSSSE3 + 1)
/* ABM New Instructions required */
@@ -123,6 +125,7 @@ typedef union i386_cpu_flags
unsigned int cpupadlock:1;
unsigned int cpusvme:1;
unsigned int cpuvmx:1;
+ unsigned int cpusmx:1;
unsigned int cpussse3:1;
unsigned int cpusse4a:1;
unsigned int cpuabm:1;
--- binutils/opcodes/i386-opc.tbl.smx 2007-10-03 12:24:20.000000000 -0700
+++ binutils/opcodes/i386-opc.tbl 2007-10-05 11:40:46.000000000 -0700
@@ -1308,6 +1308,7 @@ mwait, 2, 0xf01, 0xc9, 2, CpuSSE3|CpuNo6
mwait, 2, 0xf01, 0xc9, 2, CpuSSE3|Cpu64, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|ImmExt|NoRex64, { Reg64, Reg64 }
// VMX instructions.
+
vmcall, 0, 0xf01, 0xc1, 2, CpuVMX, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|ImmExt, { 0 }
vmclear, 1, 0x660fc7, 0x6, 2, CpuVMX, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|NoRex64, { BaseIndex|Disp8|Disp16|Disp32|Disp32S }
vmlaunch, 0, 0xf01, 0xc2, 2, CpuVMX, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|ImmExt, { 0 }
@@ -1321,6 +1322,10 @@ vmwrite, 2, 0xf79, None, 2, CpuVMX|Cpu64
vmxoff, 0, 0xf01, 0xc4, 2, CpuVMX, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|ImmExt, { 0 }
vmxon, 1, 0xf30fc7, 0x6, 2, CpuVMX, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf|NoRex64, { BaseIndex|Disp8|Disp16|Disp32|Disp32S }
+// SMX instructions.
+
+getsec, 0, 0xf37, None, 2, CpuSMX, No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf, { 0 }
+
// SSSE3 instructions.
phaddw, 2, 0xf3801, None, 3, CpuSSSE3, Modrm|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_xSuf, { BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegMMX, RegMMX }