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PATCH: Use QA16WORD for punpcklxxx in x86 Intel mode disassembler

On Sat, Jul 28, 2007 at 05:32:55PM -0700, Christian Ludloff wrote:
> H.J.,
> 
> > > > Did you try load punpcklxxx from 8byte aligned, not 16byte aligned
> > > > memory?
> > >
> > > What for?
> > >
> > > (That merely causes the expected GP(0), due to lack of 128-bit alignment.)
> > 
> > That is one difference between m64 and m128.
> 
> Sure. And that 128-bit alignment requirement will start to disappear later
> this year, when AMD's Barcelona introduces misaligned SSE support.
> 
> > That is why punpcklxxx has m128, not m64.
> 
> Not really.
> 
> PUNPCKL merely got lumped into the m128 category for convenience; however,
> it was immediately implemented differently from the rest of SSE2 -- the P4
> only accesses the low 64 bits, not the full 128 bits.
> 
> The 128-bit alignment requirement/check is but a relict of the days when a
> processor had to split 128-bit accesses into two 64-bit chunks (and didn't
> want to cope with further splitting to handle misalignment).
> 

We can't say punpcklxxx takes m64 as long as some processors only
work with 16byte alignment. "XMMWORD PTR" isn't right either since
only 8 bytes are loaded. I invented QA16WORD. Any comments?

Thanks.


H.J.
---
gas/

2007-07-29  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (intel_get_token): Accept QA16WORD as an
	alias of QWORD.

gas/testsuite/

2007-07-29  H.J. Lu  <hongjiu.lu@intel.com>

	* gas/i386/simd-intel.d: Updated.
	* gas/i386/simd.d: Likewise.
	* gas/i386/x86-64-simd-intel.d: Likewise.
	* gas/i386/x86-64-simd.d: Likewise.

opcodes/

2007-07-29  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-dis.c (EMx): Removed.
	(EMqa16): New.
	(qa16_mode): Likewise.
	(prefix_user_table): Replace EMx with EMqa16.
	(intel_operand_size): Print "QA16WORD PTR" for qa16_mode.

--- binutils/gas/config/tc-i386.c.foo	2007-07-23 21:03:24.000000000 -0700
+++ binutils/gas/config/tc-i386.c	2007-07-29 07:28:23.000000000 -0700
@@ -6532,7 +6532,8 @@ tc_gen_reloc (section, fixp)
 
     constant		digits [[ radixOverride ]]
 
-    dataType		BYTE | WORD | DWORD | FWORD | QWORD | TBYTE | OWORD | XMMWORD
+    dataType		BYTE | WORD | DWORD | FWORD | QWORD | QA16WORD
+			| TBYTE | OWORD | XMMWORD
 
     digits		decdigit
 			| digits decdigit
@@ -6645,6 +6646,7 @@ tc_gen_reloc (section, fixp)
 		| DWORD
 		| FWORD
 		| QWORD
+		| QA16WORD
 		| TBYTE
 		| OWORD
 		| XMMWORD
@@ -7261,6 +7263,7 @@ intel_e10 (void)
 	| DWORD
 	| FWORD
 	| QWORD
+	| QA16WORD
 	| TBYTE
 	| OWORD
 	| XMMWORD
@@ -7444,6 +7447,7 @@ intel_e11 (void)
 	    | DWORD
 	    | FWORD
 	    | QWORD
+	    | QA16WORD
 	    | TBYTE
 	    | OWORD
 	    | XMMWORD  */
@@ -7707,7 +7711,8 @@ intel_get_token (void)
 	  else if (strcasecmp (new_token.str, "FWORD") == 0)
 	    new_token.code = T_FWORD;
 
-	  else if (strcasecmp (new_token.str, "QWORD") == 0)
+	  else if (strcasecmp (new_token.str, "QWORD") == 0
+		   || strcasecmp (new_token.str, "QA16WORD") == 0)
 	    new_token.code = T_QWORD;
 
 	  else if (strcasecmp (new_token.str, "TBYTE") == 0
--- binutils/gas/testsuite/gas/i386/simd-intel.d.foo	2007-07-28 16:36:03.000000000 -0700
+++ binutils/gas/testsuite/gas/i386/simd-intel.d	2007-07-29 07:47:23.000000000 -0700
@@ -33,9 +33,9 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	0f 60 0d 78 56 34 12 	punpcklbw mm1,DWORD PTR ds:0x12345678
 [ 	]*[a-f0-9]+:	0f 62 0d 78 56 34 12 	punpckldq mm1,DWORD PTR ds:0x12345678
 [ 	]*[a-f0-9]+:	0f 61 0d 78 56 34 12 	punpcklwd mm1,DWORD PTR ds:0x12345678
-[ 	]*[a-f0-9]+:	66 0f 60 0d 78 56 34 12 	punpcklbw xmm1,XMMWORD PTR ds:0x12345678
-[ 	]*[a-f0-9]+:	66 0f 62 0d 78 56 34 12 	punpckldq xmm1,XMMWORD PTR ds:0x12345678
-[ 	]*[a-f0-9]+:	66 0f 61 0d 78 56 34 12 	punpcklwd xmm1,XMMWORD PTR ds:0x12345678
+[ 	]*[a-f0-9]+:	66 0f 60 0d 78 56 34 12 	punpcklbw xmm1,QA16WORD PTR ds:0x12345678
+[ 	]*[a-f0-9]+:	66 0f 62 0d 78 56 34 12 	punpckldq xmm1,QA16WORD PTR ds:0x12345678
+[ 	]*[a-f0-9]+:	66 0f 61 0d 78 56 34 12 	punpcklwd xmm1,QA16WORD PTR ds:0x12345678
 [ 	]*[a-f0-9]+:	66 0f 6c 0d 78 56 34 12 	punpcklqdq xmm1,XMMWORD PTR ds:0x12345678
 [ 	]*[a-f0-9]+:	66 0f 2e 0d 78 56 34 12 	ucomisd xmm1,QWORD PTR ds:0x12345678
 [ 	]*[a-f0-9]+:	0f 2e 0d 78 56 34 12 	ucomiss xmm1,DWORD PTR ds:0x12345678
--- binutils/gas/testsuite/gas/i386/x86-64-simd-intel.d.foo	2007-07-28 16:36:03.000000000 -0700
+++ binutils/gas/testsuite/gas/i386/x86-64-simd-intel.d	2007-07-29 07:49:43.000000000 -0700
@@ -35,9 +35,9 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	0f 60 0d 78 56 34 12 	punpcklbw mm1,DWORD PTR \[rip\+0x12345678\][ 	]*(#.*)?
 [ 	]*[a-f0-9]+:	0f 62 0d 78 56 34 12 	punpckldq mm1,DWORD PTR \[rip\+0x12345678\][ 	]*(#.*)?
 [ 	]*[a-f0-9]+:	0f 61 0d 78 56 34 12 	punpcklwd mm1,DWORD PTR \[rip\+0x12345678\][ 	]*(#.*)?
-[ 	]*[a-f0-9]+:	66 0f 60 0d 78 56 34 12 	punpcklbw xmm1,XMMWORD PTR \[rip\+0x12345678\][ 	]*(#.*)?
-[ 	]*[a-f0-9]+:	66 0f 62 0d 78 56 34 12 	punpckldq xmm1,XMMWORD PTR \[rip\+0x12345678\][ 	]*(#.*)?
-[ 	]*[a-f0-9]+:	66 0f 61 0d 78 56 34 12 	punpcklwd xmm1,XMMWORD PTR \[rip\+0x12345678\][ 	]*(#.*)?
+[ 	]*[a-f0-9]+:	66 0f 60 0d 78 56 34 12 	punpcklbw xmm1,QA16WORD PTR \[rip\+0x12345678\][ 	]*(#.*)?
+[ 	]*[a-f0-9]+:	66 0f 62 0d 78 56 34 12 	punpckldq xmm1,QA16WORD PTR \[rip\+0x12345678\][ 	]*(#.*)?
+[ 	]*[a-f0-9]+:	66 0f 61 0d 78 56 34 12 	punpcklwd xmm1,QA16WORD PTR \[rip\+0x12345678\][ 	]*(#.*)?
 [ 	]*[a-f0-9]+:	66 0f 6c 0d 78 56 34 12 	punpcklqdq xmm1,XMMWORD PTR \[rip\+0x12345678\][ 	]*(#.*)?
 [ 	]*[a-f0-9]+:	66 0f 2e 0d 78 56 34 12 	ucomisd xmm1,QWORD PTR \[rip\+0x12345678\][ 	]*(#.*)?
 [ 	]*[a-f0-9]+:	0f 2e 0d 78 56 34 12 	ucomiss xmm1,DWORD PTR \[rip\+0x12345678\][ 	]*(#.*)?
--- binutils/opcodes/i386-dis.c.foo	2007-07-28 16:36:03.000000000 -0700
+++ binutils/opcodes/i386-dis.c	2007-07-29 07:43:34.000000000 -0700
@@ -310,7 +310,7 @@ fetch_data (struct disassemble_info *inf
 #define XM { OP_XMM, 0 }
 #define EM { OP_EM, v_mode }
 #define EMd { OP_EM, d_mode }
-#define EMx { OP_EM, x_mode }
+#define EMqa16 { OP_EM, qa16_mode }
 #define EXd { OP_EX, d_mode }
 #define EXq { OP_EX, q_mode }
 #define EXx { OP_EX, x_mode }
@@ -360,6 +360,7 @@ fetch_data (struct disassemble_info *inf
 #define o_mode 17  /* 16-byte operand */
 #define dqb_mode 18 /* registers like dq_mode, memory like b_mode.  */
 #define dqd_mode 19 /* registers like dq_mode, memory like d_mode.  */
+#define qa16_mode 20  /* quad word operand with 16byte aligment */
 
 #define es_reg 100
 #define cs_reg 101
@@ -2569,7 +2570,7 @@ static const struct dis386 prefix_user_t
   {
     { "punpcklbw",{ MX, EMd } },
     { "(bad)",	{ XX } },
-    { "punpcklbw",{ MX, EMx } },
+    { "punpcklbw",{ MX, EMqa16 } },
     { "(bad)",	{ XX } },
   },
 
@@ -2577,7 +2578,7 @@ static const struct dis386 prefix_user_t
   {
     { "punpcklwd",{ MX, EMd } },
     { "(bad)",	{ XX } },
-    { "punpcklwd",{ MX, EMx } },
+    { "punpcklwd",{ MX, EMqa16 } },
     { "(bad)",	{ XX } },
   },
 
@@ -2585,7 +2586,7 @@ static const struct dis386 prefix_user_t
   {
     { "punpckldq",{ MX, EMd } },
     { "(bad)",	{ XX } },
-    { "punpckldq",{ MX, EMx } },
+    { "punpckldq",{ MX, EMqa16 } },
     { "(bad)",	{ XX } },
   },
 };
@@ -4772,6 +4773,9 @@ intel_operand_size (int bytemode, int si
     case q_mode:
       oappend ("QWORD PTR ");
       break;
+    case qa16_mode:
+      oappend ("QA16WORD PTR ");
+      break;
     case m_mode:
       if (address_mode == mode_64bit)
 	oappend ("QWORD PTR ");
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