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[PATCH-ARM] Disassemble arm state to unified syntax
- From: Richard Earnshaw <Richard dot Earnshaw at buzzard dot freeserve dot co dot uk>
- To: Binutils mailing list <binutils at sourceware dot org>
- Date: Sat, 21 Apr 2007 20:49:50 +0100
- Subject: [PATCH-ARM] Disassemble arm state to unified syntax
This patch changes the way we disassemble arm instructions to use the
new unified syntax that is now recommended by ARM.
opcodes:
2007-04-21 Richard Earnshaw <rearnsha@arm.com>
* arm-dis.c (arm_opcodes): Disassemble to unified syntax.
(thumb_opcodes): Add missing white space in adr.
(arm_decode_shift): New parameter, print_shift. Only decode the
shift parameter if set. Adjust callers.
(print_insn_arm): Support for operand type q with no shift decode.
gas/testsuite:
2007-04-21 Richard Earnshaw <rearnsha@arm.com>
* gas/arm/arch4t.d: Convert to unified syntax.
* gas/arm/archv6.d: Likewise.
* gas/arm/archv6t2.d: Likewise.
* gas/arm/arch3.d: Likewise.
* gas/arm/arch7dm.d: Likewise.
* gas/arm/arch7t.d: Likewise.
* gas/arm/archv1.d: Likewise.
* gas/arm/copro.d: Likewise.
* gas/arm/inst.d: Likewise.
* gas/arm/macro1.d: Likewise.
* gas/arm/tcompat.d: Likewise.
* gas/arm/wince_inst.d: Likewise.
* gas/arm/xscale.d: Likewise.
* gas/arm/thumb.d: White space cleanup.
* gas/arm/thumb2_relax.d: Likewise.
* gas/arm/thumb32.d: Likewise.
ld/testsuite:
2007-04-21 Richard Earnshaw <rearnsha@arm.com>
* ld-arm/arm-app-abs32.d: Convert to unified syntax.
* ld-arm/arm-app.d: Likewise.
* ld-arm/arm-lib-plt32.d: Likewise.
* ld-arm/arm-lib.d: Likewise.
* ld-arm/arm-static-app.d: Likewise.
* ld-arm/armthumb-lib.d: Likewise.
* ld-arm/mixed-app-v5.d: Likewise.
* ld-arm/mixed-app.d: Likewise.
* ld-arm/mixed-lib.d: Likewise.
Index: gas/testsuite/gas/arm/arch4t.d
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/arm/arch4t.d,v
retrieving revision 1.2
diff -p -r1.2 arch4t.d
*** gas/testsuite/gas/arm/arch4t.d 18 May 2005 05:40:09 -0000 1.2
--- gas/testsuite/gas/arm/arch4t.d 21 Apr 2007 12:24:25 -0000
*************** Disassembly of section .text:
*** 11,24 ****
0+0c <[^>]+> e1d540f0 ? ldrsh r4, \[r5\]
0+10 <[^>]+> e19140d3 ? ldrsb r4, \[r1, r3\]
0+14 <[^>]+> e1b410f4 ? ldrsh r1, \[r4, r4\]!
! 0+18 <[^>]+> 011510d3 ? ldreqsb r1, \[r5, -r3\]
! 0+1c <[^>]+> 109620b7 ? ldrneh r2, \[r6\], r7
! 0+20 <[^>]+> 309720f8 ? ldrccsh r2, \[r7\], r8
0+24 <[^>]+> e1d32fdf ? ldrsb r2, \[r3, #255\]
0+28 <[^>]+> e1541ffa ? ldrsh r1, \[r4, #-250\]
0+2c <[^>]+> e1d51fd0 ? ldrsb r1, \[r5, #240\]
0+30 <[^>]+> e1cf23b0 ? strh r2, \[pc, #48\] ; 0+68 <[^>]+>
! 0+34 <[^>]+> 11c330b0 ? strneh r3, \[r3\]
0+38 <[^>]+> e328f002 ? msr CPSR_f, #2 ; 0x2
0+3c <[^>]+> e121f003 ? msr CPSR_c, r3
0+40 <[^>]+> e122f004 ? msr CPSR_x, r4
--- 11,24 ----
0+0c <[^>]+> e1d540f0 ? ldrsh r4, \[r5\]
0+10 <[^>]+> e19140d3 ? ldrsb r4, \[r1, r3\]
0+14 <[^>]+> e1b410f4 ? ldrsh r1, \[r4, r4\]!
! 0+18 <[^>]+> 011510d3 ? ldrsbeq r1, \[r5, -r3\]
! 0+1c <[^>]+> 109620b7 ? ldrhne r2, \[r6\], r7
! 0+20 <[^>]+> 309720f8 ? ldrshcc r2, \[r7\], r8
0+24 <[^>]+> e1d32fdf ? ldrsb r2, \[r3, #255\]
0+28 <[^>]+> e1541ffa ? ldrsh r1, \[r4, #-250\]
0+2c <[^>]+> e1d51fd0 ? ldrsb r1, \[r5, #240\]
0+30 <[^>]+> e1cf23b0 ? strh r2, \[pc, #48\] ; 0+68 <[^>]+>
! 0+34 <[^>]+> 11c330b0 ? strhne r3, \[r3\]
0+38 <[^>]+> e328f002 ? msr CPSR_f, #2 ; 0x2
0+3c <[^>]+> e121f003 ? msr CPSR_c, r3
0+40 <[^>]+> e122f004 ? msr CPSR_x, r4
Index: gas/testsuite/gas/arm/archv6.d
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/arm/archv6.d,v
retrieving revision 1.5
diff -p -r1.5 archv6.d
*** gas/testsuite/gas/arm/archv6.d 24 Mar 2007 01:28:58 -0000 1.5
--- gas/testsuite/gas/arm/archv6.d 21 Apr 2007 12:24:25 -0000
*************** Disassembly of section .text:
*** 13,25 ****
0+014 <[^>]*> fc4570c3 ? mcrr2 0, 12, r7, r5, cr3
0+018 <[^>]*> fc5570c3 ? mrrc2 0, 12, r7, r5, cr3
0+01c <[^>]*> e6852018 ? pkhbt r2, r5, r8
! 0+020 <[^>]*> e6852198 ? pkhbt r2, r5, r8, LSL #3
! 0+024 <[^>]*> e6852198 ? pkhbt r2, r5, r8, LSL #3
! 0+028 <[^>]*> 06852198 ? pkhbteq r2, r5, r8, LSL #3
0+02c <[^>]*> e6882015 ? pkhbt r2, r8, r5
! 0+030 <[^>]*> e68521d8 ? pkhtb r2, r5, r8, ASR #3
! 0+034 <[^>]*> e68521d8 ? pkhtb r2, r5, r8, ASR #3
! 0+038 <[^>]*> 068521d8 ? pkhtbeq r2, r5, r8, ASR #3
0+03c <[^>]*> e6242f17 ? qadd16 r2, r4, r7
0+040 <[^>]*> 16242f17 ? qadd16ne r2, r4, r7
0+044 <[^>]*> e6242f97 ? qadd8 r2, r4, r7
--- 13,25 ----
0+014 <[^>]*> fc4570c3 ? mcrr2 0, 12, r7, r5, cr3
0+018 <[^>]*> fc5570c3 ? mrrc2 0, 12, r7, r5, cr3
0+01c <[^>]*> e6852018 ? pkhbt r2, r5, r8
! 0+020 <[^>]*> e6852198 ? pkhbt r2, r5, r8, lsl #3
! 0+024 <[^>]*> e6852198 ? pkhbt r2, r5, r8, lsl #3
! 0+028 <[^>]*> 06852198 ? pkhbteq r2, r5, r8, lsl #3
0+02c <[^>]*> e6882015 ? pkhbt r2, r8, r5
! 0+030 <[^>]*> e68521d8 ? pkhtb r2, r5, r8, asr #3
! 0+034 <[^>]*> e68521d8 ? pkhtb r2, r5, r8, asr #3
! 0+038 <[^>]*> 068521d8 ? pkhtbeq r2, r5, r8, asr #3
0+03c <[^>]*> e6242f17 ? qadd16 r2, r4, r7
0+040 <[^>]*> 16242f17 ? qadd16ne r2, r4, r7
0+044 <[^>]*> e6242f97 ? qadd8 r2, r4, r7
*************** Disassembly of section .text:
*** 49,67 ****
0+0a4 <[^>]*> e6142f17 ? sadd16 r2, r4, r7
0+0a8 <[^>]*> 16142f17 ? sadd16ne r2, r4, r7
0+0ac <[^>]*> e6b42075 ? sxtah r2, r4, r5
! 0+0b0 <[^>]*> e6b42475 ? sxtah r2, r4, r5, ROR #8
0+0b4 <[^>]*> 16b42075 ? sxtahne r2, r4, r5
! 0+0b8 <[^>]*> 16b42475 ? sxtahne r2, r4, r5, ROR #8
0+0bc <[^>]*> e6142f97 ? sadd8 r2, r4, r7
0+0c0 <[^>]*> 16142f97 ? sadd8ne r2, r4, r7
0+0c4 <[^>]*> e6842075 ? sxtab16 r2, r4, r5
! 0+0c8 <[^>]*> e6842475 ? sxtab16 r2, r4, r5, ROR #8
0+0cc <[^>]*> 16842075 ? sxtab16ne r2, r4, r5
! 0+0d0 <[^>]*> 16842475 ? sxtab16ne r2, r4, r5, ROR #8
0+0d4 <[^>]*> e6a42075 ? sxtab r2, r4, r5
! 0+0d8 <[^>]*> e6a42475 ? sxtab r2, r4, r5, ROR #8
0+0dc <[^>]*> 16a42075 ? sxtabne r2, r4, r5
! 0+0e0 <[^>]*> 16a42475 ? sxtabne r2, r4, r5, ROR #8
0+0e4 <[^>]*> e6142f37 ? saddaddx r2, r4, r7
0+0e8 <[^>]*> 16142f37 ? saddaddxne r2, r4, r7
0+0ec <[^>]*> e6821fb3 ? sel r1, r2, r3
--- 49,67 ----
0+0a4 <[^>]*> e6142f17 ? sadd16 r2, r4, r7
0+0a8 <[^>]*> 16142f17 ? sadd16ne r2, r4, r7
0+0ac <[^>]*> e6b42075 ? sxtah r2, r4, r5
! 0+0b0 <[^>]*> e6b42475 ? sxtah r2, r4, r5, ror #8
0+0b4 <[^>]*> 16b42075 ? sxtahne r2, r4, r5
! 0+0b8 <[^>]*> 16b42475 ? sxtahne r2, r4, r5, ror #8
0+0bc <[^>]*> e6142f97 ? sadd8 r2, r4, r7
0+0c0 <[^>]*> 16142f97 ? sadd8ne r2, r4, r7
0+0c4 <[^>]*> e6842075 ? sxtab16 r2, r4, r5
! 0+0c8 <[^>]*> e6842475 ? sxtab16 r2, r4, r5, ror #8
0+0cc <[^>]*> 16842075 ? sxtab16ne r2, r4, r5
! 0+0d0 <[^>]*> 16842475 ? sxtab16ne r2, r4, r5, ror #8
0+0d4 <[^>]*> e6a42075 ? sxtab r2, r4, r5
! 0+0d8 <[^>]*> e6a42475 ? sxtab r2, r4, r5, ror #8
0+0dc <[^>]*> 16a42075 ? sxtabne r2, r4, r5
! 0+0e0 <[^>]*> 16a42475 ? sxtabne r2, r4, r5, ror #8
0+0e4 <[^>]*> e6142f37 ? saddaddx r2, r4, r7
0+0e8 <[^>]*> 16142f37 ? saddaddxne r2, r4, r7
0+0ec <[^>]*> e6821fb3 ? sel r1, r2, r3
*************** Disassembly of section .text:
*** 119,126 ****
0+1bc <[^>]*> f8cd0510 ? srsia sp, #16
0+1c0 <[^>]*> f9ed0510 ? srsib sp!, #16
0+1c4 <[^>]*> e6a01012 ? ssat r1, #1, r2
! 0+1c8 <[^>]*> e6a01152 ? ssat r1, #1, r2, ASR #2
! 0+1cc <[^>]*> e6a01112 ? ssat r1, #1, r2, LSL #2
0+1d0 <[^>]*> e6a01f31 ? ssat16 r1, #1, r1
0+1d4 <[^>]*> d6a01f31 ? ssat16le r1, #1, r1
0+1d8 <[^>]*> e6142f77 ? ssub16 r2, r4, r7
--- 119,126 ----
0+1bc <[^>]*> f8cd0510 ? srsia sp, #16
0+1c0 <[^>]*> f9ed0510 ? srsib sp!, #16
0+1c4 <[^>]*> e6a01012 ? ssat r1, #1, r2
! 0+1c8 <[^>]*> e6a01152 ? ssat r1, #1, r2, asr #2
! 0+1cc <[^>]*> e6a01112 ? ssat r1, #1, r2, lsl #2
0+1d0 <[^>]*> e6a01f31 ? ssat16 r1, #1, r1
0+1d4 <[^>]*> d6a01f31 ? ssat16le r1, #1, r1
0+1d8 <[^>]*> e6142f77 ? ssub16 r2, r4, r7
*************** Disassembly of section .text:
*** 131,164 ****
0+1ec <[^>]*> 16142f57 ? ssubaddxne r2, r4, r7
0+1f0 <[^>]*> e1831f92 ? strex r1, r2, \[r3\]
0+1f4 <[^>]*> 11831f92 ? strexne r1, r2, \[r3\]
! 0+1f8 <[^>]*> e6bf2075 ? sxth r2,r5
! 0+1fc <[^>]*> e6bf2475 ? sxth r2,r5, ROR #8
! 0+200 <[^>]*> 16bf2075 ? sxthne r2,r5
! 0+204 <[^>]*> 16bf2475 ? sxthne r2,r5, ROR #8
! 0+208 <[^>]*> e68f2075 ? sxtb16 r2,r5
! 0+20c <[^>]*> e68f2475 ? sxtb16 r2,r5, ROR #8
! 0+210 <[^>]*> 168f2075 ? sxtb16ne r2,r5
! 0+214 <[^>]*> 168f2475 ? sxtb16ne r2,r5, ROR #8
! 0+218 <[^>]*> e6af2075 ? sxtb r2,r5
! 0+21c <[^>]*> e6af2475 ? sxtb r2,r5, ROR #8
! 0+220 <[^>]*> 16af2075 ? sxtbne r2,r5
! 0+224 <[^>]*> 16af2475 ? sxtbne r2,r5, ROR #8
0+228 <[^>]*> e6542f17 ? uadd16 r2, r4, r7
0+22c <[^>]*> 16542f17 ? uadd16ne r2, r4, r7
0+230 <[^>]*> e6f32075 ? uxtah r2, r3, r5
! 0+234 <[^>]*> e6f32475 ? uxtah r2, r3, r5, ROR #8
0+238 <[^>]*> 16f32075 ? uxtahne r2, r3, r5
! 0+23c <[^>]*> 16f32475 ? uxtahne r2, r3, r5, ROR #8
0+240 <[^>]*> e6542f97 ? uadd8 r2, r4, r7
0+244 <[^>]*> 16542f97 ? uadd8ne r2, r4, r7
0+248 <[^>]*> e6c32075 ? uxtab16 r2, r3, r5
! 0+24c <[^>]*> e6c32475 ? uxtab16 r2, r3, r5, ROR #8
0+250 <[^>]*> 16c32075 ? uxtab16ne r2, r3, r5
! 0+254 <[^>]*> 16c32475 ? uxtab16ne r2, r3, r5, ROR #8
0+258 <[^>]*> e6e32075 ? uxtab r2, r3, r5
! 0+25c <[^>]*> e6e32475 ? uxtab r2, r3, r5, ROR #8
0+260 <[^>]*> 16e32075 ? uxtabne r2, r3, r5
! 0+264 <[^>]*> 16e32475 ? uxtabne r2, r3, r5, ROR #8
0+268 <[^>]*> e6542f37 ? uaddsubx r2, r4, r7
0+26c <[^>]*> 16542f37 ? uaddsubxne r2, r4, r7
0+270 <[^>]*> e6742f17 ? uhadd16 r2, r4, r7
--- 131,164 ----
0+1ec <[^>]*> 16142f57 ? ssubaddxne r2, r4, r7
0+1f0 <[^>]*> e1831f92 ? strex r1, r2, \[r3\]
0+1f4 <[^>]*> 11831f92 ? strexne r1, r2, \[r3\]
! 0+1f8 <[^>]*> e6bf2075 ? sxth r2, r5
! 0+1fc <[^>]*> e6bf2475 ? sxth r2, r5, ror #8
! 0+200 <[^>]*> 16bf2075 ? sxthne r2, r5
! 0+204 <[^>]*> 16bf2475 ? sxthne r2, r5, ror #8
! 0+208 <[^>]*> e68f2075 ? sxtb16 r2, r5
! 0+20c <[^>]*> e68f2475 ? sxtb16 r2, r5, ror #8
! 0+210 <[^>]*> 168f2075 ? sxtb16ne r2, r5
! 0+214 <[^>]*> 168f2475 ? sxtb16ne r2, r5, ror #8
! 0+218 <[^>]*> e6af2075 ? sxtb r2, r5
! 0+21c <[^>]*> e6af2475 ? sxtb r2, r5, ror #8
! 0+220 <[^>]*> 16af2075 ? sxtbne r2, r5
! 0+224 <[^>]*> 16af2475 ? sxtbne r2, r5, ror #8
0+228 <[^>]*> e6542f17 ? uadd16 r2, r4, r7
0+22c <[^>]*> 16542f17 ? uadd16ne r2, r4, r7
0+230 <[^>]*> e6f32075 ? uxtah r2, r3, r5
! 0+234 <[^>]*> e6f32475 ? uxtah r2, r3, r5, ror #8
0+238 <[^>]*> 16f32075 ? uxtahne r2, r3, r5
! 0+23c <[^>]*> 16f32475 ? uxtahne r2, r3, r5, ror #8
0+240 <[^>]*> e6542f97 ? uadd8 r2, r4, r7
0+244 <[^>]*> 16542f97 ? uadd8ne r2, r4, r7
0+248 <[^>]*> e6c32075 ? uxtab16 r2, r3, r5
! 0+24c <[^>]*> e6c32475 ? uxtab16 r2, r3, r5, ror #8
0+250 <[^>]*> 16c32075 ? uxtab16ne r2, r3, r5
! 0+254 <[^>]*> 16c32475 ? uxtab16ne r2, r3, r5, ror #8
0+258 <[^>]*> e6e32075 ? uxtab r2, r3, r5
! 0+25c <[^>]*> e6e32475 ? uxtab r2, r3, r5, ror #8
0+260 <[^>]*> 16e32075 ? uxtabne r2, r3, r5
! 0+264 <[^>]*> 16e32475 ? uxtabne r2, r3, r5, ror #8
0+268 <[^>]*> e6542f37 ? uaddsubx r2, r4, r7
0+26c <[^>]*> 16542f37 ? uaddsubxne r2, r4, r7
0+270 <[^>]*> e6742f17 ? uhadd16 r2, r4, r7
*************** Disassembly of section .text:
*** 192,222 ****
0+2e0 <[^>]*> e7814312 ? usada8 r1, r2, r3, r4
0+2e4 <[^>]*> 17814312 ? usada8ne r1, r2, r3, r4
0+2e8 <[^>]*> e6ef1012 ? usat r1, #15, r2
! 0+2ec <[^>]*> e6ef1252 ? usat r1, #15, r2, ASR #4
! 0+2f0 <[^>]*> e6ef1212 ? usat r1, #15, r2, LSL #4
0+2f4 <[^>]*> e6ef1f32 ? usat16 r1, #15, r2
0+2f8 <[^>]*> d6ef1f32 ? usat16le r1, #15, r2
0+2fc <[^>]*> d6ef1012 ? usatle r1, #15, r2
! 0+300 <[^>]*> d6ef1252 ? usatle r1, #15, r2, ASR #4
! 0+304 <[^>]*> d6ef1212 ? usatle r1, #15, r2, LSL #4
0+308 <[^>]*> e6542f77 ? usub16 r2, r4, r7
0+30c <[^>]*> 16542f77 ? usub16ne r2, r4, r7
0+310 <[^>]*> e6542ff7 ? usub8 r2, r4, r7
0+314 <[^>]*> 16542ff7 ? usub8ne r2, r4, r7
0+318 <[^>]*> e6542f57 ? usubaddx r2, r4, r7
0+31c <[^>]*> 16542f57 ? usubaddxne r2, r4, r7
! 0+320 <[^>]*> e6ff2075 ? uxth r2,r5
! 0+324 <[^>]*> e6ff2475 ? uxth r2,r5, ROR #8
! 0+328 <[^>]*> 16ff2075 ? uxthne r2,r5
! 0+32c <[^>]*> 16ff2475 ? uxthne r2,r5, ROR #8
! 0+330 <[^>]*> e6cf2075 ? uxtb16 r2,r5
! 0+334 <[^>]*> e6cf2475 ? uxtb16 r2,r5, ROR #8
! 0+338 <[^>]*> 16cf2075 ? uxtb16ne r2,r5
! 0+33c <[^>]*> 16cf2475 ? uxtb16ne r2,r5, ROR #8
! 0+340 <[^>]*> e6ef2075 ? uxtb r2,r5
! 0+344 <[^>]*> e6ef2475 ? uxtb r2,r5, ROR #8
! 0+348 <[^>]*> 16ef2075 ? uxtbne r2,r5
! 0+34c <[^>]*> 16ef2475 ? uxtbne r2,r5, ROR #8
0+350 <[^>]*> f10a00ca ? cpsie if,#10
0+354 <[^>]*> f10a00d5 ? cpsie if,#21
0+358 <[^>]*> f8cd0510 ? srsia sp, #16
--- 192,222 ----
0+2e0 <[^>]*> e7814312 ? usada8 r1, r2, r3, r4
0+2e4 <[^>]*> 17814312 ? usada8ne r1, r2, r3, r4
0+2e8 <[^>]*> e6ef1012 ? usat r1, #15, r2
! 0+2ec <[^>]*> e6ef1252 ? usat r1, #15, r2, asr #4
! 0+2f0 <[^>]*> e6ef1212 ? usat r1, #15, r2, lsl #4
0+2f4 <[^>]*> e6ef1f32 ? usat16 r1, #15, r2
0+2f8 <[^>]*> d6ef1f32 ? usat16le r1, #15, r2
0+2fc <[^>]*> d6ef1012 ? usatle r1, #15, r2
! 0+300 <[^>]*> d6ef1252 ? usatle r1, #15, r2, asr #4
! 0+304 <[^>]*> d6ef1212 ? usatle r1, #15, r2, lsl #4
0+308 <[^>]*> e6542f77 ? usub16 r2, r4, r7
0+30c <[^>]*> 16542f77 ? usub16ne r2, r4, r7
0+310 <[^>]*> e6542ff7 ? usub8 r2, r4, r7
0+314 <[^>]*> 16542ff7 ? usub8ne r2, r4, r7
0+318 <[^>]*> e6542f57 ? usubaddx r2, r4, r7
0+31c <[^>]*> 16542f57 ? usubaddxne r2, r4, r7
! 0+320 <[^>]*> e6ff2075 ? uxth r2, r5
! 0+324 <[^>]*> e6ff2475 ? uxth r2, r5, ror #8
! 0+328 <[^>]*> 16ff2075 ? uxthne r2, r5
! 0+32c <[^>]*> 16ff2475 ? uxthne r2, r5, ror #8
! 0+330 <[^>]*> e6cf2075 ? uxtb16 r2, r5
! 0+334 <[^>]*> e6cf2475 ? uxtb16 r2, r5, ror #8
! 0+338 <[^>]*> 16cf2075 ? uxtb16ne r2, r5
! 0+33c <[^>]*> 16cf2475 ? uxtb16ne r2, r5, ror #8
! 0+340 <[^>]*> e6ef2075 ? uxtb r2, r5
! 0+344 <[^>]*> e6ef2475 ? uxtb r2, r5, ror #8
! 0+348 <[^>]*> 16ef2075 ? uxtbne r2, r5
! 0+34c <[^>]*> 16ef2475 ? uxtbne r2, r5, ror #8
0+350 <[^>]*> f10a00ca ? cpsie if,#10
0+354 <[^>]*> f10a00d5 ? cpsie if,#21
0+358 <[^>]*> f8cd0510 ? srsia sp, #16
Index: gas/testsuite/gas/arm/archv6t2.d
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/arm/archv6t2.d,v
retrieving revision 1.2
diff -p -r1.2 archv6t2.d
*** gas/testsuite/gas/arm/archv6t2.d 19 Jul 2006 12:53:33 -0000 1.2
--- gas/testsuite/gas/arm/archv6t2.d 21 Apr 2007 12:24:25 -0000
*************** Disassembly of section .text:
*** 44,50 ****
0+90 <[^>]+> e0f900f0 ldrsht r0, \[r9\]
0+94 <[^>]+> e0f900d0 ldrsbt r0, \[r9\]
0+98 <[^>]+> e0e900b0 strht r0, \[r9\]
! 0+9c <[^>]+> 10f900b0 ldrneht r0, \[r9\]
0+a0 <[^>]+> e0b090b9 ldrht r9, \[r0\], r9
0+a4 <[^>]+> e03090b9 ldrht r9, \[r0\], -r9
0+a8 <[^>]+> e0f099b9 ldrht r9, \[r0\], #153
--- 44,50 ----
0+90 <[^>]+> e0f900f0 ldrsht r0, \[r9\]
0+94 <[^>]+> e0f900d0 ldrsbt r0, \[r9\]
0+98 <[^>]+> e0e900b0 strht r0, \[r9\]
! 0+9c <[^>]+> 10f900b0 ldrhtne r0, \[r9\]
0+a0 <[^>]+> e0b090b9 ldrht r9, \[r0\], r9
0+a4 <[^>]+> e03090b9 ldrht r9, \[r0\], -r9
0+a8 <[^>]+> e0f099b9 ldrht r9, \[r0\], #153
Index: gas/testsuite/gas/arm/arm3.d
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/arm/arm3.d,v
retrieving revision 1.3
diff -p -r1.3 arm3.d
*** gas/testsuite/gas/arm/arm3.d 6 Sep 2005 15:57:06 -0000 1.3
--- gas/testsuite/gas/arm/arm3.d 21 Apr 2007 12:24:25 -0000
***************
*** 7,11 ****
Disassembly of section .text:
0+0 <[^>]*> e1080091 ? swp r0, r1, \[r8\]
0+4 <[^>]*> e1423093 ? swpb r3, r3, \[r2\]
! 0+8 <[^>]*> a1454091 ? swpgeb r4, r1, \[r5\]
0+c <[^>]*> e1a00000 ? nop \(mov r0,r0\)
--- 7,11 ----
Disassembly of section .text:
0+0 <[^>]*> e1080091 ? swp r0, r1, \[r8\]
0+4 <[^>]*> e1423093 ? swpb r3, r3, \[r2\]
! 0+8 <[^>]*> a1454091 ? swpbge r4, r1, \[r5\]
0+c <[^>]*> e1a00000 ? nop \(mov r0,r0\)
Index: gas/testsuite/gas/arm/arm7dm.d
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/arm/arm7dm.d,v
retrieving revision 1.2
diff -p -r1.2 arm7dm.d
*** gas/testsuite/gas/arm/arm7dm.d 18 May 2005 05:40:09 -0000 1.2
--- gas/testsuite/gas/arm/arm7dm.d 21 Apr 2007 12:24:25 -0000
*************** Disassembly of section .text:
*** 11,17 ****
0+0c <[^>]+> e0a10394 ? umlal r0, r1, r4, r3
0+10 <[^>]+> 10c10493 ? smullne r0, r1, r3, r4
0+14 <[^>]+> e0d01b99 ? smulls r1, r0, r9, fp
! 0+18 <[^>]+> 00b92994 ? umlaleqs r2, r9, r4, r9
0+1c <[^>]+> a0eaee98 ? smlalge lr, sl, r8, lr
0+20 <[^>]+> e322f000 ? msr CPSR_x, #0 ; 0x0
0+24 <[^>]+> e1a00000 ? nop \(mov r0,r0\)
--- 11,17 ----
0+0c <[^>]+> e0a10394 ? umlal r0, r1, r4, r3
0+10 <[^>]+> 10c10493 ? smullne r0, r1, r3, r4
0+14 <[^>]+> e0d01b99 ? smulls r1, r0, r9, fp
! 0+18 <[^>]+> 00b92994 ? umlalseq r2, r9, r4, r9
0+1c <[^>]+> a0eaee98 ? smlalge lr, sl, r8, lr
0+20 <[^>]+> e322f000 ? msr CPSR_x, #0 ; 0x0
0+24 <[^>]+> e1a00000 ? nop \(mov r0,r0\)
Index: gas/testsuite/gas/arm/arm7t.d
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/arm/arm7t.d,v
retrieving revision 1.14
diff -p -r1.14 arm7t.d
*** gas/testsuite/gas/arm/arm7t.d 28 Feb 2007 14:39:15 -0000 1.14
--- gas/testsuite/gas/arm/arm7t.d 21 Apr 2007 12:24:25 -0000
*************** Disassembly of section .text:
*** 49,65 ****
0+9c <[^>]*> e1df03fc ? ldrsh r0, \[pc, #60\] ; 0+e0 <[^>]*>
0+a0 <[^>]*> e1df03f4 ? ldrsh r0, \[pc, #52\] ; 0+dc <[^>]*>
0+a4 <[^>]*> e19100b2 ? ldrh r0, \[r1, r2\]
! 0+a8 <[^>]*> 119100b2 ? ldrneh r0, \[r1, r2\]
! 0+ac <[^>]*> 819100b2 ? ldrhih r0, \[r1, r2\]
! 0+b0 <[^>]*> b19100b2 ? ldrlth r0, \[r1, r2\]
0+b4 <[^>]*> e19100f2 ? ldrsh r0, \[r1, r2\]
! 0+b8 <[^>]*> 119100f2 ? ldrnesh r0, \[r1, r2\]
! 0+bc <[^>]*> 819100f2 ? ldrhish r0, \[r1, r2\]
! 0+c0 <[^>]*> b19100f2 ? ldrltsh r0, \[r1, r2\]
0+c4 <[^>]*> e19100d2 ? ldrsb r0, \[r1, r2\]
! 0+c8 <[^>]*> 119100d2 ? ldrnesb r0, \[r1, r2\]
! 0+cc <[^>]*> 819100d2 ? ldrhisb r0, \[r1, r2\]
! 0+d0 <[^>]*> b19100d2 ? ldrltsb r0, \[r1, r2\]
0+d4 <[^>]*> e1df00f4 ? ldrsh r0, \[pc, #4\] ; 0+e0 <[^>]*>
0+d8 <[^>]*> e1df00f4 ? ldrsh r0, \[pc, #4\] ; 0+e4 <[^>]*>
0+dc <[^>]*> 00000000 ? .*
--- 49,65 ----
0+9c <[^>]*> e1df03fc ? ldrsh r0, \[pc, #60\] ; 0+e0 <[^>]*>
0+a0 <[^>]*> e1df03f4 ? ldrsh r0, \[pc, #52\] ; 0+dc <[^>]*>
0+a4 <[^>]*> e19100b2 ? ldrh r0, \[r1, r2\]
! 0+a8 <[^>]*> 119100b2 ? ldrhne r0, \[r1, r2\]
! 0+ac <[^>]*> 819100b2 ? ldrhhi r0, \[r1, r2\]
! 0+b0 <[^>]*> b19100b2 ? ldrhlt r0, \[r1, r2\]
0+b4 <[^>]*> e19100f2 ? ldrsh r0, \[r1, r2\]
! 0+b8 <[^>]*> 119100f2 ? ldrshne r0, \[r1, r2\]
! 0+bc <[^>]*> 819100f2 ? ldrshhi r0, \[r1, r2\]
! 0+c0 <[^>]*> b19100f2 ? ldrshlt r0, \[r1, r2\]
0+c4 <[^>]*> e19100d2 ? ldrsb r0, \[r1, r2\]
! 0+c8 <[^>]*> 119100d2 ? ldrsbne r0, \[r1, r2\]
! 0+cc <[^>]*> 819100d2 ? ldrsbhi r0, \[r1, r2\]
! 0+d0 <[^>]*> b19100d2 ? ldrsblt r0, \[r1, r2\]
0+d4 <[^>]*> e1df00f4 ? ldrsh r0, \[pc, #4\] ; 0+e0 <[^>]*>
0+d8 <[^>]*> e1df00f4 ? ldrsh r0, \[pc, #4\] ; 0+e4 <[^>]*>
0+dc <[^>]*> 00000000 ? .*
Index: gas/testsuite/gas/arm/armv1.d
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/arm/armv1.d,v
retrieving revision 1.5
diff -p -r1.5 armv1.d
*** gas/testsuite/gas/arm/armv1.d 4 May 2006 15:41:00 -0000 1.5
--- gas/testsuite/gas/arm/armv1.d 21 Apr 2007 12:24:25 -0000
*************** Disassembly of section .text:
*** 53,71 ****
0+a8 <[^>]*> e5c00000 ? strb r0, \[r0\]
0+ac <[^>]*> e4a10000 ? strt r0, \[r1\]
0+b0 <[^>]*> e4e10000 ? strbt r0, \[r1\]
! 0+b4 <[^>]*> e8800001 ? stmia r0, {r0}
0+b8 <[^>]*> e9800001 ? stmib r0, {r0}
0+bc <[^>]*> e8000001 ? stmda r0, {r0}
0+c0 <[^>]*> e9000001 ? stmdb r0, {r0}
0+c4 <[^>]*> e9000001 ? stmdb r0, {r0}
0+c8 <[^>]*> e9800001 ? stmib r0, {r0}
! 0+cc <[^>]*> e8800001 ? stmia r0, {r0}
0+d0 <[^>]*> e8000001 ? stmda r0, {r0}
! 0+d4 <[^>]*> e8900001 ? ldmia r0, {r0}
0+d8 <[^>]*> e9900001 ? ldmib r0, {r0}
0+dc <[^>]*> e8100001 ? ldmda r0, {r0}
0+e0 <[^>]*> e9100001 ? ldmdb r0, {r0}
! 0+e4 <[^>]*> e8900001 ? ldmia r0, {r0}
0+e8 <[^>]*> e8100001 ? ldmda r0, {r0}
0+ec <[^>]*> e9100001 ? ldmdb r0, {r0}
0+f0 <[^>]*> e9900001 ? ldmib r0, {r0}
--- 53,71 ----
0+a8 <[^>]*> e5c00000 ? strb r0, \[r0\]
0+ac <[^>]*> e4a10000 ? strt r0, \[r1\]
0+b0 <[^>]*> e4e10000 ? strbt r0, \[r1\]
! 0+b4 <[^>]*> e8800001 ? stm r0, {r0}
0+b8 <[^>]*> e9800001 ? stmib r0, {r0}
0+bc <[^>]*> e8000001 ? stmda r0, {r0}
0+c0 <[^>]*> e9000001 ? stmdb r0, {r0}
0+c4 <[^>]*> e9000001 ? stmdb r0, {r0}
0+c8 <[^>]*> e9800001 ? stmib r0, {r0}
! 0+cc <[^>]*> e8800001 ? stm r0, {r0}
0+d0 <[^>]*> e8000001 ? stmda r0, {r0}
! 0+d4 <[^>]*> e8900001 ? ldm r0, {r0}
0+d8 <[^>]*> e9900001 ? ldmib r0, {r0}
0+dc <[^>]*> e8100001 ? ldmda r0, {r0}
0+e0 <[^>]*> e9100001 ? ldmdb r0, {r0}
! 0+e4 <[^>]*> e8900001 ? ldm r0, {r0}
0+e8 <[^>]*> e8100001 ? ldmda r0, {r0}
0+ec <[^>]*> e9100001 ? ldmdb r0, {r0}
0+f0 <[^>]*> e9900001 ? ldmib r0, {r0}
Index: gas/testsuite/gas/arm/copro.d
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/arm/copro.d,v
retrieving revision 1.5
diff -p -r1.5 copro.d
*** gas/testsuite/gas/arm/copro.d 26 Apr 2006 15:42:17 -0000 1.5
--- gas/testsuite/gas/arm/copro.d 21 Apr 2007 12:24:25 -0000
*************** Disassembly of section .text:
*** 12,18 ****
0+008 <[^>]*> ed939500 cfldr32 mvfx9, \[r3\]
0+00c <[^>]*> edd1e108 ldfp f6, \[r1, #32\]
0+010 <[^>]*> 4db200ff ldcmi 0, cr0, \[r2, #1020\]!
! 0+014 <[^>]*> 5cf31710 ldcpll 7, cr1, \[r3\], #64
0+018 <[^>]*> ed1f8001 ldc 0, cr8, \[pc, #-4\]
0+01c <[^>]*> ed830500 cfstr32 mvfx0, \[r3\]
0+020 <[^>]*> edc0f302 stcl 3, cr15, \[r0, #8\]
--- 12,18 ----
0+008 <[^>]*> ed939500 cfldr32 mvfx9, \[r3\]
0+00c <[^>]*> edd1e108 ldfp f6, \[r1, #32\]
0+010 <[^>]*> 4db200ff ldcmi 0, cr0, \[r2, #1020\]!
! 0+014 <[^>]*> 5cf31710 ldclpl 7, cr1, \[r3\], #64
0+018 <[^>]*> ed1f8001 ldc 0, cr8, \[pc, #-4\]
0+01c <[^>]*> ed830500 cfstr32 mvfx0, \[r3\]
0+020 <[^>]*> edc0f302 stcl 3, cr15, \[r0, #8\]
Index: gas/testsuite/gas/arm/inst.d
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/arm/inst.d,v
retrieving revision 1.16
diff -p -r1.16 inst.d
*** gas/testsuite/gas/arm/inst.d 16 Mar 2006 15:08:47 -0000 1.16
--- gas/testsuite/gas/arm/inst.d 21 Apr 2007 12:24:25 -0000
***************
*** 11,21 ****
Disassembly of section .text:
0+000 <[^>]*> e3a00000 ? mov r0, #0 ; 0x0
0+004 <[^>]*> e1a01002 ? mov r1, r2
! 0+008 <[^>]*> e1a03184 ? mov r3, r4, lsl #3
! 0+00c <[^>]*> e1a05736 ? mov r5, r6, lsr r7
! 0+010 <[^>]*> e1a08a59 ? mov r8, r9, asr sl
! 0+014 <[^>]*> e1a0bd1c ? mov fp, ip, lsl sp
! 0+018 <[^>]*> e1a0e06f ? mov lr, pc, rrx
0+01c <[^>]*> e1a01002 ? mov r1, r2
0+020 <[^>]*> 01a02003 ? moveq r2, r3
0+024 <[^>]*> 11a04005 ? movne r4, r5
--- 11,21 ----
Disassembly of section .text:
0+000 <[^>]*> e3a00000 ? mov r0, #0 ; 0x0
0+004 <[^>]*> e1a01002 ? mov r1, r2
! 0+008 <[^>]*> e1a03184 ? lsl r3, r4, #3
! 0+00c <[^>]*> e1a05736 ? lsr r5, r6, r7
! 0+010 <[^>]*> e1a08a59 ? asr r8, r9, sl
! 0+014 <[^>]*> e1a0bd1c ? lsl fp, ip, sp
! 0+018 <[^>]*> e1a0e06f ? rrx lr, pc
0+01c <[^>]*> e1a01002 ? mov r1, r2
0+020 <[^>]*> 01a02003 ? moveq r2, r3
0+024 <[^>]*> 11a04005 ? movne r4, r5
*************** Disassembly of section .text:
*** 28,40 ****
0+040 <[^>]*> 41a03006 ? movmi r3, r6
0+044 <[^>]*> 51a07009 ? movpl r7, r9
0+048 <[^>]*> 61a01008 ? movvs r1, r8
! 0+04c <[^>]*> 71a09fa1 ? movvc r9, r1, lsr #31
0+050 <[^>]*> 81a0800f ? movhi r8, pc
0+054 <[^>]*> 91a0f00e ? movls pc, lr
0+058 <[^>]*> 21a09008 ? movcs r9, r8
0+05c <[^>]*> 31a01003 ? movcc r1, r3
0+060 <[^>]*> e1b00008 ? movs r0, r8
! 0+064 <[^>]*> 31b00007 ? movccs r0, r7
0+068 <[^>]*> e281000a ? add r0, r1, #10 ; 0xa
0+06c <[^>]*> e0832004 ? add r2, r3, r4
0+070 <[^>]*> e0865287 ? add r5, r6, r7, lsl #5
--- 28,40 ----
0+040 <[^>]*> 41a03006 ? movmi r3, r6
0+044 <[^>]*> 51a07009 ? movpl r7, r9
0+048 <[^>]*> 61a01008 ? movvs r1, r8
! 0+04c <[^>]*> 71a09fa1 ? lsrvc r9, r1, #31
0+050 <[^>]*> 81a0800f ? movhi r8, pc
0+054 <[^>]*> 91a0f00e ? movls pc, lr
0+058 <[^>]*> 21a09008 ? movcs r9, r8
0+05c <[^>]*> 31a01003 ? movcc r1, r3
0+060 <[^>]*> e1b00008 ? movs r0, r8
! 0+064 <[^>]*> 31b00007 ? movscc r0, r7
0+068 <[^>]*> e281000a ? add r0, r1, #10 ; 0xa
0+06c <[^>]*> e0832004 ? add r2, r3, r4
0+070 <[^>]*> e0865287 ? add r5, r6, r7, lsl #5
*************** Disassembly of section .text:
*** 114,124 ****
0+198 <[^>]*> e0000291 ? mul r0, r1, r2
0+19c <[^>]*> e0110392 ? muls r1, r2, r3
0+1a0 <[^>]*> 10000091 ? mulne r0, r1, r0
! 0+1a4 <[^>]*> 90190798 ? mullss r9, r8, r7
0+1a8 <[^>]*> e021ba99 ? mla r1, r9, sl, fp
0+1ac <[^>]*> e033c994 ? mlas r3, r4, r9, ip
0+1b0 <[^>]*> b029d798 ? mlalt r9, r8, r7, sp
! 0+1b4 <[^>]*> a034e391 ? mlages r4, r1, r3, lr
0+1b8 <[^>]*> e5910000 ? ldr r0, \[r1\]
0+1bc <[^>]*> e7911002 ? ldr r1, \[r1, r2\]
0+1c0 <[^>]*> e7b32004 ? ldr r2, \[r3, r4\]!
--- 114,124 ----
0+198 <[^>]*> e0000291 ? mul r0, r1, r2
0+19c <[^>]*> e0110392 ? muls r1, r2, r3
0+1a0 <[^>]*> 10000091 ? mulne r0, r1, r0
! 0+1a4 <[^>]*> 90190798 ? mulsls r9, r8, r7
0+1a8 <[^>]*> e021ba99 ? mla r1, r9, sl, fp
0+1ac <[^>]*> e033c994 ? mlas r3, r4, r9, ip
0+1b0 <[^>]*> b029d798 ? mlalt r9, r8, r7, sp
! 0+1b4 <[^>]*> a034e391 ? mlasge r4, r1, r3, lr
0+1b8 <[^>]*> e5910000 ? ldr r0, \[r1\]
0+1bc <[^>]*> e7911002 ? ldr r1, \[r1, r2\]
0+1c0 <[^>]*> e7b32004 ? ldr r2, \[r3, r4\]!
*************** Disassembly of section .text:
*** 130,136 ****
0+1d8 <[^>]*> e6942425 ? ldr r2, \[r4\], r5, lsr #8
0+1dc <[^>]*> e51f0008 ? ldr r0, \[pc, #-8\] ; 0+1dc <[^>]*>
0+1e0 <[^>]*> e5d43000 ? ldrb r3, \[r4\]
! 0+1e4 <[^>]*> 14f85000 ? ldrnebt r5, \[r8\]
0+1e8 <[^>]*> e5810000 ? str r0, \[r1\]
0+1ec <[^>]*> e7811002 ? str r1, \[r1, r2\]
0+1f0 <[^>]*> e7a43003 ? str r3, \[r4, r3\]!
--- 130,136 ----
0+1d8 <[^>]*> e6942425 ? ldr r2, \[r4\], r5, lsr #8
0+1dc <[^>]*> e51f0008 ? ldr r0, \[pc, #-8\] ; 0+1dc <[^>]*>
0+1e0 <[^>]*> e5d43000 ? ldrb r3, \[r4\]
! 0+1e4 <[^>]*> 14f85000 ? ldrbtne r5, \[r8\]
0+1e8 <[^>]*> e5810000 ? str r0, \[r1\]
0+1ec <[^>]*> e7811002 ? str r1, \[r1, r2\]
0+1f0 <[^>]*> e7a43003 ? str r3, \[r4, r3\]!
*************** Disassembly of section .text:
*** 143,163 ****
0+20c <[^>]*> e50f1004 ? str r1, \[pc, #-4\] ; 0+210 <[^>]*>
0+210 <[^>]*> e5c71000 ? strb r1, \[r7\]
0+214 <[^>]*> e4e02000 ? strbt r2, \[r0\]
! 0+218 <[^>]*> e8900002 ? ldmia r0, {r1}
! 0+21c <[^>]*> 09920038 ? ldmeqib r2, {r3, r4, r5}
0+220 <[^>]*> e853ffff ? ldmda r3, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip, sp, lr, pc}\^
0+224 <[^>]*> e93b05ff ? ldmdb fp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, sl}
0+228 <[^>]*> e99100f7 ? ldmib r1, {r0, r1, r2, r4, r5, r6, r7}
! 0+22c <[^>]*> e89201f8 ? ldmia r2, {r3, r4, r5, r6, r7, r8}
0+230 <[^>]*> e9130003 ? ldmdb r3, {r0, r1}
0+234 <[^>]*> e8540300 ? ldmda r4, {r8, r9}\^
! 0+238 <[^>]*> e8800002 ? stmia r0, {r1}
! 0+23c <[^>]*> 09820038 ? stmeqib r2, {r3, r4, r5}
0+240 <[^>]*> e843ffff ? stmda r3, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip, sp, lr, pc}\^
0+244 <[^>]*> e92b05ff ? stmdb fp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, sl}
0+248 <[^>]*> e8010007 ? stmda r1, {r0, r1, r2}
0+24c <[^>]*> e9020018 ? stmdb r2, {r3, r4}
! 0+250 <[^>]*> e8830003 ? stmia r3, {r0, r1}
0+254 <[^>]*> e9c40300 ? stmib r4, {r8, r9}\^
0+258 <[^>]*> ef123456 ? (swi|svc) 0x00123456
0+25c <[^>]*> 2f000033 ? (swi|svc)cs 0x00000033
--- 143,163 ----
0+20c <[^>]*> e50f1004 ? str r1, \[pc, #-4\] ; 0+210 <[^>]*>
0+210 <[^>]*> e5c71000 ? strb r1, \[r7\]
0+214 <[^>]*> e4e02000 ? strbt r2, \[r0\]
! 0+218 <[^>]*> e8900002 ? ldm r0, {r1}
! 0+21c <[^>]*> 09920038 ? ldmibeq r2, {r3, r4, r5}
0+220 <[^>]*> e853ffff ? ldmda r3, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip, sp, lr, pc}\^
0+224 <[^>]*> e93b05ff ? ldmdb fp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, sl}
0+228 <[^>]*> e99100f7 ? ldmib r1, {r0, r1, r2, r4, r5, r6, r7}
! 0+22c <[^>]*> e89201f8 ? ldm r2, {r3, r4, r5, r6, r7, r8}
0+230 <[^>]*> e9130003 ? ldmdb r3, {r0, r1}
0+234 <[^>]*> e8540300 ? ldmda r4, {r8, r9}\^
! 0+238 <[^>]*> e8800002 ? stm r0, {r1}
! 0+23c <[^>]*> 09820038 ? stmibeq r2, {r3, r4, r5}
0+240 <[^>]*> e843ffff ? stmda r3, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip, sp, lr, pc}\^
0+244 <[^>]*> e92b05ff ? stmdb fp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, sl}
0+248 <[^>]*> e8010007 ? stmda r1, {r0, r1, r2}
0+24c <[^>]*> e9020018 ? stmdb r2, {r3, r4}
! 0+250 <[^>]*> e8830003 ? stm r3, {r0, r1}
0+254 <[^>]*> e9c40300 ? stmib r4, {r8, r9}\^
0+258 <[^>]*> ef123456 ? (swi|svc) 0x00123456
0+25c <[^>]*> 2f000033 ? (swi|svc)cs 0x00000033
*************** Disassembly of section .text:
*** 169,203 ****
[ ]*268:.*_wibble.*
0+26c <[^>]*> da...... ? ble 0[0123456789abcdef]+ <[^>]*>
[ ]*26c:.*testerfunc.*
! 0+270 <[^>]*> e1a01102 ? mov r1, r2, lsl #2
0+274 <[^>]*> e1a01002 ? mov r1, r2
! 0+278 <[^>]*> e1a01f82 ? mov r1, r2, lsl #31
! 0+27c <[^>]*> e1a01312 ? mov r1, r2, lsl r3
! 0+280 <[^>]*> e1a01122 ? mov r1, r2, lsr #2
! 0+284 <[^>]*> e1a01fa2 ? mov r1, r2, lsr #31
! 0+288 <[^>]*> e1a01022 ? mov r1, r2, lsr #32
! 0+28c <[^>]*> e1a01332 ? mov r1, r2, lsr r3
! 0+290 <[^>]*> e1a01142 ? mov r1, r2, asr #2
! 0+294 <[^>]*> e1a01fc2 ? mov r1, r2, asr #31
! 0+298 <[^>]*> e1a01042 ? mov r1, r2, asr #32
! 0+29c <[^>]*> e1a01352 ? mov r1, r2, asr r3
! 0+2a0 <[^>]*> e1a01162 ? mov r1, r2, ror #2
! 0+2a4 <[^>]*> e1a01fe2 ? mov r1, r2, ror #31
! 0+2a8 <[^>]*> e1a01372 ? mov r1, r2, ror r3
! 0+2ac <[^>]*> e1a01062 ? mov r1, r2, rrx
! 0+2b0 <[^>]*> e1a01102 ? mov r1, r2, lsl #2
0+2b4 <[^>]*> e1a01002 ? mov r1, r2
! 0+2b8 <[^>]*> e1a01f82 ? mov r1, r2, lsl #31
! 0+2bc <[^>]*> e1a01312 ? mov r1, r2, lsl r3
! 0+2c0 <[^>]*> e1a01122 ? mov r1, r2, lsr #2
! 0+2c4 <[^>]*> e1a01fa2 ? mov r1, r2, lsr #31
! 0+2c8 <[^>]*> e1a01022 ? mov r1, r2, lsr #32
! 0+2cc <[^>]*> e1a01332 ? mov r1, r2, lsr r3
! 0+2d0 <[^>]*> e1a01142 ? mov r1, r2, asr #2
! 0+2d4 <[^>]*> e1a01fc2 ? mov r1, r2, asr #31
! 0+2d8 <[^>]*> e1a01042 ? mov r1, r2, asr #32
! 0+2dc <[^>]*> e1a01352 ? mov r1, r2, asr r3
! 0+2e0 <[^>]*> e1a01162 ? mov r1, r2, ror #2
! 0+2e4 <[^>]*> e1a01fe2 ? mov r1, r2, ror #31
! 0+2e8 <[^>]*> e1a01372 ? mov r1, r2, ror r3
! 0+2ec <[^>]*> e1a01062 ? mov r1, r2, rrx
--- 169,203 ----
[ ]*268:.*_wibble.*
0+26c <[^>]*> da...... ? ble 0[0123456789abcdef]+ <[^>]*>
[ ]*26c:.*testerfunc.*
! 0+270 <[^>]*> e1a01102 ? lsl r1, r2, #2
0+274 <[^>]*> e1a01002 ? mov r1, r2
! 0+278 <[^>]*> e1a01f82 ? lsl r1, r2, #31
! 0+27c <[^>]*> e1a01312 ? lsl r1, r2, r3
! 0+280 <[^>]*> e1a01122 ? lsr r1, r2, #2
! 0+284 <[^>]*> e1a01fa2 ? lsr r1, r2, #31
! 0+288 <[^>]*> e1a01022 ? lsr r1, r2, #32
! 0+28c <[^>]*> e1a01332 ? lsr r1, r2, r3
! 0+290 <[^>]*> e1a01142 ? asr r1, r2, #2
! 0+294 <[^>]*> e1a01fc2 ? asr r1, r2, #31
! 0+298 <[^>]*> e1a01042 ? asr r1, r2, #32
! 0+29c <[^>]*> e1a01352 ? asr r1, r2, r3
! 0+2a0 <[^>]*> e1a01162 ? ror r1, r2, #2
! 0+2a4 <[^>]*> e1a01fe2 ? ror r1, r2, #31
! 0+2a8 <[^>]*> e1a01372 ? ror r1, r2, r3
! 0+2ac <[^>]*> e1a01062 ? rrx r1, r2
! 0+2b0 <[^>]*> e1a01102 ? lsl r1, r2, #2
0+2b4 <[^>]*> e1a01002 ? mov r1, r2
! 0+2b8 <[^>]*> e1a01f82 ? lsl r1, r2, #31
! 0+2bc <[^>]*> e1a01312 ? lsl r1, r2, r3
! 0+2c0 <[^>]*> e1a01122 ? lsr r1, r2, #2
! 0+2c4 <[^>]*> e1a01fa2 ? lsr r1, r2, #31
! 0+2c8 <[^>]*> e1a01022 ? lsr r1, r2, #32
! 0+2cc <[^>]*> e1a01332 ? lsr r1, r2, r3
! 0+2d0 <[^>]*> e1a01142 ? asr r1, r2, #2
! 0+2d4 <[^>]*> e1a01fc2 ? asr r1, r2, #31
! 0+2d8 <[^>]*> e1a01042 ? asr r1, r2, #32
! 0+2dc <[^>]*> e1a01352 ? asr r1, r2, r3
! 0+2e0 <[^>]*> e1a01162 ? ror r1, r2, #2
! 0+2e4 <[^>]*> e1a01fe2 ? ror r1, r2, #31
! 0+2e8 <[^>]*> e1a01372 ? ror r1, r2, r3
! 0+2ec <[^>]*> e1a01062 ? rrx r1, r2
Index: gas/testsuite/gas/arm/macro1.d
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/arm/macro1.d,v
retrieving revision 1.2
diff -p -r1.2 macro1.d
*** gas/testsuite/gas/arm/macro1.d 18 May 2005 05:40:09 -0000 1.2
--- gas/testsuite/gas/arm/macro1.d 21 Apr 2007 12:24:25 -0000
***************
*** 6,12 ****
Disassembly of section .text:
! 0+0 <[^>]*> e8bd8030 ? ldmia sp!, {r4, r5, pc}
0+4 <[^>]*> e1a00000 ? nop \(mov r0,r0\)
0+8 <[^>]*> e1a00000 ? nop \(mov r0,r0\)
0+c <[^>]*> e1a00000 ? nop \(mov r0,r0\)
--- 6,12 ----
Disassembly of section .text:
! 0+0 <[^>]*> e8bd8030 ? pop {r4, r5, pc}
0+4 <[^>]*> e1a00000 ? nop \(mov r0,r0\)
0+8 <[^>]*> e1a00000 ? nop \(mov r0,r0\)
0+c <[^>]*> e1a00000 ? nop \(mov r0,r0\)
Index: gas/testsuite/gas/arm/tcompat.d
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/arm/tcompat.d,v
retrieving revision 1.2
diff -p -r1.2 tcompat.d
*** gas/testsuite/gas/arm/tcompat.d 18 May 2005 05:40:10 -0000 1.2
--- gas/testsuite/gas/arm/tcompat.d 21 Apr 2007 12:24:25 -0000
*************** Disassembly of section .text:
*** 12,41 ****
0+04 <[^>]*> e1a09000 ? mov r9, r0
0+08 <[^>]*> e1a00009 ? mov r0, r9
0+0c <[^>]*> e1a0c00e ? mov ip, lr
! 0+10 <[^>]*> 91b09019 ? movlss r9, r9, lsl r0
! 0+14 <[^>]*> 91a00910 ? movls r0, r0, lsl r9
! 0+18 <[^>]*> e1b00880 ? movs r0, r0, lsl #17
! 0+1c <[^>]*> e1a00889 ? mov r0, r9, lsl #17
! 0+20 <[^>]*> 91b09039 ? movlss r9, r9, lsr r0
! 0+24 <[^>]*> 91a00930 ? movls r0, r0, lsr r9
! 0+28 <[^>]*> e1b008a0 ? movs r0, r0, lsr #17
! 0+2c <[^>]*> e1a008a9 ? mov r0, r9, lsr #17
! 0+30 <[^>]*> 91b09059 ? movlss r9, r9, asr r0
! 0+34 <[^>]*> 91a00950 ? movls r0, r0, asr r9
! 0+38 <[^>]*> e1b008c0 ? movs r0, r0, asr #17
! 0+3c <[^>]*> e1a008c9 ? mov r0, r9, asr #17
! 0+40 <[^>]*> 91b09079 ? movlss r9, r9, ror r0
! 0+44 <[^>]*> 91a00970 ? movls r0, r0, ror r9
! 0+48 <[^>]*> e1b008e0 ? movs r0, r0, ror #17
! 0+4c <[^>]*> e1a008e9 ? mov r0, r9, ror #17
0+50 <[^>]*> e2690000 ? rsb r0, r9, #0 ; 0x0
0+54 <[^>]*> e2709000 ? rsbs r9, r0, #0 ; 0x0
0+58 <[^>]*> 92600000 ? rsbls r0, r0, #0 ; 0x0
! 0+5c <[^>]*> 92799000 ? rsblss r9, r9, #0 ; 0x0
! 0+60 <[^>]*> e92d000e ? stmdb sp!, {r1, r2, r3}
! 0+64 <[^>]*> 992d8154 ? stmlsdb sp!, {r2, r4, r6, r8, pc}
! 0+68 <[^>]*> e8bd000e ? ldmia sp!, {r1, r2, r3}
! 0+6c <[^>]*> 98bd8154 ? ldmlsia sp!, {r2, r4, r6, r8, pc}
0+70 <[^>]*> e0000001 ? and r0, r0, r1
0+74 <[^>]*> e0200001 ? eor r0, r0, r1
0+78 <[^>]*> e0400001 ? sub r0, r0, r1
--- 12,41 ----
0+04 <[^>]*> e1a09000 ? mov r9, r0
0+08 <[^>]*> e1a00009 ? mov r0, r9
0+0c <[^>]*> e1a0c00e ? mov ip, lr
! 0+10 <[^>]*> 91b09019 ? lslsls r9, r9, r0
! 0+14 <[^>]*> 91a00910 ? lslls r0, r0, r9
! 0+18 <[^>]*> e1b00880 ? lsls r0, r0, #17
! 0+1c <[^>]*> e1a00889 ? lsl r0, r9, #17
! 0+20 <[^>]*> 91b09039 ? lsrsls r9, r9, r0
! 0+24 <[^>]*> 91a00930 ? lsrls r0, r0, r9
! 0+28 <[^>]*> e1b008a0 ? lsrs r0, r0, #17
! 0+2c <[^>]*> e1a008a9 ? lsr r0, r9, #17
! 0+30 <[^>]*> 91b09059 ? asrsls r9, r9, r0
! 0+34 <[^>]*> 91a00950 ? asrls r0, r0, r9
! 0+38 <[^>]*> e1b008c0 ? asrs r0, r0, #17
! 0+3c <[^>]*> e1a008c9 ? asr r0, r9, #17
! 0+40 <[^>]*> 91b09079 ? rorsls r9, r9, r0
! 0+44 <[^>]*> 91a00970 ? rorls r0, r0, r9
! 0+48 <[^>]*> e1b008e0 ? rors r0, r0, #17
! 0+4c <[^>]*> e1a008e9 ? ror r0, r9, #17
0+50 <[^>]*> e2690000 ? rsb r0, r9, #0 ; 0x0
0+54 <[^>]*> e2709000 ? rsbs r9, r0, #0 ; 0x0
0+58 <[^>]*> 92600000 ? rsbls r0, r0, #0 ; 0x0
! 0+5c <[^>]*> 92799000 ? rsbsls r9, r9, #0 ; 0x0
! 0+60 <[^>]*> e92d000e ? push {r1, r2, r3}
! 0+64 <[^>]*> 992d8154 ? pushls {r2, r4, r6, r8, pc}
! 0+68 <[^>]*> e8bd000e ? pop {r1, r2, r3}
! 0+6c <[^>]*> 98bd8154 ? popls {r2, r4, r6, r8, pc}
0+70 <[^>]*> e0000001 ? and r0, r0, r1
0+74 <[^>]*> e0200001 ? eor r0, r0, r1
0+78 <[^>]*> e0400001 ? sub r0, r0, r1
Index: gas/testsuite/gas/arm/thumb.d
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/arm/thumb.d,v
retrieving revision 1.8
diff -p -r1.8 thumb.d
*** gas/testsuite/gas/arm/thumb.d 16 Mar 2006 15:08:47 -0000 1.8
--- gas/testsuite/gas/arm/thumb.d 21 Apr 2007 12:24:25 -0000
*************** Disassembly of section \.text:
*** 75,81 ****
0+082 <[^>]+> 93ff str r3, \[sp, #1020\]
0+084 <[^>]+> 990b ldr r1, \[sp, #44\]
0+086 <[^>]+> 9a00 ldr r2, \[sp, #0\]
! 0+088 <[^>]+> a7ff add r7, pc, #1020 \(adr r7,0+488 <[^>]+>\)
0+08a <[^>]+> ac80 add r4, sp, #512
0+08c <[^>]+> b043 add sp, #268
0+08e <[^>]+> b09a sub sp, #104
--- 75,81 ----
0+082 <[^>]+> 93ff str r3, \[sp, #1020\]
0+084 <[^>]+> 990b ldr r1, \[sp, #44\]
0+086 <[^>]+> 9a00 ldr r2, \[sp, #0\]
! 0+088 <[^>]+> a7ff add r7, pc, #1020 \(adr r7, 0+488 <[^>]+>\)
0+08a <[^>]+> ac80 add r4, sp, #512
0+08c <[^>]+> b043 add sp, #268
0+08e <[^>]+> b09a sub sp, #104
*************** Disassembly of section \.text:
*** 111,121 ****
0+0ca <[^>]+> b07f add sp, #508
0+0cc <[^>]+> b0ff sub sp, #508
0+0ce <[^>]+> a8ff add r0, sp, #1020
! 0+0d0 <[^>]+> a0ff add r0, pc, #1020 \(adr r0,0+4d0 <[^>]+>\)
0+0d2 <[^>]+> b01a add sp, #104
0+0d4 <[^>]+> b09a sub sp, #104
0+0d6 <[^>]+> a81a add r0, sp, #104
! 0+0d8 <[^>]+> a01a add r0, pc, #104 \(adr r0,0+144 <[^>]+>\)
0+0da <[^>]+> 3168 adds r1, #104
0+0dc <[^>]+> 2668 movs r6, #104
0+0de <[^>]+> 2f68 cmp r7, #104
--- 111,121 ----
0+0ca <[^>]+> b07f add sp, #508
0+0cc <[^>]+> b0ff sub sp, #508
0+0ce <[^>]+> a8ff add r0, sp, #1020
! 0+0d0 <[^>]+> a0ff add r0, pc, #1020 \(adr r0, 0+4d0 <[^>]+>\)
0+0d2 <[^>]+> b01a add sp, #104
0+0d4 <[^>]+> b09a sub sp, #104
0+0d6 <[^>]+> a81a add r0, sp, #104
! 0+0d8 <[^>]+> a01a add r0, pc, #104 \(adr r0, 0+144 <[^>]+>\)
0+0da <[^>]+> 3168 adds r1, #104
0+0dc <[^>]+> 2668 movs r6, #104
0+0de <[^>]+> 2f68 cmp r7, #104
*************** Disassembly of section \.text:
*** 127,133 ****
0+0f0 <[^>]+> eb00000f bl 0+134 <[^>]+>
0+0f4 <[^>]+> e12fff10 bx r0
0+0f8 <[^>]+> ef123456 (swi|svc) 0x00123456
! 0+0fc <[^>]+> a004 add r0, pc, #16 \(adr r0,0+110 <[^>]+>\)
0+0fe <[^>]+> e77f b.n 0+000 <[^>]+>
0+100 <[^>]+> e018 b.n 0+134 <[^>]+>
0+102 <[^>]+> f7ff ff7d bl 0+000 <[^>]+>
--- 127,133 ----
0+0f0 <[^>]+> eb00000f bl 0+134 <[^>]+>
0+0f4 <[^>]+> e12fff10 bx r0
0+0f8 <[^>]+> ef123456 (swi|svc) 0x00123456
! 0+0fc <[^>]+> a004 add r0, pc, #16 \(adr r0, 0+110 <[^>]+>\)
0+0fe <[^>]+> e77f b.n 0+000 <[^>]+>
0+100 <[^>]+> e018 b.n 0+134 <[^>]+>
0+102 <[^>]+> f7ff ff7d bl 0+000 <[^>]+>
Index: gas/testsuite/gas/arm/thumb2_relax.d
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/arm/thumb2_relax.d,v
retrieving revision 1.1
diff -p -r1.1 thumb2_relax.d
*** gas/testsuite/gas/arm/thumb2_relax.d 6 Sep 2005 16:59:24 -0000 1.1
--- gas/testsuite/gas/arm/thumb2_relax.d 21 Apr 2007 12:24:25 -0000
*************** Disassembly of section .text:
*** 142,148 ****
0+1e0 <[^>]+> f8cf 1006 str.w r1, \[pc, #6\] ; 0+1ea <[^>]+>
0+1e4 <[^>]+> f84f 103a str.w r1, \[pc, #-58\] ; 0+1ae <[^>]+>
0+1e8 <[^>]+> bf00 nop
! 0+1ea <[^>]+> a104 add r1, pc, #16 \(adr r1,0+1fc <[^>]+>\)
0+1ec <[^>]+> f20f 010c addw r1, pc, #12 ; 0xc
0+1f0 <[^>]+> f20f 0808 addw r8, pc, #8 ; 0x8
0+1f4 <[^>]+> f20f 0106 addw r1, pc, #6 ; 0x6
--- 142,148 ----
0+1e0 <[^>]+> f8cf 1006 str.w r1, \[pc, #6\] ; 0+1ea <[^>]+>
0+1e4 <[^>]+> f84f 103a str.w r1, \[pc, #-58\] ; 0+1ae <[^>]+>
0+1e8 <[^>]+> bf00 nop
! 0+1ea <[^>]+> a104 add r1, pc, #16 \(adr r1, 0+1fc <[^>]+>\)
0+1ec <[^>]+> f20f 010c addw r1, pc, #12 ; 0xc
0+1f0 <[^>]+> f20f 0808 addw r8, pc, #8 ; 0x8
0+1f4 <[^>]+> f20f 0106 addw r1, pc, #6 ; 0x6
Index: gas/testsuite/gas/arm/thumb32.d
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/arm/thumb32.d,v
retrieving revision 1.20
diff -p -r1.20 thumb32.d
*** gas/testsuite/gas/arm/thumb32.d 24 Mar 2007 01:28:58 -0000 1.20
--- gas/testsuite/gas/arm/thumb32.d 21 Apr 2007 12:24:25 -0000
*************** Disassembly of section .text:
*** 63,71 ****
0[0-9a-f]+ <[^>]+> eb00 0800 add\.w r8, r0, r0
0[0-9a-f]+ <[^>]+> 4401 add r1, r0
0[0-9a-f]+ <[^>]+> 4408 add r0, r1
! 0[0-9a-f]+ <[^>]+> a000 add r0, pc, #0 \(adr r0,[0-9a-f]+ <[^>]+>\)
! 0[0-9a-f]+ <[^>]+> a500 add r5, pc, #0 \(adr r5,[0-9a-f]+ <[^>]+>\)
! 0[0-9a-f]+ <[^>]+> a081 add r0, pc, #516 \(adr r0,[0-9a-f]+ <[^>]+>\)
0[0-9a-f]+ <[^>]+> a800 add r0, sp, #0
0[0-9a-f]+ <[^>]+> ad00 add r5, sp, #0
0[0-9a-f]+ <[^>]+> a881 add r0, sp, #516
--- 63,71 ----
0[0-9a-f]+ <[^>]+> eb00 0800 add\.w r8, r0, r0
0[0-9a-f]+ <[^>]+> 4401 add r1, r0
0[0-9a-f]+ <[^>]+> 4408 add r0, r1
! 0[0-9a-f]+ <[^>]+> a000 add r0, pc, #0 \(adr r0, [0-9a-f]+ <[^>]+>\)
! 0[0-9a-f]+ <[^>]+> a500 add r5, pc, #0 \(adr r5, [0-9a-f]+ <[^>]+>\)
! 0[0-9a-f]+ <[^>]+> a081 add r0, pc, #516 \(adr r0, [0-9a-f]+ <[^>]+>\)
0[0-9a-f]+ <[^>]+> a800 add r0, sp, #0
0[0-9a-f]+ <[^>]+> ad00 add r5, sp, #0
0[0-9a-f]+ <[^>]+> a881 add r0, sp, #516
Index: gas/testsuite/gas/arm/wince_inst.d
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/arm/wince_inst.d,v
retrieving revision 1.4
diff -p -r1.4 wince_inst.d
*** gas/testsuite/gas/arm/wince_inst.d 28 Feb 2007 14:39:15 -0000 1.4
--- gas/testsuite/gas/arm/wince_inst.d 21 Apr 2007 12:24:25 -0000
*************** Disassembly of section .text:
*** 36,42 ****
0+058 <[^>]*> 21a09008 ? movcs r9, r8
0+05c <[^>]*> 31a01003 ? movcc r1, r3
0+060 <[^>]*> e1b00008 ? movs r0, r8
! 0+064 <[^>]*> 31b00007 ? movccs r0, r7
0+068 <[^>]*> e281000a ? add r0, r1, #10 ; 0xa
0+06c <[^>]*> e0832004 ? add r2, r3, r4
0+070 <[^>]*> e0865287 ? add r5, r6, r7, lsl #5
--- 36,42 ----
0+058 <[^>]*> 21a09008 ? movcs r9, r8
0+05c <[^>]*> 31a01003 ? movcc r1, r3
0+060 <[^>]*> e1b00008 ? movs r0, r8
! 0+064 <[^>]*> 31b00007 ? movscc r0, r7
0+068 <[^>]*> e281000a ? add r0, r1, #10 ; 0xa
0+06c <[^>]*> e0832004 ? add r2, r3, r4
0+070 <[^>]*> e0865287 ? add r5, r6, r7, lsl #5
*************** Disassembly of section .text:
*** 116,126 ****
0+198 <[^>]*> e0000291 ? mul r0, r1, r2
0+19c <[^>]*> e0110392 ? muls r1, r2, r3
0+1a0 <[^>]*> 10000091 ? mulne r0, r1, r0
! 0+1a4 <[^>]*> 90190798 ? mullss r9, r8, r7
0+1a8 <[^>]*> e021ba99 ? mla r1, r9, sl, fp
0+1ac <[^>]*> e033c994 ? mlas r3, r4, r9, ip
0+1b0 <[^>]*> b029d798 ? mlalt r9, r8, r7, sp
! 0+1b4 <[^>]*> a034e391 ? mlages r4, r1, r3, lr
0+1b8 <[^>]*> e5910000 ? ldr r0, \[r1\]
0+1bc <[^>]*> e7911002 ? ldr r1, \[r1, r2\]
0+1c0 <[^>]*> e7b32004 ? ldr r2, \[r3, r4\]!
--- 116,126 ----
0+198 <[^>]*> e0000291 ? mul r0, r1, r2
0+19c <[^>]*> e0110392 ? muls r1, r2, r3
0+1a0 <[^>]*> 10000091 ? mulne r0, r1, r0
! 0+1a4 <[^>]*> 90190798 ? mulsls r9, r8, r7
0+1a8 <[^>]*> e021ba99 ? mla r1, r9, sl, fp
0+1ac <[^>]*> e033c994 ? mlas r3, r4, r9, ip
0+1b0 <[^>]*> b029d798 ? mlalt r9, r8, r7, sp
! 0+1b4 <[^>]*> a034e391 ? mlasge r4, r1, r3, lr
0+1b8 <[^>]*> e5910000 ? ldr r0, \[r1\]
0+1bc <[^>]*> e7911002 ? ldr r1, \[r1, r2\]
0+1c0 <[^>]*> e7b32004 ? ldr r2, \[r3, r4\]!
*************** Disassembly of section .text:
*** 132,138 ****
0+1d8 <[^>]*> e6942425 ? ldr r2, \[r4\], r5, lsr #8
0+1dc <[^>]*> e51f0008 ? ldr r0, \[pc, #-8\] ; 0+1dc <[^>]*>
0+1e0 <[^>]*> e5d43000 ? ldrb r3, \[r4\]
! 0+1e4 <[^>]*> 14f85000 ? ldrnebt r5, \[r8\]
0+1e8 <[^>]*> e5810000 ? str r0, \[r1\]
0+1ec <[^>]*> e7811002 ? str r1, \[r1, r2\]
0+1f0 <[^>]*> e7a43003 ? str r3, \[r4, r3\]!
--- 132,138 ----
0+1d8 <[^>]*> e6942425 ? ldr r2, \[r4\], r5, lsr #8
0+1dc <[^>]*> e51f0008 ? ldr r0, \[pc, #-8\] ; 0+1dc <[^>]*>
0+1e0 <[^>]*> e5d43000 ? ldrb r3, \[r4\]
! 0+1e4 <[^>]*> 14f85000 ? ldrbtne r5, \[r8\]
0+1e8 <[^>]*> e5810000 ? str r0, \[r1\]
0+1ec <[^>]*> e7811002 ? str r1, \[r1, r2\]
0+1f0 <[^>]*> e7a43003 ? str r3, \[r4, r3\]!
*************** Disassembly of section .text:
*** 145,165 ****
0+20c <[^>]*> e50f1004 ? str r1, \[pc, #-4\] ; 0+210 <[^>]*>
0+210 <[^>]*> e5c71000 ? strb r1, \[r7\]
0+214 <[^>]*> e4e02000 ? strbt r2, \[r0\]
! 0+218 <[^>]*> e8900002 ? ldmia r0, {r1}
! 0+21c <[^>]*> 09920038 ? ldmeqib r2, {r3, r4, r5}
0+220 <[^>]*> e853ffff ? ldmda r3, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip, sp, lr, pc}\^
0+224 <[^>]*> e93b05ff ? ldmdb fp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, sl}
0+228 <[^>]*> e99100f7 ? ldmib r1, {r0, r1, r2, r4, r5, r6, r7}
! 0+22c <[^>]*> e89201f8 ? ldmia r2, {r3, r4, r5, r6, r7, r8}
0+230 <[^>]*> e9130003 ? ldmdb r3, {r0, r1}
0+234 <[^>]*> e8540300 ? ldmda r4, {r8, r9}\^
! 0+238 <[^>]*> e8800002 ? stmia r0, {r1}
! 0+23c <[^>]*> 09820038 ? stmeqib r2, {r3, r4, r5}
0+240 <[^>]*> e843ffff ? stmda r3, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip, sp, lr, pc}\^
0+244 <[^>]*> e92b05ff ? stmdb fp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, sl}
0+248 <[^>]*> e8010007 ? stmda r1, {r0, r1, r2}
0+24c <[^>]*> e9020018 ? stmdb r2, {r3, r4}
! 0+250 <[^>]*> e8830003 ? stmia r3, {r0, r1}
0+254 <[^>]*> e9c40300 ? stmib r4, {r8, r9}\^
0+258 <[^>]*> ef123456 ? (swi|svc) 0x00123456
0+25c <[^>]*> 2f000033 ? (swi|svc)cs 0x00000033
--- 145,165 ----
0+20c <[^>]*> e50f1004 ? str r1, \[pc, #-4\] ; 0+210 <[^>]*>
0+210 <[^>]*> e5c71000 ? strb r1, \[r7\]
0+214 <[^>]*> e4e02000 ? strbt r2, \[r0\]
! 0+218 <[^>]*> e8900002 ? ldm r0, {r1}
! 0+21c <[^>]*> 09920038 ? ldmibeq r2, {r3, r4, r5}
0+220 <[^>]*> e853ffff ? ldmda r3, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip, sp, lr, pc}\^
0+224 <[^>]*> e93b05ff ? ldmdb fp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, sl}
0+228 <[^>]*> e99100f7 ? ldmib r1, {r0, r1, r2, r4, r5, r6, r7}
! 0+22c <[^>]*> e89201f8 ? ldm r2, {r3, r4, r5, r6, r7, r8}
0+230 <[^>]*> e9130003 ? ldmdb r3, {r0, r1}
0+234 <[^>]*> e8540300 ? ldmda r4, {r8, r9}\^
! 0+238 <[^>]*> e8800002 ? stm r0, {r1}
! 0+23c <[^>]*> 09820038 ? stmibeq r2, {r3, r4, r5}
0+240 <[^>]*> e843ffff ? stmda r3, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, fp, ip, sp, lr, pc}\^
0+244 <[^>]*> e92b05ff ? stmdb fp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, sl}
0+248 <[^>]*> e8010007 ? stmda r1, {r0, r1, r2}
0+24c <[^>]*> e9020018 ? stmdb r2, {r3, r4}
! 0+250 <[^>]*> e8830003 ? stm r3, {r0, r1}
0+254 <[^>]*> e9c40300 ? stmib r4, {r8, r9}\^
0+258 <[^>]*> ef123456 ? (swi|svc) 0x00123456
0+25c <[^>]*> 2f000033 ? (swi|svc)cs 0x00000033
Index: gas/testsuite/gas/arm/xscale.d
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/arm/xscale.d,v
retrieving revision 1.7
diff -p -r1.7 xscale.d
*** gas/testsuite/gas/arm/xscale.d 3 Nov 2003 14:47:37 -0000 1.7
--- gas/testsuite/gas/arm/xscale.d 21 Apr 2007 12:24:25 -0000
*************** Disassembly of section .text:
*** 24,35 ****
0+38 <[^>]*> f7d2f003 pld \[r2, r3\]
0+3c <[^>]*> f754f285 pld \[r4, -r5, lsl #5\]
0+40 <[^>]*> e1c100d0 ldrd r0, \[r1\]
! 0+44 <[^>]*> 01c327d8 ldreqd r2, \[r3, #120\]
! 0+48 <[^>]*> b10540d6 ldrltd r4, \[r5, -r6\]
0+4c <[^>]*> e16a88f9 strd r8, \[sl, #-137\]!
0+50 <[^>]*> e1ac00fd strd r0, \[ip, sp\]!
! 0+54 <[^>]*> 30ce21f0 strccd r2, \[lr\], #16
! 0+58 <[^>]*> 708640f8 strvcd r4, \[r6\], r8
0+5c <[^>]*> e5910000 ldr r0, \[r1\]
0+60 <[^>]*> e5832000 str r2, \[r3\]
0+64 <[^>]*> e321f011 msr CPSR_c, #17 ; 0x11
--- 24,35 ----
0+38 <[^>]*> f7d2f003 pld \[r2, r3\]
0+3c <[^>]*> f754f285 pld \[r4, -r5, lsl #5\]
0+40 <[^>]*> e1c100d0 ldrd r0, \[r1\]
! 0+44 <[^>]*> 01c327d8 ldrdeq r2, \[r3, #120\]
! 0+48 <[^>]*> b10540d6 ldrdlt r4, \[r5, -r6\]
0+4c <[^>]*> e16a88f9 strd r8, \[sl, #-137\]!
0+50 <[^>]*> e1ac00fd strd r0, \[ip, sp\]!
! 0+54 <[^>]*> 30ce21f0 strdcc r2, \[lr\], #16
! 0+58 <[^>]*> 708640f8 strdvc r4, \[r6\], r8
0+5c <[^>]*> e5910000 ldr r0, \[r1\]
0+60 <[^>]*> e5832000 str r2, \[r3\]
0+64 <[^>]*> e321f011 msr CPSR_c, #17 ; 0x11
Index: ld/testsuite/ld-arm/arm-app-abs32.d
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-arm/arm-app-abs32.d,v
retrieving revision 1.4
diff -p -r1.4 arm-app-abs32.d
*** ld/testsuite/ld-arm/arm-app-abs32.d 24 May 2006 17:10:02 -0000 1.4
--- ld/testsuite/ld-arm/arm-app-abs32.d 21 Apr 2007 12:24:37 -0000
*************** start address .*
*** 7,13 ****
Disassembly of section .plt:
.* <.plt>:
! .*: e52de004 str lr, \[sp, #-4\]!
.*: e59fe004 ldr lr, \[pc, #4\] ; .* <\.plt\+0x10>
.*: e08fe00e add lr, pc, lr
.*: e5bef008 ldr pc, \[lr, #8\]!
--- 7,13 ----
Disassembly of section .plt:
.* <.plt>:
! .*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
.*: e59fe004 ldr lr, \[pc, #4\] ; .* <\.plt\+0x10>
.*: e08fe00e add lr, pc, lr
.*: e5bef008 ldr pc, \[lr, #8\]!
*************** Disassembly of section .text:
*** 19,27 ****
.* <_start>:
.*: e1a0c00d mov ip, sp
! .*: e92dd800 stmdb sp!, {fp, ip, lr, pc}
.*: e59f0004 ldr r0, \[pc, #4\] ; .* <.text\+0x14>
! .*: e89d6800 ldmia sp, {fp, sp, lr}
.*: e12fff1e bx lr
.*: .* .*
--- 19,27 ----
.* <_start>:
.*: e1a0c00d mov ip, sp
! .*: e92dd800 push {fp, ip, lr, pc}
.*: e59f0004 ldr r0, \[pc, #4\] ; .* <.text\+0x14>
! .*: e89d6800 ldm sp, {fp, sp, lr}
.*: e12fff1e bx lr
.*: .* .*
Index: ld/testsuite/ld-arm/arm-app.d
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-arm/arm-app.d,v
retrieving revision 1.4
diff -p -r1.4 arm-app.d
*** ld/testsuite/ld-arm/arm-app.d 24 May 2006 17:10:02 -0000 1.4
--- ld/testsuite/ld-arm/arm-app.d 21 Apr 2007 12:24:37 -0000
*************** start address 0x.*
*** 7,13 ****
Disassembly of section .plt:
.* <.plt>:
! .*: e52de004 str lr, \[sp, #-4\]!
.*: e59fe004 ldr lr, \[pc, #4\] ; .* <\.plt\+0x10>
.*: e08fe00e add lr, pc, lr
.*: e5bef008 ldr pc, \[lr, #8\]!
--- 7,13 ----
Disassembly of section .plt:
.* <.plt>:
! .*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
.*: e59fe004 ldr lr, \[pc, #4\] ; .* <\.plt\+0x10>
.*: e08fe00e add lr, pc, lr
.*: e5bef008 ldr pc, \[lr, #8\]!
*************** Disassembly of section .text:
*** 19,34 ****
.* <_start>:
.*: e1a0c00d mov ip, sp
! .*: e92dd800 stmdb sp!, {fp, ip, lr, pc}
.*: eb000001 bl .* <app_func>
! .*: e89d6800 ldmia sp, {fp, sp, lr}
.*: e12fff1e bx lr
.* <app_func>:
.*: e1a0c00d mov ip, sp
! .*: e92dd800 stmdb sp!, {fp, ip, lr, pc}
.*: ebfffff4 bl .* <.text-0xc>
! .*: e89d6800 ldmia sp, {fp, sp, lr}
.*: e12fff1e bx lr
.* <app_func2>:
--- 19,34 ----
.* <_start>:
.*: e1a0c00d mov ip, sp
! .*: e92dd800 push {fp, ip, lr, pc}
.*: eb000001 bl .* <app_func>
! .*: e89d6800 ldm sp, {fp, sp, lr}
.*: e12fff1e bx lr
.* <app_func>:
.*: e1a0c00d mov ip, sp
! .*: e92dd800 push {fp, ip, lr, pc}
.*: ebfffff4 bl .* <.text-0xc>
! .*: e89d6800 ldm sp, {fp, sp, lr}
.*: e12fff1e bx lr
.* <app_func2>:
Index: ld/testsuite/ld-arm/arm-lib-plt32.d
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-arm/arm-lib-plt32.d,v
retrieving revision 1.3
diff -p -r1.3 arm-lib-plt32.d
*** ld/testsuite/ld-arm/arm-lib-plt32.d 24 May 2006 17:10:02 -0000 1.3
--- ld/testsuite/ld-arm/arm-lib-plt32.d 21 Apr 2007 12:24:37 -0000
*************** start address 0x.*
*** 7,13 ****
Disassembly of section .plt:
.* <.plt>:
! .*: e52de004 str lr, \[sp, #-4\]!
.*: e59fe004 ldr lr, \[pc, #4\] ; .* <\.plt\+0x10>
.*: e08fe00e add lr, pc, lr
.*: e5bef008 ldr pc, \[lr, #8\]!
--- 7,13 ----
Disassembly of section .plt:
.* <.plt>:
! .*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
.*: e59fe004 ldr lr, \[pc, #4\] ; .* <\.plt\+0x10>
.*: e08fe00e add lr, pc, lr
.*: e5bef008 ldr pc, \[lr, #8\]!
*************** Disassembly of section .text:
*** 19,27 ****
.* <lib_func1>:
.*: e1a0c00d mov ip, sp
! .*: e92dd800 stmdb sp!, {fp, ip, lr, pc}
! .*: ebfffff9 bl .* <.text-0xc>
! .*: e89d6800 ldmia sp, {fp, sp, lr}
.*: e12fff1e bx lr
.* <lib_func2>:
--- 19,27 ----
.* <lib_func1>:
.*: e1a0c00d mov ip, sp
! .*: e92dd800 push {fp, ip, lr, pc}
! .*: ebfffff9 bl .* <\.text-0xc>
! .*: e89d6800 ldm sp, {fp, sp, lr}
.*: e12fff1e bx lr
.* <lib_func2>:
Index: ld/testsuite/ld-arm/arm-lib.d
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-arm/arm-lib.d,v
retrieving revision 1.4
diff -p -r1.4 arm-lib.d
*** ld/testsuite/ld-arm/arm-lib.d 24 May 2006 17:10:02 -0000 1.4
--- ld/testsuite/ld-arm/arm-lib.d 21 Apr 2007 12:24:37 -0000
*************** start address 0x.*
*** 7,13 ****
Disassembly of section .plt:
.* <.plt>:
! .*: e52de004 str lr, \[sp, #-4\]!
.*: e59fe004 ldr lr, \[pc, #4\] ; .* <\.plt\+0x10>
.*: e08fe00e add lr, pc, lr
.*: e5bef008 ldr pc, \[lr, #8\]!
--- 7,13 ----
Disassembly of section .plt:
.* <.plt>:
! .*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
.*: e59fe004 ldr lr, \[pc, #4\] ; .* <\.plt\+0x10>
.*: e08fe00e add lr, pc, lr
.*: e5bef008 ldr pc, \[lr, #8\]!
*************** Disassembly of section .text:
*** 19,27 ****
.* <lib_func1>:
.*: e1a0c00d mov ip, sp
! .*: e92dd800 stmdb sp!, {fp, ip, lr, pc}
! .*: ebfffff9 bl .* <.text-0xc>
! .*: e89d6800 ldmia sp, {fp, sp, lr}
.*: e12fff1e bx lr
.* <lib_func2>:
--- 19,27 ----
.* <lib_func1>:
.*: e1a0c00d mov ip, sp
! .*: e92dd800 push {fp, ip, lr, pc}
! .*: ebfffff9 bl .* <\.text-0xc>
! .*: e89d6800 ldm sp, {fp, sp, lr}
.*: e12fff1e bx lr
.* <lib_func2>:
Index: ld/testsuite/ld-arm/arm-static-app.d
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-arm/arm-static-app.d,v
retrieving revision 1.2
diff -p -r1.2 arm-static-app.d
*** ld/testsuite/ld-arm/arm-static-app.d 17 Nov 2004 17:50:27 -0000 1.2
--- ld/testsuite/ld-arm/arm-static-app.d 21 Apr 2007 12:24:37 -0000
*************** Disassembly of section .text:
*** 8,23 ****
.* <_start>:
.*: e1a0c00d mov ip, sp
! .*: e92dd800 stmdb sp!, {fp, ip, lr, pc}
.*: eb000001 bl .* <app_func>
! .*: e89d6800 ldmia sp, {fp, sp, lr}
.*: e12fff1e bx lr
.* <app_func>:
.*: e1a0c00d mov ip, sp
! .*: e92dd800 stmdb sp!, {fp, ip, lr, pc}
.*: eb000001 bl .* <app_func2>
! .*: e89d6800 ldmia sp, {fp, sp, lr}
.*: e12fff1e bx lr
.* <app_func2>:
--- 8,23 ----
.* <_start>:
.*: e1a0c00d mov ip, sp
! .*: e92dd800 push {fp, ip, lr, pc}
.*: eb000001 bl .* <app_func>
! .*: e89d6800 ldm sp, {fp, sp, lr}
.*: e12fff1e bx lr
.* <app_func>:
.*: e1a0c00d mov ip, sp
! .*: e92dd800 push {fp, ip, lr, pc}
.*: eb000001 bl .* <app_func2>
! .*: e89d6800 ldm sp, {fp, sp, lr}
.*: e12fff1e bx lr
.* <app_func2>:
Index: ld/testsuite/ld-arm/armthumb-lib.d
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-arm/armthumb-lib.d,v
retrieving revision 1.2
diff -p -r1.2 armthumb-lib.d
*** ld/testsuite/ld-arm/armthumb-lib.d 13 Nov 2006 21:18:36 -0000 1.2
--- ld/testsuite/ld-arm/armthumb-lib.d 21 Apr 2007 12:24:37 -0000
*************** start address 0x.*
*** 7,13 ****
Disassembly of section .plt:
.* <.plt>:
! .*: e52de004 str lr, \[sp, #-4\]!
.*: e59fe004 ldr lr, \[pc, #4\] ; .* <\.plt\+0x10>
.*: e08fe00e add lr, pc, lr
.*: e5bef008 ldr pc, \[lr, #8\]!
--- 7,13 ----
Disassembly of section .plt:
.* <.plt>:
! .*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
.*: e59fe004 ldr lr, \[pc, #4\] ; .* <\.plt\+0x10>
.*: e08fe00e add lr, pc, lr
.*: e5bef008 ldr pc, \[lr, #8\]!
*************** Disassembly of section .text:
*** 19,27 ****
.* <lib_func1>:
.*: e1a0c00d mov ip, sp
! .*: e92dd800 stmdb sp!, {fp, ip, lr, pc}
.*: ebfffff. bl .* <.text-0x..?>
! .*: e89d6800 ldmia sp, {fp, sp, lr}
.*: e12fff1e bx lr
.*: e1a00000 nop \(mov r0,r0\)
.*: e1a00000 nop \(mov r0,r0\)
--- 19,27 ----
.* <lib_func1>:
.*: e1a0c00d mov ip, sp
! .*: e92dd800 push {fp, ip, lr, pc}
.*: ebfffff. bl .* <.text-0x..?>
! .*: e89d6800 ldm sp, {fp, sp, lr}
.*: e12fff1e bx lr
.*: e1a00000 nop \(mov r0,r0\)
.*: e1a00000 nop \(mov r0,r0\)
Index: ld/testsuite/ld-arm/mixed-app-v5.d
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-arm/mixed-app-v5.d,v
retrieving revision 1.2
diff -p -r1.2 mixed-app-v5.d
*** ld/testsuite/ld-arm/mixed-app-v5.d 24 May 2006 17:10:02 -0000 1.2
--- ld/testsuite/ld-arm/mixed-app-v5.d 21 Apr 2007 12:24:37 -0000
*************** start address 0x.*
*** 7,13 ****
Disassembly of section .plt:
.* <.plt>:
! .*: e52de004 str lr, \[sp, #-4\]!
.*: e59fe004 ldr lr, \[pc, #4\] ; .* <\.plt\+0x10>
.*: e08fe00e add lr, pc, lr
.*: e5bef008 ldr pc, \[lr, #8\]!
--- 7,13 ----
Disassembly of section .plt:
.* <.plt>:
! .*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
.*: e59fe004 ldr lr, \[pc, #4\] ; .* <\.plt\+0x10>
.*: e08fe00e add lr, pc, lr
.*: e5bef008 ldr pc, \[lr, #8\]!
*************** Disassembly of section .text:
*** 22,30 ****
.* <_start>:
.*: e1a0c00d mov ip, sp
! .*: e92dd800 stmdb sp!, {fp, ip, lr, pc}
.*: eb000004 bl .* <app_func>
! .*: e89d6800 ldmia sp, {fp, sp, lr}
.*: e12fff1e bx lr
.*: e1a00000 nop \(mov r0,r0\)
.*: e1a00000 nop \(mov r0,r0\)
--- 22,30 ----
.* <_start>:
.*: e1a0c00d mov ip, sp
! .*: e92dd800 push {fp, ip, lr, pc}
.*: eb000004 bl .* <app_func>
! .*: e89d6800 ldm sp, {fp, sp, lr}
.*: e12fff1e bx lr
.*: e1a00000 nop \(mov r0,r0\)
.*: e1a00000 nop \(mov r0,r0\)
*************** Disassembly of section .text:
*** 32,40 ****
.* <app_func>:
.*: e1a0c00d mov ip, sp
! .*: e92dd800 stmdb sp!, {fp, ip, lr, pc}
.*: ebfffff. bl .*
! .*: e89d6800 ldmia sp, {fp, sp, lr}
.*: e12fff1e bx lr
.*: e1a00000 nop \(mov r0,r0\)
.*: e1a00000 nop \(mov r0,r0\)
--- 32,40 ----
.* <app_func>:
.*: e1a0c00d mov ip, sp
! .*: e92dd800 push {fp, ip, lr, pc}
.*: ebfffff. bl .*
! .*: e89d6800 ldm sp, {fp, sp, lr}
.*: e12fff1e bx lr
.*: e1a00000 nop \(mov r0,r0\)
.*: e1a00000 nop \(mov r0,r0\)
Index: ld/testsuite/ld-arm/mixed-app.d
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-arm/mixed-app.d,v
retrieving revision 1.7
diff -p -r1.7 mixed-app.d
*** ld/testsuite/ld-arm/mixed-app.d 22 Nov 2006 17:45:56 -0000 1.7
--- ld/testsuite/ld-arm/mixed-app.d 21 Apr 2007 12:24:37 -0000
*************** start address 0x.*
*** 7,13 ****
Disassembly of section .plt:
.* <.plt>:
! .*: e52de004 str lr, \[sp, #-4\]!
.*: e59fe004 ldr lr, \[pc, #4\] ; .* <\.plt\+0x10>
.*: e08fe00e add lr, pc, lr
.*: e5bef008 ldr pc, \[lr, #8\]!
--- 7,13 ----
Disassembly of section .plt:
.* <.plt>:
! .*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
.*: e59fe004 ldr lr, \[pc, #4\] ; .* <\.plt\+0x10>
.*: e08fe00e add lr, pc, lr
.*: e5bef008 ldr pc, \[lr, #8\]!
*************** Disassembly of section .text:
*** 24,32 ****
.* <_start>:
.*: e1a0c00d mov ip, sp
! .*: e92dd800 stmdb sp!, {fp, ip, lr, pc}
.*: eb000004 bl .* <app_func>
! .*: e89d6800 ldmia sp, {fp, sp, lr}
.*: e12fff1e bx lr
.*: e1a00000 nop \(mov r0,r0\)
.*: e1a00000 nop \(mov r0,r0\)
--- 24,32 ----
.* <_start>:
.*: e1a0c00d mov ip, sp
! .*: e92dd800 push {fp, ip, lr, pc}
.*: eb000004 bl .* <app_func>
! .*: e89d6800 ldm sp, {fp, sp, lr}
.*: e12fff1e bx lr
.*: e1a00000 nop \(mov r0,r0\)
.*: e1a00000 nop \(mov r0,r0\)
*************** Disassembly of section .text:
*** 34,42 ****
.* <app_func>:
.*: e1a0c00d mov ip, sp
! .*: e92dd800 stmdb sp!, {fp, ip, lr, pc}
.*: ebffff.. bl .*
! .*: e89d6800 ldmia sp, {fp, sp, lr}
.*: e12fff1e bx lr
.*: e1a00000 nop \(mov r0,r0\)
.*: e1a00000 nop \(mov r0,r0\)
--- 34,42 ----
.* <app_func>:
.*: e1a0c00d mov ip, sp
! .*: e92dd800 push {fp, ip, lr, pc}
.*: ebffff.. bl .*
! .*: e89d6800 ldm sp, {fp, sp, lr}
.*: e12fff1e bx lr
.*: e1a00000 nop \(mov r0,r0\)
.*: e1a00000 nop \(mov r0,r0\)
Index: ld/testsuite/ld-arm/mixed-lib.d
===================================================================
RCS file: /cvs/src/src/ld/testsuite/ld-arm/mixed-lib.d,v
retrieving revision 1.3
diff -p -r1.3 mixed-lib.d
*** ld/testsuite/ld-arm/mixed-lib.d 13 Nov 2006 21:18:36 -0000 1.3
--- ld/testsuite/ld-arm/mixed-lib.d 21 Apr 2007 12:24:37 -0000
*************** start address 0x.*
*** 7,13 ****
Disassembly of section .plt:
.* <.plt>:
! .*: e52de004 str lr, \[sp, #-4\]!
.*: e59fe004 ldr lr, \[pc, #4\] ; .* <\.plt\+0x10>
.*: e08fe00e add lr, pc, lr
.*: e5bef008 ldr pc, \[lr, #8\]!
--- 7,13 ----
Disassembly of section .plt:
.* <.plt>:
! .*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
.*: e59fe004 ldr lr, \[pc, #4\] ; .* <\.plt\+0x10>
.*: e08fe00e add lr, pc, lr
.*: e5bef008 ldr pc, \[lr, #8\]!
*************** Disassembly of section .text:
*** 19,27 ****
.* <lib_func1>:
.*: e1a0c00d mov ip, sp
! .*: e92dd800 stmdb sp!, {fp, ip, lr, pc}
.*: ebfffff. bl .* <.text-0x..?>
! .*: e89d6800 ldmia sp, {fp, sp, lr}
.*: e12fff1e bx lr
.*: e1a00000 nop \(mov r0,r0\)
.*: e1a00000 nop \(mov r0,r0\)
--- 19,27 ----
.* <lib_func1>:
.*: e1a0c00d mov ip, sp
! .*: e92dd800 push {fp, ip, lr, pc}
.*: ebfffff. bl .* <.text-0x..?>
! .*: e89d6800 ldm sp, {fp, sp, lr}
.*: e12fff1e bx lr
.*: e1a00000 nop \(mov r0,r0\)
.*: e1a00000 nop \(mov r0,r0\)
Index: opcodes/arm-dis.c
===================================================================
RCS file: /cvs/src/src/opcodes/arm-dis.c,v
retrieving revision 1.81
diff -p -r1.81 arm-dis.c
*** opcodes/arm-dis.c 20 Apr 2007 00:00:21 -0000 1.81
--- opcodes/arm-dis.c 21 Apr 2007 12:24:41 -0000
*************** struct opcode16
*** 63,68 ****
--- 63,69 ----
%% %
%c print condition code (always bits 28-31 in ARM mode)
+ %q print shifter argument
%u print condition code (unconditional in ARM mode)
%A print address for ldc/stc/ldf/stf instruction
%B print vstm/vldm register list
*************** static const struct opcode32 coprocessor
*** 436,443 ****
{ARM_EXT_V2, 0x0e000000, 0x0f000010, "cdp%c\t%8-11d, %20-23d, cr%12-15d, cr%16-19d, cr%0-3d, {%5-7d}"},
{ARM_EXT_V2, 0x0e100010, 0x0f100010, "mrc%c\t%8-11d, %21-23d, %12-15r, cr%16-19d, cr%0-3d, {%5-7d}"},
{ARM_EXT_V2, 0x0e000010, 0x0f100010, "mcr%c\t%8-11d, %21-23d, %12-15r, cr%16-19d, cr%0-3d, {%5-7d}"},
! {ARM_EXT_V2, 0x0c000000, 0x0e100000, "stc%c%22'l\t%8-11d, cr%12-15d, %A"},
! {ARM_EXT_V2, 0x0c100000, 0x0e100000, "ldc%c%22'l\t%8-11d, cr%12-15d, %A"},
/* V6 coprocessor instructions */
{ARM_EXT_V6, 0xfc500000, 0xfff00000, "mrrc2%c\t%8-11d, %4-7d, %12-15r, %16-19r, cr%0-3d"},
--- 437,444 ----
{ARM_EXT_V2, 0x0e000000, 0x0f000010, "cdp%c\t%8-11d, %20-23d, cr%12-15d, cr%16-19d, cr%0-3d, {%5-7d}"},
{ARM_EXT_V2, 0x0e100010, 0x0f100010, "mrc%c\t%8-11d, %21-23d, %12-15r, cr%16-19d, cr%0-3d, {%5-7d}"},
{ARM_EXT_V2, 0x0e000010, 0x0f100010, "mcr%c\t%8-11d, %21-23d, %12-15r, cr%16-19d, cr%0-3d, {%5-7d}"},
! {ARM_EXT_V2, 0x0c000000, 0x0e100000, "stc%22'l%c\t%8-11d, cr%12-15d, %A"},
! {ARM_EXT_V2, 0x0c100000, 0x0e100000, "ldc%22'l%c\t%8-11d, cr%12-15d, %A"},
/* V6 coprocessor instructions */
{ARM_EXT_V6, 0xfc500000, 0xfff00000, "mrrc2%c\t%8-11d, %4-7d, %12-15r, %16-19r, cr%0-3d"},
*************** static const struct opcode32 arm_opcodes
*** 770,780 ****
/* ARM instructions. */
{ARM_EXT_V1, 0xe1a00000, 0xffffffff, "nop\t\t\t(mov r0,r0)"},
{ARM_EXT_V4T | ARM_EXT_V5, 0x012FFF10, 0x0ffffff0, "bx%c\t%0-3r"},
! {ARM_EXT_V2, 0x00000090, 0x0fe000f0, "mul%c%20's\t%16-19r, %0-3r, %8-11r"},
! {ARM_EXT_V2, 0x00200090, 0x0fe000f0, "mla%c%20's\t%16-19r, %0-3r, %8-11r, %12-15r"},
! {ARM_EXT_V2S, 0x01000090, 0x0fb00ff0, "swp%c%22'b\t%12-15r, %0-3r, [%16-19r]"},
! {ARM_EXT_V3M, 0x00800090, 0x0fa000f0, "%22?sumull%c%20's\t%12-15r, %16-19r, %0-3r, %8-11r"},
! {ARM_EXT_V3M, 0x00a00090, 0x0fa000f0, "%22?sumlal%c%20's\t%12-15r, %16-19r, %0-3r, %8-11r"},
/* V7 instructions. */
{ARM_EXT_V7, 0xf450f000, 0xfd70f000, "pli\t%P"},
--- 771,781 ----
/* ARM instructions. */
{ARM_EXT_V1, 0xe1a00000, 0xffffffff, "nop\t\t\t(mov r0,r0)"},
{ARM_EXT_V4T | ARM_EXT_V5, 0x012FFF10, 0x0ffffff0, "bx%c\t%0-3r"},
! {ARM_EXT_V2, 0x00000090, 0x0fe000f0, "mul%20's%c\t%16-19r, %0-3r, %8-11r"},
! {ARM_EXT_V2, 0x00200090, 0x0fe000f0, "mla%20's%c\t%16-19r, %0-3r, %8-11r, %12-15r"},
! {ARM_EXT_V2S, 0x01000090, 0x0fb00ff0, "swp%22'b%c\t%12-15r, %0-3r, [%16-19r]"},
! {ARM_EXT_V3M, 0x00800090, 0x0fa000f0, "%22?sumull%20's%c\t%12-15r, %16-19r, %0-3r, %8-11r"},
! {ARM_EXT_V3M, 0x00a00090, 0x0fa000f0, "%22?sumlal%20's%c\t%12-15r, %16-19r, %0-3r, %8-11r"},
/* V7 instructions. */
{ARM_EXT_V7, 0xf450f000, 0xfd70f000, "pli\t%P"},
*************** static const struct opcode32 arm_opcodes
*** 787,794 ****
{ARM_EXT_V6T2, 0x07c0001f, 0x0fe0007f, "bfc%c\t%12-15r, %E"},
{ARM_EXT_V6T2, 0x07c00010, 0x0fe00070, "bfi%c\t%12-15r, %0-3r, %E"},
{ARM_EXT_V6T2, 0x00600090, 0x0ff000f0, "mls%c\t%16-19r, %0-3r, %8-11r, %12-15r"},
! {ARM_EXT_V6T2, 0x006000b0, 0x0f7000f0, "str%cht\t%12-15r, %s"},
! {ARM_EXT_V6T2, 0x00300090, 0x0f300090, "ldr%c%6's%5?hbt\t%12-15r, %s"},
{ARM_EXT_V6T2, 0x03000000, 0x0ff00000, "movw%c\t%12-15r, %V"},
{ARM_EXT_V6T2, 0x03400000, 0x0ff00000, "movt%c\t%12-15r, %V"},
{ARM_EXT_V6T2, 0x06ff0f30, 0x0fff0ff0, "rbit%c\t%12-15r, %0-3r"},
--- 788,795 ----
{ARM_EXT_V6T2, 0x07c0001f, 0x0fe0007f, "bfc%c\t%12-15r, %E"},
{ARM_EXT_V6T2, 0x07c00010, 0x0fe00070, "bfi%c\t%12-15r, %0-3r, %E"},
{ARM_EXT_V6T2, 0x00600090, 0x0ff000f0, "mls%c\t%16-19r, %0-3r, %8-11r, %12-15r"},
! {ARM_EXT_V6T2, 0x006000b0, 0x0f7000f0, "strht%c\t%12-15r, %s"},
! {ARM_EXT_V6T2, 0x00300090, 0x0f300090, "ldr%6's%5?hbt%c\t%12-15r, %s"},
{ARM_EXT_V6T2, 0x03000000, 0x0ff00000, "movw%c\t%12-15r, %V"},
{ARM_EXT_V6T2, 0x03400000, 0x0ff00000, "movt%c\t%12-15r, %V"},
{ARM_EXT_V6T2, 0x06ff0f30, 0x0fff0ff0, "rbit%c\t%12-15r, %0-3r"},
*************** static const struct opcode32 arm_opcodes
*** 820,828 ****
{ARM_EXT_V6, 0xf10e0000, 0xfffffe20, "cpsid\t%8'a%7'i%6'f,#%0-4d"},
{ARM_EXT_V6, 0xf1000000, 0xfff1fe20, "cps\t#%0-4d"},
{ARM_EXT_V6, 0x06800010, 0x0ff00ff0, "pkhbt%c\t%12-15r, %16-19r, %0-3r"},
! {ARM_EXT_V6, 0x06800010, 0x0ff00070, "pkhbt%c\t%12-15r, %16-19r, %0-3r, LSL #%7-11d"},
! {ARM_EXT_V6, 0x06800050, 0x0ff00ff0, "pkhtb%c\t%12-15r, %16-19r, %0-3r, ASR #32"},
! {ARM_EXT_V6, 0x06800050, 0x0ff00070, "pkhtb%c\t%12-15r, %16-19r, %0-3r, ASR #%7-11d"},
{ARM_EXT_V6, 0x01900f9f, 0x0ff00fff, "ldrex%c\tr%12-15d, [%16-19r]"},
{ARM_EXT_V6, 0x06200f10, 0x0ff00ff0, "qadd16%c\t%12-15r, %16-19r, %0-3r"},
{ARM_EXT_V6, 0x06200f90, 0x0ff00ff0, "qadd8%c\t%12-15r, %16-19r, %0-3r"},
--- 821,829 ----
{ARM_EXT_V6, 0xf10e0000, 0xfffffe20, "cpsid\t%8'a%7'i%6'f,#%0-4d"},
{ARM_EXT_V6, 0xf1000000, 0xfff1fe20, "cps\t#%0-4d"},
{ARM_EXT_V6, 0x06800010, 0x0ff00ff0, "pkhbt%c\t%12-15r, %16-19r, %0-3r"},
! {ARM_EXT_V6, 0x06800010, 0x0ff00070, "pkhbt%c\t%12-15r, %16-19r, %0-3r, lsl #%7-11d"},
! {ARM_EXT_V6, 0x06800050, 0x0ff00ff0, "pkhtb%c\t%12-15r, %16-19r, %0-3r, asr #32"},
! {ARM_EXT_V6, 0x06800050, 0x0ff00070, "pkhtb%c\t%12-15r, %16-19r, %0-3r, asr #%7-11d"},
{ARM_EXT_V6, 0x01900f9f, 0x0ff00fff, "ldrex%c\tr%12-15d, [%16-19r]"},
{ARM_EXT_V6, 0x06200f10, 0x0ff00ff0, "qadd16%c\t%12-15r, %16-19r, %0-3r"},
{ARM_EXT_V6, 0x06200f90, 0x0ff00ff0, "qadd8%c\t%12-15r, %16-19r, %0-3r"},
*************** static const struct opcode32 arm_opcodes
*** 864,917 ****
{ARM_EXT_V6, 0x06bf0fb0, 0x0fff0ff0, "rev16%c\t\%12-15r, %0-3r"},
{ARM_EXT_V6, 0x06ff0fb0, 0x0fff0ff0, "revsh%c\t\%12-15r, %0-3r"},
{ARM_EXT_V6, 0xf8100a00, 0xfe50ffff, "rfe%23?id%24?ba\t\%16-19r%21'!"},
! {ARM_EXT_V6, 0x06bf0070, 0x0fff0ff0, "sxth%c %12-15r,%0-3r"},
! {ARM_EXT_V6, 0x06bf0470, 0x0fff0ff0, "sxth%c %12-15r,%0-3r, ROR #8"},
! {ARM_EXT_V6, 0x06bf0870, 0x0fff0ff0, "sxth%c %12-15r,%0-3r, ROR #16"},
! {ARM_EXT_V6, 0x06bf0c70, 0x0fff0ff0, "sxth%c %12-15r,%0-3r, ROR #24"},
! {ARM_EXT_V6, 0x068f0070, 0x0fff0ff0, "sxtb16%c %12-15r,%0-3r"},
! {ARM_EXT_V6, 0x068f0470, 0x0fff0ff0, "sxtb16%c %12-15r,%0-3r, ROR #8"},
! {ARM_EXT_V6, 0x068f0870, 0x0fff0ff0, "sxtb16%c %12-15r,%0-3r, ROR #16"},
! {ARM_EXT_V6, 0x068f0c70, 0x0fff0ff0, "sxtb16%c %12-15r,%0-3r, ROR #24"},
! {ARM_EXT_V6, 0x06af0070, 0x0fff0ff0, "sxtb%c %12-15r,%0-3r"},
! {ARM_EXT_V6, 0x06af0470, 0x0fff0ff0, "sxtb%c %12-15r,%0-3r, ROR #8"},
! {ARM_EXT_V6, 0x06af0870, 0x0fff0ff0, "sxtb%c %12-15r,%0-3r, ROR #16"},
! {ARM_EXT_V6, 0x06af0c70, 0x0fff0ff0, "sxtb%c %12-15r,%0-3r, ROR #24"},
! {ARM_EXT_V6, 0x06ff0070, 0x0fff0ff0, "uxth%c %12-15r,%0-3r"},
! {ARM_EXT_V6, 0x06ff0470, 0x0fff0ff0, "uxth%c %12-15r,%0-3r, ROR #8"},
! {ARM_EXT_V6, 0x06ff0870, 0x0fff0ff0, "uxth%c %12-15r,%0-3r, ROR #16"},
! {ARM_EXT_V6, 0x06ff0c70, 0x0fff0ff0, "uxth%c %12-15r,%0-3r, ROR #24"},
! {ARM_EXT_V6, 0x06cf0070, 0x0fff0ff0, "uxtb16%c %12-15r,%0-3r"},
! {ARM_EXT_V6, 0x06cf0470, 0x0fff0ff0, "uxtb16%c %12-15r,%0-3r, ROR #8"},
! {ARM_EXT_V6, 0x06cf0870, 0x0fff0ff0, "uxtb16%c %12-15r,%0-3r, ROR #16"},
! {ARM_EXT_V6, 0x06cf0c70, 0x0fff0ff0, "uxtb16%c %12-15r,%0-3r, ROR #24"},
! {ARM_EXT_V6, 0x06ef0070, 0x0fff0ff0, "uxtb%c %12-15r,%0-3r"},
! {ARM_EXT_V6, 0x06ef0470, 0x0fff0ff0, "uxtb%c %12-15r,%0-3r, ROR #8"},
! {ARM_EXT_V6, 0x06ef0870, 0x0fff0ff0, "uxtb%c %12-15r,%0-3r, ROR #16"},
! {ARM_EXT_V6, 0x06ef0c70, 0x0fff0ff0, "uxtb%c %12-15r,%0-3r, ROR #24"},
{ARM_EXT_V6, 0x06b00070, 0x0ff00ff0, "sxtah%c\t%12-15r, %16-19r, %0-3r"},
! {ARM_EXT_V6, 0x06b00470, 0x0ff00ff0, "sxtah%c\t%12-15r, %16-19r, %0-3r, ROR #8"},
! {ARM_EXT_V6, 0x06b00870, 0x0ff00ff0, "sxtah%c\t%12-15r, %16-19r, %0-3r, ROR #16"},
! {ARM_EXT_V6, 0x06b00c70, 0x0ff00ff0, "sxtah%c\t%12-15r, %16-19r, %0-3r, ROR #24"},
{ARM_EXT_V6, 0x06800070, 0x0ff00ff0, "sxtab16%c\t%12-15r, %16-19r, %0-3r"},
! {ARM_EXT_V6, 0x06800470, 0x0ff00ff0, "sxtab16%c\t%12-15r, %16-19r, %0-3r, ROR #8"},
! {ARM_EXT_V6, 0x06800870, 0x0ff00ff0, "sxtab16%c\t%12-15r, %16-19r, %0-3r, ROR #16"},
! {ARM_EXT_V6, 0x06800c70, 0x0ff00ff0, "sxtab16%c\t%12-15r, %16-19r, %0-3r, ROR #24"},
{ARM_EXT_V6, 0x06a00070, 0x0ff00ff0, "sxtab%c\t%12-15r, %16-19r, %0-3r"},
! {ARM_EXT_V6, 0x06a00470, 0x0ff00ff0, "sxtab%c\t%12-15r, %16-19r, %0-3r, ROR #8"},
! {ARM_EXT_V6, 0x06a00870, 0x0ff00ff0, "sxtab%c\t%12-15r, %16-19r, %0-3r, ROR #16"},
! {ARM_EXT_V6, 0x06a00c70, 0x0ff00ff0, "sxtab%c\t%12-15r, %16-19r, %0-3r, ROR #24"},
{ARM_EXT_V6, 0x06f00070, 0x0ff00ff0, "uxtah%c\t%12-15r, %16-19r, %0-3r"},
! {ARM_EXT_V6, 0x06f00470, 0x0ff00ff0, "uxtah%c\t%12-15r, %16-19r, %0-3r, ROR #8"},
! {ARM_EXT_V6, 0x06f00870, 0x0ff00ff0, "uxtah%c\t%12-15r, %16-19r, %0-3r, ROR #16"},
! {ARM_EXT_V6, 0x06f00c70, 0x0ff00ff0, "uxtah%c\t%12-15r, %16-19r, %0-3r, ROR #24"},
{ARM_EXT_V6, 0x06c00070, 0x0ff00ff0, "uxtab16%c\t%12-15r, %16-19r, %0-3r"},
! {ARM_EXT_V6, 0x06c00470, 0x0ff00ff0, "uxtab16%c\t%12-15r, %16-19r, %0-3r, ROR #8"},
! {ARM_EXT_V6, 0x06c00870, 0x0ff00ff0, "uxtab16%c\t%12-15r, %16-19r, %0-3r, ROR #16"},
{ARM_EXT_V6, 0x06c00c70, 0x0ff00ff0, "uxtab16%c\t%12-15r, %16-19r, %0-3r, ROR #24"},
{ARM_EXT_V6, 0x06e00070, 0x0ff00ff0, "uxtab%c\t%12-15r, %16-19r, %0-3r"},
! {ARM_EXT_V6, 0x06e00470, 0x0ff00ff0, "uxtab%c\t%12-15r, %16-19r, %0-3r, ROR #8"},
! {ARM_EXT_V6, 0x06e00870, 0x0ff00ff0, "uxtab%c\t%12-15r, %16-19r, %0-3r, ROR #16"},
! {ARM_EXT_V6, 0x06e00c70, 0x0ff00ff0, "uxtab%c\t%12-15r, %16-19r, %0-3r, ROR #24"},
{ARM_EXT_V6, 0x06800fb0, 0x0ff00ff0, "sel%c\t%12-15r, %16-19r, %0-3r"},
{ARM_EXT_V6, 0xf1010000, 0xfffffc00, "setend\t%9?ble"},
{ARM_EXT_V6, 0x0700f010, 0x0ff0f0d0, "smuad%5'x%c\t%16-19r, %0-3r, %8-11r"},
--- 865,918 ----
{ARM_EXT_V6, 0x06bf0fb0, 0x0fff0ff0, "rev16%c\t\%12-15r, %0-3r"},
{ARM_EXT_V6, 0x06ff0fb0, 0x0fff0ff0, "revsh%c\t\%12-15r, %0-3r"},
{ARM_EXT_V6, 0xf8100a00, 0xfe50ffff, "rfe%23?id%24?ba\t\%16-19r%21'!"},
! {ARM_EXT_V6, 0x06bf0070, 0x0fff0ff0, "sxth%c\t%12-15r, %0-3r"},
! {ARM_EXT_V6, 0x06bf0470, 0x0fff0ff0, "sxth%c\t%12-15r, %0-3r, ror #8"},
! {ARM_EXT_V6, 0x06bf0870, 0x0fff0ff0, "sxth%c\t%12-15r, %0-3r, ror #16"},
! {ARM_EXT_V6, 0x06bf0c70, 0x0fff0ff0, "sxth%c\t%12-15r, %0-3r, ror #24"},
! {ARM_EXT_V6, 0x068f0070, 0x0fff0ff0, "sxtb16%c\t%12-15r, %0-3r"},
! {ARM_EXT_V6, 0x068f0470, 0x0fff0ff0, "sxtb16%c\t%12-15r, %0-3r, ror #8"},
! {ARM_EXT_V6, 0x068f0870, 0x0fff0ff0, "sxtb16%c\t%12-15r, %0-3r, ror #16"},
! {ARM_EXT_V6, 0x068f0c70, 0x0fff0ff0, "sxtb16%c\t%12-15r, %0-3r, ror #24"},
! {ARM_EXT_V6, 0x06af0070, 0x0fff0ff0, "sxtb%c\t%12-15r, %0-3r"},
! {ARM_EXT_V6, 0x06af0470, 0x0fff0ff0, "sxtb%c\t%12-15r, %0-3r, ror #8"},
! {ARM_EXT_V6, 0x06af0870, 0x0fff0ff0, "sxtb%c\t%12-15r, %0-3r, ror #16"},
! {ARM_EXT_V6, 0x06af0c70, 0x0fff0ff0, "sxtb%c\t%12-15r, %0-3r, ror #24"},
! {ARM_EXT_V6, 0x06ff0070, 0x0fff0ff0, "uxth%c\t%12-15r, %0-3r"},
! {ARM_EXT_V6, 0x06ff0470, 0x0fff0ff0, "uxth%c\t%12-15r, %0-3r, ror #8"},
! {ARM_EXT_V6, 0x06ff0870, 0x0fff0ff0, "uxth%c\t%12-15r, %0-3r, ror #16"},
! {ARM_EXT_V6, 0x06ff0c70, 0x0fff0ff0, "uxth%c\t%12-15r, %0-3r, ror #24"},
! {ARM_EXT_V6, 0x06cf0070, 0x0fff0ff0, "uxtb16%c\t%12-15r, %0-3r"},
! {ARM_EXT_V6, 0x06cf0470, 0x0fff0ff0, "uxtb16%c\t%12-15r, %0-3r, ror #8"},
! {ARM_EXT_V6, 0x06cf0870, 0x0fff0ff0, "uxtb16%c\t%12-15r, %0-3r, ror #16"},
! {ARM_EXT_V6, 0x06cf0c70, 0x0fff0ff0, "uxtb16%c\t%12-15r, %0-3r, ror #24"},
! {ARM_EXT_V6, 0x06ef0070, 0x0fff0ff0, "uxtb%c\t%12-15r, %0-3r"},
! {ARM_EXT_V6, 0x06ef0470, 0x0fff0ff0, "uxtb%c\t%12-15r, %0-3r, ror #8"},
! {ARM_EXT_V6, 0x06ef0870, 0x0fff0ff0, "uxtb%c\t%12-15r, %0-3r, ror #16"},
! {ARM_EXT_V6, 0x06ef0c70, 0x0fff0ff0, "uxtb%c\t%12-15r, %0-3r, ror #24"},
{ARM_EXT_V6, 0x06b00070, 0x0ff00ff0, "sxtah%c\t%12-15r, %16-19r, %0-3r"},
! {ARM_EXT_V6, 0x06b00470, 0x0ff00ff0, "sxtah%c\t%12-15r, %16-19r, %0-3r, ror #8"},
! {ARM_EXT_V6, 0x06b00870, 0x0ff00ff0, "sxtah%c\t%12-15r, %16-19r, %0-3r, ror #16"},
! {ARM_EXT_V6, 0x06b00c70, 0x0ff00ff0, "sxtah%c\t%12-15r, %16-19r, %0-3r, ror #24"},
{ARM_EXT_V6, 0x06800070, 0x0ff00ff0, "sxtab16%c\t%12-15r, %16-19r, %0-3r"},
! {ARM_EXT_V6, 0x06800470, 0x0ff00ff0, "sxtab16%c\t%12-15r, %16-19r, %0-3r, ror #8"},
! {ARM_EXT_V6, 0x06800870, 0x0ff00ff0, "sxtab16%c\t%12-15r, %16-19r, %0-3r, ror #16"},
! {ARM_EXT_V6, 0x06800c70, 0x0ff00ff0, "sxtab16%c\t%12-15r, %16-19r, %0-3r, ror #24"},
{ARM_EXT_V6, 0x06a00070, 0x0ff00ff0, "sxtab%c\t%12-15r, %16-19r, %0-3r"},
! {ARM_EXT_V6, 0x06a00470, 0x0ff00ff0, "sxtab%c\t%12-15r, %16-19r, %0-3r, ror #8"},
! {ARM_EXT_V6, 0x06a00870, 0x0ff00ff0, "sxtab%c\t%12-15r, %16-19r, %0-3r, ror #16"},
! {ARM_EXT_V6, 0x06a00c70, 0x0ff00ff0, "sxtab%c\t%12-15r, %16-19r, %0-3r, ror #24"},
{ARM_EXT_V6, 0x06f00070, 0x0ff00ff0, "uxtah%c\t%12-15r, %16-19r, %0-3r"},
! {ARM_EXT_V6, 0x06f00470, 0x0ff00ff0, "uxtah%c\t%12-15r, %16-19r, %0-3r, ror #8"},
! {ARM_EXT_V6, 0x06f00870, 0x0ff00ff0, "uxtah%c\t%12-15r, %16-19r, %0-3r, ror #16"},
! {ARM_EXT_V6, 0x06f00c70, 0x0ff00ff0, "uxtah%c\t%12-15r, %16-19r, %0-3r, ror #24"},
{ARM_EXT_V6, 0x06c00070, 0x0ff00ff0, "uxtab16%c\t%12-15r, %16-19r, %0-3r"},
! {ARM_EXT_V6, 0x06c00470, 0x0ff00ff0, "uxtab16%c\t%12-15r, %16-19r, %0-3r, ror #8"},
! {ARM_EXT_V6, 0x06c00870, 0x0ff00ff0, "uxtab16%c\t%12-15r, %16-19r, %0-3r, ror #16"},
{ARM_EXT_V6, 0x06c00c70, 0x0ff00ff0, "uxtab16%c\t%12-15r, %16-19r, %0-3r, ROR #24"},
{ARM_EXT_V6, 0x06e00070, 0x0ff00ff0, "uxtab%c\t%12-15r, %16-19r, %0-3r"},
! {ARM_EXT_V6, 0x06e00470, 0x0ff00ff0, "uxtab%c\t%12-15r, %16-19r, %0-3r, ror #8"},
! {ARM_EXT_V6, 0x06e00870, 0x0ff00ff0, "uxtab%c\t%12-15r, %16-19r, %0-3r, ror #16"},
! {ARM_EXT_V6, 0x06e00c70, 0x0ff00ff0, "uxtab%c\t%12-15r, %16-19r, %0-3r, ror #24"},
{ARM_EXT_V6, 0x06800fb0, 0x0ff00ff0, "sel%c\t%12-15r, %16-19r, %0-3r"},
{ARM_EXT_V6, 0xf1010000, 0xfffffc00, "setend\t%9?ble"},
{ARM_EXT_V6, 0x0700f010, 0x0ff0f0d0, "smuad%5'x%c\t%16-19r, %0-3r, %8-11r"},
*************** static const struct opcode32 arm_opcodes
*** 925,940 ****
{ARM_EXT_V6, 0x075000d0, 0x0ff000d0, "smmls%5'r%c\t%16-19r, %0-3r, %8-11r, %12-15r"},
{ARM_EXT_V6, 0xf84d0500, 0xfe5fffe0, "srs%23?id%24?ba\t%16-19r%21'!, #%0-4d"},
{ARM_EXT_V6, 0x06a00010, 0x0fe00ff0, "ssat%c\t%12-15r, #%16-20W, %0-3r"},
! {ARM_EXT_V6, 0x06a00010, 0x0fe00070, "ssat%c\t%12-15r, #%16-20W, %0-3r, LSL #%7-11d"},
! {ARM_EXT_V6, 0x06a00050, 0x0fe00070, "ssat%c\t%12-15r, #%16-20W, %0-3r, ASR #%7-11d"},
{ARM_EXT_V6, 0x06a00f30, 0x0ff00ff0, "ssat16%c\t%12-15r, #%16-19W, %0-3r"},
{ARM_EXT_V6, 0x01800f90, 0x0ff00ff0, "strex%c\t%12-15r, %0-3r, [%16-19r]"},
{ARM_EXT_V6, 0x00400090, 0x0ff000f0, "umaal%c\t%12-15r, %16-19r, %0-3r, %8-11r"},
{ARM_EXT_V6, 0x0780f010, 0x0ff0f0f0, "usad8%c\t%16-19r, %0-3r, %8-11r"},
{ARM_EXT_V6, 0x07800010, 0x0ff000f0, "usada8%c\t%16-19r, %0-3r, %8-11r, %12-15r"},
{ARM_EXT_V6, 0x06e00010, 0x0fe00ff0, "usat%c\t%12-15r, #%16-20d, %0-3r"},
! {ARM_EXT_V6, 0x06e00010, 0x0fe00070, "usat%c\t%12-15r, #%16-20d, %0-3r, LSL #%7-11d"},
! {ARM_EXT_V6, 0x06e00050, 0x0fe00070, "usat%c\t%12-15r, #%16-20d, %0-3r, ASR #%7-11d"},
{ARM_EXT_V6, 0x06e00f30, 0x0ff00ff0, "usat16%c\t%12-15r, #%16-19d, %0-3r"},
/* V5J instruction. */
--- 926,941 ----
{ARM_EXT_V6, 0x075000d0, 0x0ff000d0, "smmls%5'r%c\t%16-19r, %0-3r, %8-11r, %12-15r"},
{ARM_EXT_V6, 0xf84d0500, 0xfe5fffe0, "srs%23?id%24?ba\t%16-19r%21'!, #%0-4d"},
{ARM_EXT_V6, 0x06a00010, 0x0fe00ff0, "ssat%c\t%12-15r, #%16-20W, %0-3r"},
! {ARM_EXT_V6, 0x06a00010, 0x0fe00070, "ssat%c\t%12-15r, #%16-20W, %0-3r, lsl #%7-11d"},
! {ARM_EXT_V6, 0x06a00050, 0x0fe00070, "ssat%c\t%12-15r, #%16-20W, %0-3r, asr #%7-11d"},
{ARM_EXT_V6, 0x06a00f30, 0x0ff00ff0, "ssat16%c\t%12-15r, #%16-19W, %0-3r"},
{ARM_EXT_V6, 0x01800f90, 0x0ff00ff0, "strex%c\t%12-15r, %0-3r, [%16-19r]"},
{ARM_EXT_V6, 0x00400090, 0x0ff000f0, "umaal%c\t%12-15r, %16-19r, %0-3r, %8-11r"},
{ARM_EXT_V6, 0x0780f010, 0x0ff0f0f0, "usad8%c\t%16-19r, %0-3r, %8-11r"},
{ARM_EXT_V6, 0x07800010, 0x0ff000f0, "usada8%c\t%16-19r, %0-3r, %8-11r, %12-15r"},
{ARM_EXT_V6, 0x06e00010, 0x0fe00ff0, "usat%c\t%12-15r, #%16-20d, %0-3r"},
! {ARM_EXT_V6, 0x06e00010, 0x0fe00070, "usat%c\t%12-15r, #%16-20d, %0-3r, lsl #%7-11d"},
! {ARM_EXT_V6, 0x06e00050, 0x0fe00070, "usat%c\t%12-15r, #%16-20d, %0-3r, asr #%7-11d"},
{ARM_EXT_V6, 0x06e00f30, 0x0ff00ff0, "usat16%c\t%12-15r, #%16-19d, %0-3r"},
/* V5J instruction. */
*************** static const struct opcode32 arm_opcodes
*** 947,954 ****
{ARM_EXT_V5, 0x016f0f10, 0x0fff0ff0, "clz%c\t%12-15r, %0-3r"},
/* V5E "El Segundo" Instructions. */
! {ARM_EXT_V5E, 0x000000d0, 0x0e1000f0, "ldr%cd\t%12-15r, %s"},
! {ARM_EXT_V5E, 0x000000f0, 0x0e1000f0, "str%cd\t%12-15r, %s"},
{ARM_EXT_V5E, 0xf450f000, 0xfc70f000, "pld\t%a"},
{ARM_EXT_V5ExP, 0x01000080, 0x0ff000f0, "smlabb%c\t%16-19r, %0-3r, %8-11r, %12-15r"},
{ARM_EXT_V5ExP, 0x010000a0, 0x0ff000f0, "smlatb%c\t%16-19r, %0-3r, %8-11r, %12-15r"},
--- 948,955 ----
{ARM_EXT_V5, 0x016f0f10, 0x0fff0ff0, "clz%c\t%12-15r, %0-3r"},
/* V5E "El Segundo" Instructions. */
! {ARM_EXT_V5E, 0x000000d0, 0x0e1000f0, "ldrd%c\t%12-15r, %s"},
! {ARM_EXT_V5E, 0x000000f0, 0x0e1000f0, "strd%c\t%12-15r, %s"},
{ARM_EXT_V5E, 0xf450f000, 0xfc70f000, "pld\t%a"},
{ARM_EXT_V5ExP, 0x01000080, 0x0ff000f0, "smlabb%c\t%16-19r, %0-3r, %8-11r, %12-15r"},
{ARM_EXT_V5ExP, 0x010000a0, 0x0ff000f0, "smlatb%c\t%16-19r, %0-3r, %8-11r, %12-15r"},
*************** static const struct opcode32 arm_opcodes
*** 977,1009 ****
{ARM_EXT_V5ExP, 0x01600050, 0x0ff00ff0, "qdsub%c\t%12-15r, %0-3r, %16-19r"},
/* ARM Instructions. */
! {ARM_EXT_V1, 0x00000090, 0x0e100090, "str%c%6's%5?hb\t%12-15r, %s"},
! {ARM_EXT_V1, 0x00100090, 0x0e100090, "ldr%c%6's%5?hb\t%12-15r, %s"},
! {ARM_EXT_V1, 0x00000000, 0x0de00000, "and%c%20's\t%12-15r, %16-19r, %o"},
! {ARM_EXT_V1, 0x00200000, 0x0de00000, "eor%c%20's\t%12-15r, %16-19r, %o"},
! {ARM_EXT_V1, 0x00400000, 0x0de00000, "sub%c%20's\t%12-15r, %16-19r, %o"},
! {ARM_EXT_V1, 0x00600000, 0x0de00000, "rsb%c%20's\t%12-15r, %16-19r, %o"},
! {ARM_EXT_V1, 0x00800000, 0x0de00000, "add%c%20's\t%12-15r, %16-19r, %o"},
! {ARM_EXT_V1, 0x00a00000, 0x0de00000, "adc%c%20's\t%12-15r, %16-19r, %o"},
! {ARM_EXT_V1, 0x00c00000, 0x0de00000, "sbc%c%20's\t%12-15r, %16-19r, %o"},
! {ARM_EXT_V1, 0x00e00000, 0x0de00000, "rsc%c%20's\t%12-15r, %16-19r, %o"},
{ARM_EXT_V3, 0x0120f000, 0x0db0f000, "msr%c\t%22?SCPSR%C, %o"},
{ARM_EXT_V3, 0x010f0000, 0x0fbf0fff, "mrs%c\t%12-15r, %22?SCPSR"},
! {ARM_EXT_V1, 0x01000000, 0x0de00000, "tst%c%p\t%16-19r, %o"},
! {ARM_EXT_V1, 0x01200000, 0x0de00000, "teq%c%p\t%16-19r, %o"},
! {ARM_EXT_V1, 0x01400000, 0x0de00000, "cmp%c%p\t%16-19r, %o"},
! {ARM_EXT_V1, 0x01600000, 0x0de00000, "cmn%c%p\t%16-19r, %o"},
! {ARM_EXT_V1, 0x01800000, 0x0de00000, "orr%c%20's\t%12-15r, %16-19r, %o"},
! {ARM_EXT_V1, 0x01a00000, 0x0de00000, "mov%c%20's\t%12-15r, %o"},
! {ARM_EXT_V1, 0x01c00000, 0x0de00000, "bic%c%20's\t%12-15r, %16-19r, %o"},
! {ARM_EXT_V1, 0x01e00000, 0x0de00000, "mvn%c%20's\t%12-15r, %o"},
! {ARM_EXT_V1, 0x04000000, 0x0e100000, "str%c%22'b%t\t%12-15r, %a"},
! {ARM_EXT_V1, 0x06000000, 0x0e100ff0, "str%c%22'b%t\t%12-15r, %a"},
! {ARM_EXT_V1, 0x04000000, 0x0c100010, "str%c%22'b%t\t%12-15r, %a"},
{ARM_EXT_V1, 0x06000010, 0x0e000010, "undefined"},
! {ARM_EXT_V1, 0x04100000, 0x0c100000, "ldr%c%22'b%t\t%12-15r, %a"},
! {ARM_EXT_V1, 0x08000000, 0x0e100000, "stm%c%23?id%24?ba\t%16-19r%21'!, %m%22'^"},
! {ARM_EXT_V1, 0x08100000, 0x0e100000, "ldm%c%23?id%24?ba\t%16-19r%21'!, %m%22'^"},
{ARM_EXT_V1, 0x0a000000, 0x0e000000, "b%24'l%c\t%b"},
{ARM_EXT_V1, 0x0f000000, 0x0f000000, "svc%c\t%0-23x"},
--- 978,1022 ----
{ARM_EXT_V5ExP, 0x01600050, 0x0ff00ff0, "qdsub%c\t%12-15r, %0-3r, %16-19r"},
/* ARM Instructions. */
! {ARM_EXT_V1, 0x00000090, 0x0e100090, "str%6's%5?hb%c\t%12-15r, %s"},
! {ARM_EXT_V1, 0x00100090, 0x0e100090, "ldr%6's%5?hb%c\t%12-15r, %s"},
! {ARM_EXT_V1, 0x00000000, 0x0de00000, "and%20's%c\t%12-15r, %16-19r, %o"},
! {ARM_EXT_V1, 0x00200000, 0x0de00000, "eor%20's%c\t%12-15r, %16-19r, %o"},
! {ARM_EXT_V1, 0x00400000, 0x0de00000, "sub%20's%c\t%12-15r, %16-19r, %o"},
! {ARM_EXT_V1, 0x00600000, 0x0de00000, "rsb%20's%c\t%12-15r, %16-19r, %o"},
! {ARM_EXT_V1, 0x00800000, 0x0de00000, "add%20's%c\t%12-15r, %16-19r, %o"},
! {ARM_EXT_V1, 0x00a00000, 0x0de00000, "adc%20's%c\t%12-15r, %16-19r, %o"},
! {ARM_EXT_V1, 0x00c00000, 0x0de00000, "sbc%20's%c\t%12-15r, %16-19r, %o"},
! {ARM_EXT_V1, 0x00e00000, 0x0de00000, "rsc%20's%c\t%12-15r, %16-19r, %o"},
{ARM_EXT_V3, 0x0120f000, 0x0db0f000, "msr%c\t%22?SCPSR%C, %o"},
{ARM_EXT_V3, 0x010f0000, 0x0fbf0fff, "mrs%c\t%12-15r, %22?SCPSR"},
! {ARM_EXT_V1, 0x01000000, 0x0de00000, "tst%p%c\t%16-19r, %o"},
! {ARM_EXT_V1, 0x01200000, 0x0de00000, "teq%p%c\t%16-19r, %o"},
! {ARM_EXT_V1, 0x01400000, 0x0de00000, "cmp%p%c\t%16-19r, %o"},
! {ARM_EXT_V1, 0x01600000, 0x0de00000, "cmn%p%c\t%16-19r, %o"},
! {ARM_EXT_V1, 0x01800000, 0x0de00000, "orr%20's%c\t%12-15r, %16-19r, %o"},
! {ARM_EXT_V1, 0x03a00000, 0x0fef0000, "mov%20's%c\t%12-15r, %o"},
! {ARM_EXT_V1, 0x01a00000, 0x0def0ff0, "mov%20's%c\t%12-15r, %0-3r"},
! {ARM_EXT_V1, 0x01a00000, 0x0def0060, "lsl%20's%c\t%12-15r, %q"},
! {ARM_EXT_V1, 0x01a00020, 0x0def0060, "lsr%20's%c\t%12-15r, %q"},
! {ARM_EXT_V1, 0x01a00040, 0x0def0060, "asr%20's%c\t%12-15r, %q"},
! {ARM_EXT_V1, 0x01a00060, 0x0def0ff0, "rrx%20's%c\t%12-15r, %0-3r"},
! {ARM_EXT_V1, 0x01a00060, 0x0def0060, "ror%20's%c\t%12-15r, %q"},
! {ARM_EXT_V1, 0x01c00000, 0x0de00000, "bic%20's%c\t%12-15r, %16-19r, %o"},
! {ARM_EXT_V1, 0x01e00000, 0x0de00000, "mvn%20's%c\t%12-15r, %o"},
! {ARM_EXT_V1, 0x052d0004, 0x0fff0fff, "push%c\t{%12-15r}\t\t; (str%c %12-15r, %a)"},
! {ARM_EXT_V1, 0x04000000, 0x0e100000, "str%22'b%t%c\t%12-15r, %a"},
! {ARM_EXT_V1, 0x06000000, 0x0e100ff0, "str%22'b%t%c\t%12-15r, %a"},
! {ARM_EXT_V1, 0x04000000, 0x0c100010, "str%22'b%t%c\t%12-15r, %a"},
{ARM_EXT_V1, 0x06000010, 0x0e000010, "undefined"},
! {ARM_EXT_V1, 0x049d0004, 0x0fff0fff, "pop%c\t{%12-15r}\t\t; (ldr%c %12-15r, %a)"},
! {ARM_EXT_V1, 0x04100000, 0x0c100000, "ldr%22'b%t%c\t%12-15r, %a"},
! {ARM_EXT_V1, 0x092d0000, 0x0fff0000, "push%c\t%m"},
! {ARM_EXT_V1, 0x08800000, 0x0ff00000, "stm%c\t%16-19r%21'!, %m%22'^"},
! {ARM_EXT_V1, 0x08000000, 0x0e100000, "stm%23?id%24?ba%c\t%16-19r%21'!, %m%22'^"},
! {ARM_EXT_V1, 0x08bd0000, 0x0fff0000, "pop%c\t%m"},
! {ARM_EXT_V1, 0x08900000, 0x0f900000, "ldm%c\t%16-19r%21'!, %m%22'^"},
! {ARM_EXT_V1, 0x08100000, 0x0e100000, "ldm%23?id%24?ba%c\t%16-19r%21'!, %m%22'^"},
{ARM_EXT_V1, 0x0a000000, 0x0e000000, "b%24'l%c\t%b"},
{ARM_EXT_V1, 0x0f000000, 0x0f000000, "svc%c\t%0-23x"},
*************** static const struct opcode16 thumb_opcod
*** 1137,1143 ****
{ARM_EXT_V4T, 0x9000, 0xF800, "str%c\t%8-10r, [sp, #%0-7W]"},
{ARM_EXT_V4T, 0x9800, 0xF800, "ldr%c\t%8-10r, [sp, #%0-7W]"},
/* format 12 */
! {ARM_EXT_V4T, 0xA000, 0xF800, "add%c\t%8-10r, pc, #%0-7W\t(adr %8-10r,%0-7a)"},
{ARM_EXT_V4T, 0xA800, 0xF800, "add%c\t%8-10r, sp, #%0-7W"},
/* format 15 */
{ARM_EXT_V4T, 0xC000, 0xF800, "stmia%c\t%8-10r!, %M"},
--- 1150,1156 ----
{ARM_EXT_V4T, 0x9000, 0xF800, "str%c\t%8-10r, [sp, #%0-7W]"},
{ARM_EXT_V4T, 0x9800, 0xF800, "ldr%c\t%8-10r, [sp, #%0-7W]"},
/* format 12 */
! {ARM_EXT_V4T, 0xA000, 0xF800, "add%c\t%8-10r, pc, #%0-7W\t(adr %8-10r, %0-7a)"},
{ARM_EXT_V4T, 0xA800, 0xF800, "add%c\t%8-10r, sp, #%0-7W"},
/* format 15 */
{ARM_EXT_V4T, 0xC000, 0xF800, "stmia%c\t%8-10r!, %M"},
*************** arm_decode_bitfield (const char *ptr, un
*** 1556,1562 ****
}
static void
! arm_decode_shift (long given, fprintf_ftype func, void *stream)
{
func (stream, "%s", arm_regnames[given & 0xf]);
--- 1569,1576 ----
}
static void
! arm_decode_shift (long given, fprintf_ftype func, void *stream,
! int print_shift)
{
func (stream, "%s", arm_regnames[given & 0xf]);
*************** arm_decode_shift (long given, fprintf_ft
*** 1578,1588 ****
amount = 32;
}
! func (stream, ", %s #%d", arm_shift[shift], amount);
}
! else
func (stream, ", %s %s", arm_shift[(given & 0x60) >> 5],
arm_regnames[(given & 0xf00) >> 8]);
}
}
--- 1592,1607 ----
amount = 32;
}
! if (print_shift)
! func (stream, ", %s #%d", arm_shift[shift], amount);
! else
! func (stream, ", #%d", amount);
}
! else if (print_shift)
func (stream, ", %s %s", arm_shift[(given & 0x60) >> 5],
arm_regnames[(given & 0xf00) >> 8]);
+ else
+ func (stream, ", %s", arm_regnames[(given & 0xf00) >> 8]);
}
}
*************** print_arm_address (bfd_vma pc, struct di
*** 2147,2153 ****
func (stream, ", %s",
(((given & 0x00800000) == 0)
? "-" : ""));
! arm_decode_shift (given, func, stream);
}
func (stream, "]%s",
--- 2166,2172 ----
func (stream, ", %s",
(((given & 0x00800000) == 0)
? "-" : ""));
! arm_decode_shift (given, func, stream, 1);
}
func (stream, "]%s",
*************** print_arm_address (bfd_vma pc, struct di
*** 2170,2176 ****
func (stream, "], %s",
(((given & 0x00800000) == 0)
? "-" : ""));
! arm_decode_shift (given, func, stream);
}
}
}
--- 2189,2195 ----
func (stream, "], %s",
(((given & 0x00800000) == 0)
? "-" : ""));
! arm_decode_shift (given, func, stream, 1);
}
}
}
*************** print_insn_arm (bfd_vma pc, struct disas
*** 2784,2789 ****
--- 2803,2812 ----
}
break;
+ case 'q':
+ arm_decode_shift (given, func, stream, 0);
+ break;
+
case 'o':
if ((given & 0x02000000) != 0)
{
*************** print_insn_arm (bfd_vma pc, struct disas
*** 2794,2800 ****
func (stream, "#%d\t; 0x%x", immed, immed);
}
else
! arm_decode_shift (given, func, stream);
break;
case 'p':
--- 2817,2823 ----
func (stream, "#%d\t; 0x%x", immed, immed);
}
else
! arm_decode_shift (given, func, stream, 1);
break;
case 'p':