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[PATCH, ARM] Fix disassembly syntax for FMSRR

From: Julian Brown <julian at codesourcery dot com>
To: binutils at sources dot redhat dot com
Cc: Paul Brook <paul at codesourcery dot com>
Date: Wed, 05 Jul 2006 16:52:08 +0100
Subject: [PATCH, ARM] Fix disassembly syntax for FMSRR

Hi,

This patch causes the VFP FMSRR instruction to be disassembled like this:

fmsrr {s2,s3},r4,r5

rather than like this:

fmsrr r4,r5,{s2,s3}

In accordance with the most recent ARM Architecture Reference Manual I have a copy of (the existing syntax is based on an older VFP11 manual).

Tested with "make check" with cross to arm-none-eabi. OK to apply on mainline? The CSL branch?

Cheers,

Julian

ChangeLog (opcodes):

* arm-dis.c (coprocessor): Alter fmsrr disassembly syntax.

ChangeLog (gas/testsuite):

    * gas/arm/vfp-neon-syntax.d: Tweak expected fmsrr syntax.
    * gas/arm/vfp-neon-syntax_t2.d: Likewise.
    * gas/arm/vfp2.d: Likewise.
    * gas/arm/vfp2_t2.d: Likewise.

Index: gas/testsuite/gas/arm/vfp-neon-syntax.d
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/arm/vfp-neon-syntax.d,v
retrieving revision 1.1.2.1
diff -c -p -r1.1.2.1 vfp-neon-syntax.d
*** gas/testsuite/gas/arm/vfp-neon-syntax.d	5 May 2006 18:31:29 -0000	1.1.2.1
--- gas/testsuite/gas/arm/vfp-neon-syntax.d	5 Jul 2006 15:42:46 -0000
*************** Disassembly of section .text:
*** 12,18 ****
  0[0-9a-f]+ <[^>]+> ee100a90 	fmrs	r0, s1
  0[0-9a-f]+ <[^>]+> ee001a10 	fmsr	s0, r1
  0[0-9a-f]+ <[^>]+> ec510a11 	fmrrs	r0, r1, {s2, s3}
! 0[0-9a-f]+ <[^>]+> ec442a10 	fmsrr	r2, r4, {s0, s1}
  0[0-9a-f]+ <[^>]+> 0eb00a60 	fcpyseq	s0, s1
  0[0-9a-f]+ <[^>]+> 0eb00b41 	fcpydeq	d0, d1
  0[0-9a-f]+ <[^>]+> 0eb00a05 	fconstseq	s0, #80
--- 12,18 ----
  0[0-9a-f]+ <[^>]+> ee100a90 	fmrs	r0, s1
  0[0-9a-f]+ <[^>]+> ee001a10 	fmsr	s0, r1
  0[0-9a-f]+ <[^>]+> ec510a11 	fmrrs	r0, r1, {s2, s3}
! 0[0-9a-f]+ <[^>]+> ec442a10 	fmsrr	{s0, s1}, r2, r4
  0[0-9a-f]+ <[^>]+> 0eb00a60 	fcpyseq	s0, s1
  0[0-9a-f]+ <[^>]+> 0eb00b41 	fcpydeq	d0, d1
  0[0-9a-f]+ <[^>]+> 0eb00a05 	fconstseq	s0, #80
*************** Disassembly of section .text:
*** 20,26 ****
  0[0-9a-f]+ <[^>]+> 0e100a90 	fmrseq	r0, s1
  0[0-9a-f]+ <[^>]+> 0e001a10 	fmsreq	s0, r1
  0[0-9a-f]+ <[^>]+> 0c510a11 	fmrrseq	r0, r1, {s2, s3}
! 0[0-9a-f]+ <[^>]+> 0c442a10 	fmsrreq	r2, r4, {s0, s1}
  0[0-9a-f]+ <[^>]+> eeb10ae0 	fsqrts	s0, s1
  0[0-9a-f]+ <[^>]+> eeb10bc1 	fsqrtd	d0, d1
  0[0-9a-f]+ <[^>]+> 0eb10ae0 	fsqrtseq	s0, s1
--- 20,26 ----
  0[0-9a-f]+ <[^>]+> 0e100a90 	fmrseq	r0, s1
  0[0-9a-f]+ <[^>]+> 0e001a10 	fmsreq	s0, r1
  0[0-9a-f]+ <[^>]+> 0c510a11 	fmrrseq	r0, r1, {s2, s3}
! 0[0-9a-f]+ <[^>]+> 0c442a10 	fmsrreq	{s0, s1}, r2, r4
  0[0-9a-f]+ <[^>]+> eeb10ae0 	fsqrts	s0, s1
  0[0-9a-f]+ <[^>]+> eeb10bc1 	fsqrtd	d0, d1
  0[0-9a-f]+ <[^>]+> 0eb10ae0 	fsqrtseq	s0, s1
Index: gas/testsuite/gas/arm/vfp-neon-syntax_t2.d
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/arm/vfp-neon-syntax_t2.d,v
retrieving revision 1.1.2.1
diff -c -p -r1.1.2.1 vfp-neon-syntax_t2.d
*** gas/testsuite/gas/arm/vfp-neon-syntax_t2.d	5 May 2006 18:31:29 -0000	1.1.2.1
--- gas/testsuite/gas/arm/vfp-neon-syntax_t2.d	5 Jul 2006 15:42:46 -0000
*************** Disassembly of section \.text:
*** 12,18 ****
  0[0-9a-f]+ <[^>]+> ee10 0a90 	fmrs	r0, s1
  0[0-9a-f]+ <[^>]+> ee00 1a10 	fmsr	s0, r1
  0[0-9a-f]+ <[^>]+> ec51 0a11 	fmrrs	r0, r1, {s2, s3}
! 0[0-9a-f]+ <[^>]+> ec44 2a10 	fmsrr	r2, r4, {s0, s1}
  0[0-9a-f]+ <[^>]+> bf01      	itttt	eq
  0[0-9a-f]+ <[^>]+> eeb0 0a60 	fcpyseq	s0, s1
  0[0-9a-f]+ <[^>]+> eeb0 0b41 	fcpydeq	d0, d1
--- 12,18 ----
  0[0-9a-f]+ <[^>]+> ee10 0a90 	fmrs	r0, s1
  0[0-9a-f]+ <[^>]+> ee00 1a10 	fmsr	s0, r1
  0[0-9a-f]+ <[^>]+> ec51 0a11 	fmrrs	r0, r1, {s2, s3}
! 0[0-9a-f]+ <[^>]+> ec44 2a10 	fmsrr	{s0, s1}, r2, r4
  0[0-9a-f]+ <[^>]+> bf01      	itttt	eq
  0[0-9a-f]+ <[^>]+> eeb0 0a60 	fcpyseq	s0, s1
  0[0-9a-f]+ <[^>]+> eeb0 0b41 	fcpydeq	d0, d1
*************** Disassembly of section \.text:
*** 22,28 ****
  0[0-9a-f]+ <[^>]+> ee10 0a90 	fmrseq	r0, s1
  0[0-9a-f]+ <[^>]+> ee00 1a10 	fmsreq	s0, r1
  0[0-9a-f]+ <[^>]+> ec51 0a11 	fmrrseq	r0, r1, {s2, s3}
! 0[0-9a-f]+ <[^>]+> ec44 2a10 	fmsrreq	r2, r4, {s0, s1}
  0[0-9a-f]+ <[^>]+> eeb1 0ae0 	fsqrts	s0, s1
  0[0-9a-f]+ <[^>]+> eeb1 0bc1 	fsqrtd	d0, d1
  0[0-9a-f]+ <[^>]+> bf04      	itt	eq
--- 22,28 ----
  0[0-9a-f]+ <[^>]+> ee10 0a90 	fmrseq	r0, s1
  0[0-9a-f]+ <[^>]+> ee00 1a10 	fmsreq	s0, r1
  0[0-9a-f]+ <[^>]+> ec51 0a11 	fmrrseq	r0, r1, {s2, s3}
! 0[0-9a-f]+ <[^>]+> ec44 2a10 	fmsrreq	{s0, s1}, r2, r4
  0[0-9a-f]+ <[^>]+> eeb1 0ae0 	fsqrts	s0, s1
  0[0-9a-f]+ <[^>]+> eeb1 0bc1 	fsqrtd	d0, d1
  0[0-9a-f]+ <[^>]+> bf04      	itt	eq
Index: gas/testsuite/gas/arm/vfp2.d
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/arm/vfp2.d,v
retrieving revision 1.1.14.1
diff -c -p -r1.1.14.1 vfp2.d
*** gas/testsuite/gas/arm/vfp2.d	3 Apr 2006 00:03:34 -0000	1.1.14.1
--- gas/testsuite/gas/arm/vfp2.d	5 Jul 2006 15:42:46 -0000
***************
*** 9,17 ****
  Disassembly of section .text:
  0+000 <[^>]*> ec4a5b10 	vmov	d0, r5, sl
  0+004 <[^>]*> ec5a5b10 	vmov	r5, sl, d0
! 0+008 <[^>]*> ec4a5a37 	fmsrr	r5, sl, {s15, s16}
  0+00c <[^>]*> ec5a5a37 	fmrrs	r5, sl, {s15, s16}
  0+010 <[^>]*> ec45ab1f 	vmov	d15, sl, r5
  0+014 <[^>]*> ec55ab1f 	vmov	sl, r5, d15
! 0+018 <[^>]*> ec45aa38 	fmsrr	sl, r5, {s17, s18}
  0+01c <[^>]*> ec55aa38 	fmrrs	sl, r5, {s17, s18}
--- 9,17 ----
  Disassembly of section .text:
  0+000 <[^>]*> ec4a5b10 	vmov	d0, r5, sl
  0+004 <[^>]*> ec5a5b10 	vmov	r5, sl, d0
! 0+008 <[^>]*> ec4a5a37 	fmsrr	{s15, s16}, r5, sl
  0+00c <[^>]*> ec5a5a37 	fmrrs	r5, sl, {s15, s16}
  0+010 <[^>]*> ec45ab1f 	vmov	d15, sl, r5
  0+014 <[^>]*> ec55ab1f 	vmov	sl, r5, d15
! 0+018 <[^>]*> ec45aa38 	fmsrr	{s17, s18}, sl, r5
  0+01c <[^>]*> ec55aa38 	fmrrs	sl, r5, {s17, s18}
Index: gas/testsuite/gas/arm/vfp2_t2.d
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/arm/vfp2_t2.d,v
retrieving revision 1.1.2.1
diff -c -p -r1.1.2.1 vfp2_t2.d
*** gas/testsuite/gas/arm/vfp2_t2.d	3 Apr 2006 00:03:34 -0000	1.1.2.1
--- gas/testsuite/gas/arm/vfp2_t2.d	5 Jul 2006 15:42:46 -0000
***************
*** 9,17 ****
  Disassembly of section .text:
  0+000 <[^>]*> ec4a 5b10 	vmov	d0, r5, sl
  0+004 <[^>]*> ec5a 5b10 	vmov	r5, sl, d0
! 0+008 <[^>]*> ec4a 5a37 	fmsrr	r5, sl, {s15, s16}
  0+00c <[^>]*> ec5a 5a37 	fmrrs	r5, sl, {s15, s16}
  0+010 <[^>]*> ec45 ab1f 	vmov	d15, sl, r5
  0+014 <[^>]*> ec55 ab1f 	vmov	sl, r5, d15
! 0+018 <[^>]*> ec45 aa38 	fmsrr	sl, r5, {s17, s18}
  0+01c <[^>]*> ec55 aa38 	fmrrs	sl, r5, {s17, s18}
--- 9,17 ----
  Disassembly of section .text:
  0+000 <[^>]*> ec4a 5b10 	vmov	d0, r5, sl
  0+004 <[^>]*> ec5a 5b10 	vmov	r5, sl, d0
! 0+008 <[^>]*> ec4a 5a37 	fmsrr	{s15, s16}, r5, sl
  0+00c <[^>]*> ec5a 5a37 	fmrrs	r5, sl, {s15, s16}
  0+010 <[^>]*> ec45 ab1f 	vmov	d15, sl, r5
  0+014 <[^>]*> ec55 ab1f 	vmov	sl, r5, d15
! 0+018 <[^>]*> ec45 aa38 	fmsrr	{s17, s18}, sl, r5
  0+01c <[^>]*> ec55 aa38 	fmrrs	sl, r5, {s17, s18}
Index: opcodes/arm-dis.c
===================================================================
RCS file: /cvs/src/src/opcodes/arm-dis.c,v
retrieving revision 1.62.2.4
diff -c -p -r1.62.2.4 arm-dis.c
*** opcodes/arm-dis.c	29 Apr 2006 17:54:32 -0000	1.62.2.4
--- opcodes/arm-dis.c	5 Jul 2006 15:42:47 -0000
*************** static const struct opcode32 coprocessor
*** 280,286 ****
    {FPU_VFP_EXT_V1, 0x0c500b10, 0x0fb00ff0, "fmrrd%c\t%12-15r, %16-19r, %z0"},
    {FPU_VFP_EXT_V3, 0x0eb00a00, 0x0fb00ff0, "fconsts%c\t%y1, #%16-19,0-3d"},
    {FPU_VFP_EXT_V3, 0x0eb00b00, 0x0fb00ff0, "fconstd%c\t%z1, #%16-19,0-3d"},
!   {FPU_VFP_EXT_V2, 0x0c400a10, 0x0ff00fd0, "fmsrr%c\t%12-15r, %16-19r, %y4"},
    {FPU_VFP_EXT_V2, 0x0c400b10, 0x0ff00fd0, "fmdrr%c\t%z0, %12-15r, %16-19r"},
    {FPU_VFP_EXT_V2, 0x0c500a10, 0x0ff00fd0, "fmrrs%c\t%12-15r, %16-19r, %y4"},
    {FPU_VFP_EXT_V1xD, 0x0e000a00, 0x0fb00f50, "fmacs%c\t%y1, %y2, %y0"},
--- 280,286 ----
    {FPU_VFP_EXT_V1, 0x0c500b10, 0x0fb00ff0, "fmrrd%c\t%12-15r, %16-19r, %z0"},
    {FPU_VFP_EXT_V3, 0x0eb00a00, 0x0fb00ff0, "fconsts%c\t%y1, #%16-19,0-3d"},
    {FPU_VFP_EXT_V3, 0x0eb00b00, 0x0fb00ff0, "fconstd%c\t%z1, #%16-19,0-3d"},
!   {FPU_VFP_EXT_V2, 0x0c400a10, 0x0ff00fd0, "fmsrr%c\t%y4, %12-15r, %16-19r"},
    {FPU_VFP_EXT_V2, 0x0c400b10, 0x0ff00fd0, "fmdrr%c\t%z0, %12-15r, %16-19r"},
    {FPU_VFP_EXT_V2, 0x0c500a10, 0x0ff00fd0, "fmrrs%c\t%12-15r, %16-19r, %y4"},
    {FPU_VFP_EXT_V1xD, 0x0e000a00, 0x0fb00f50, "fmacs%c\t%y1, %y2, %y0"},

Follow-Ups:
- Re: [PATCH, ARM] Fix disassembly syntax for FMSRR
  - From: Richard Earnshaw

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