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[m68k] More incorrect ColdFire FPU opcodes
- From: Paul Brook <paul at codesourcery dot com>
- To: binutils at sourceware dot org
- Date: Sun, 15 Jan 2006 18:06:18 +0000
- Subject: [m68k] More incorrect ColdFire FPU opcodes
The attached patch fixes several incorrect opcodes for the ColdFire fabs, fadd
and fsub instructions.
It also adds a test for most of the ColdFire FPU opcodes.
Tested on m68k-elf.
Ok?
Paul
2005-01-15 Paul Brook <paul@codesourcery.com>
opcodes/
* m68k-opc.c(m68k_opcodes): Fix opcodes for ColdFire f?abss,
f?add?, and f?sub? instructions.
gas/testsuite/
* gas/m68k/all.exp: Add mcf-fpu.
* gas/m68k/mcf-fpu.d: New file.
* gas/m68k/mcf-fpu.s: New file.
Index: gas/testsuite/gas/m68k/all.exp
===================================================================
RCS file: /var/cvsroot/src-cvs/src/gas/testsuite/gas/m68k/all.exp,v
retrieving revision 1.6
diff -u -p -r1.6 all.exp
--- gas/testsuite/gas/m68k/all.exp 28 May 2004 07:55:21 -0000 1.6
+++ gas/testsuite/gas/m68k/all.exp 15 Jan 2006 17:20:42 -0000
@@ -38,6 +38,7 @@ if [istarget m68*-*-*] then {
run_dump_test mode5
run_dump_test mcf-mac
run_dump_test mcf-emac
+ run_dump_test mcf-fpu
set testname "68000 operands"
gas_run "operands.s" "-m68000" "2>err.out"
Index: gas/testsuite/gas/m68k/mcf-fpu.d
===================================================================
RCS file: gas/testsuite/gas/m68k/mcf-fpu.d
diff -N gas/testsuite/gas/m68k/mcf-fpu.d
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ gas/testsuite/gas/m68k/mcf-fpu.d 15 Jan 2006 17:58:48 -0000
@@ -0,0 +1,170 @@
+#objdump: -d --architecture=m68k:cfv4e
+#as: -mcfv4e
+
+.*: file format .*
+
+Disassembly of section .text:
+
+0+ <.text>:
+[ 0-9a-f]+: f200 0004 fsqrtd %fp0,%fp0
+[ 0-9a-f]+: f22e 4004 0008 fsqrtl %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 4404 0008 fsqrts %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5004 0008 fsqrtw %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5404 0008 fsqrtd %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5804 0008 fsqrtb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 0041 fssqrtd %fp0,%fp0
+[ 0-9a-f]+: f22e 4041 0008 fssqrtl %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 4441 0008 fssqrts %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5041 0008 fssqrtw %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5441 0008 fssqrtd %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5841 0008 fssqrtb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 0045 fdsqrtd %fp0,%fp0
+[ 0-9a-f]+: f22e 4045 0008 fdsqrtl %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 4445 0008 fdsqrts %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5045 0008 fdsqrtw %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5445 0008 fdsqrtd %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5845 0008 fdsqrtb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 0018 fabsd %fp0,%fp0
+[ 0-9a-f]+: f22e 4018 0008 fabsl %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 4418 0008 fabss %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5018 0008 fabsw %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5418 0008 fabsd %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5818 0008 fabsb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 0058 fsabsd %fp0,%fp0
+[ 0-9a-f]+: f22e 4058 0008 fsabsl %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 4458 0008 fsabss %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5058 0008 fsabsw %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5458 0008 fsabsd %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5858 0008 fsabsb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 005c fdabsd %fp0,%fp0
+[ 0-9a-f]+: f22e 405c 0008 fdabsl %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 445c 0008 fdabss %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 505c 0008 fdabsw %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 545c 0008 fdabsd %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 585c 0008 fdabsb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 001a fnegd %fp0,%fp0
+[ 0-9a-f]+: f22e 401a 0008 fnegl %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 441a 0008 fnegs %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 501a 0008 fnegw %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 541a 0008 fnegd %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 581a 0008 fnegb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 005a fsnegd %fp0,%fp0
+[ 0-9a-f]+: f22e 405a 0008 fsnegl %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 445a 0008 fsnegs %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 505a 0008 fsnegw %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 545a 0008 fsnegd %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 585a 0008 fsnegb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 005e fdnegd %fp0,%fp0
+[ 0-9a-f]+: f22e 405e 0008 fdnegl %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 445e 0008 fdnegs %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 505e 0008 fdnegw %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 545e 0008 fdnegd %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 585e 0008 fdnegb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 0020 fdivd %fp0,%fp0
+[ 0-9a-f]+: f22e 4020 0008 fdivl %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 4420 0008 fdivs %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5020 0008 fdivw %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5420 0008 fdivd %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5820 0008 fdivb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 0060 fsdivd %fp0,%fp0
+[ 0-9a-f]+: f22e 4060 0008 fsdivl %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 4460 0008 fsdivs %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5060 0008 fsdivw %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5460 0008 fsdivd %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5860 0008 fsdivb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 0064 fddivd %fp0,%fp0
+[ 0-9a-f]+: f22e 4064 0008 fddivl %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 4464 0008 fddivs %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5064 0008 fddivw %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5464 0008 fddivd %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5864 0008 fddivb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 0022 faddd %fp0,%fp0
+[ 0-9a-f]+: f22e 4022 0008 faddl %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 4422 0008 fadds %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5022 0008 faddw %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5422 0008 faddd %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5822 0008 faddb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 0062 fsaddd %fp0,%fp0
+[ 0-9a-f]+: f22e 4062 0008 fsaddl %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 4462 0008 fsadds %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5062 0008 fsaddw %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5462 0008 fsaddd %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5862 0008 fsaddb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 0066 fdaddd %fp0,%fp0
+[ 0-9a-f]+: f22e 4066 0008 fdaddl %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 4466 0008 fdadds %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5066 0008 fdaddw %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5466 0008 fdaddd %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5866 0008 fdaddb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 0023 fmuld %fp0,%fp0
+[ 0-9a-f]+: f22e 4023 0008 fmull %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 4423 0008 fmuls %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5023 0008 fmulw %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5423 0008 fmuld %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5823 0008 fmulb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 0063 fsmuld %fp0,%fp0
+[ 0-9a-f]+: f22e 4063 0008 fsmull %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 4463 0008 fsmuls %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5063 0008 fsmulw %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5463 0008 fsmuld %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5863 0008 fsmulb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 0067 fdmuld %fp0,%fp0
+[ 0-9a-f]+: f22e 4067 0008 fdmull %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 4467 0008 fdmuls %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5067 0008 fdmulw %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5467 0008 fdmuld %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5867 0008 fdmulb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 0028 fsubd %fp0,%fp0
+[ 0-9a-f]+: f22e 4028 0008 fsubl %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 4428 0008 fsubs %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5028 0008 fsubw %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5428 0008 fsubd %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5828 0008 fsubb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 0068 fssubd %fp0,%fp0
+[ 0-9a-f]+: f22e 4068 0008 fssubl %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 4468 0008 fssubs %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5068 0008 fssubw %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5468 0008 fssubd %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5868 0008 fssubb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 006c fdsubd %fp0,%fp0
+[ 0-9a-f]+: f22e 406c 0008 fdsubl %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 446c 0008 fdsubs %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 506c 0008 fdsubw %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 546c 0008 fdsubd %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 586c 0008 fdsubb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 0000 fmoved %fp0,%fp0
+[ 0-9a-f]+: f22e 4000 0008 fmovel %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 4400 0008 fmoves %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5000 0008 fmovew %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5400 0008 fmoved %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5800 0008 fmoveb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 0040 fsmoved %fp0,%fp0
+[ 0-9a-f]+: f22e 4040 0008 fsmovel %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 4440 0008 fsmoves %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5040 0008 fsmovew %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5440 0008 fsmoved %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5840 0008 fsmoveb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 0044 fdmoved %fp0,%fp0
+[ 0-9a-f]+: f22e 4044 0008 fdmovel %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 4444 0008 fdmoves %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5044 0008 fdmovew %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5444 0008 fdmoved %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5844 0008 fdmoveb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 0001 fintd %fp0,%fp0
+[ 0-9a-f]+: f22e 4001 0008 fintl %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 4401 0008 fints %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5001 0008 fintw %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5401 0008 fintd %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5801 0008 fintb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 0003 fintrzd %fp0,%fp0
+[ 0-9a-f]+: f22e 4003 0008 fintrzl %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 4403 0008 fintrzs %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5003 0008 fintrzw %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5403 0008 fintrzd %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5803 0008 fintrzb %fp@\(8\),%fp0
+[ 0-9a-f]+: f200 0038 fcmpd %fp0,%fp0
+[ 0-9a-f]+: f22e 4038 0008 fcmpl %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 4438 0008 fcmps %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5038 0008 fcmpw %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5438 0008 fcmpd %fp@\(8\),%fp0
+[ 0-9a-f]+: f22e 5838 0008 fcmpb %fp@\(8\),%fp0
Index: gas/testsuite/gas/m68k/mcf-fpu.s
===================================================================
RCS file: gas/testsuite/gas/m68k/mcf-fpu.s
diff -N gas/testsuite/gas/m68k/mcf-fpu.s
--- /dev/null 1 Jan 1970 00:00:00 -0000
+++ gas/testsuite/gas/m68k/mcf-fpu.s 15 Jan 2006 17:58:48 -0000
@@ -0,0 +1,165 @@
+
+ .text
+
+ fsqrtd %fp0,%fp0
+ fsqrtl %fp@(8),%fp0
+ fsqrts %fp@(8),%fp0
+ fsqrtw %fp@(8),%fp0
+ fsqrtd %fp@(8),%fp0
+ fsqrtb %fp@(8),%fp0
+ fssqrtd %fp0,%fp0
+ fssqrtl %fp@(8),%fp0
+ fssqrts %fp@(8),%fp0
+ fssqrtw %fp@(8),%fp0
+ fssqrtd %fp@(8),%fp0
+ fssqrtb %fp@(8),%fp0
+ fdsqrtd %fp0,%fp0
+ fdsqrtl %fp@(8),%fp0
+ fdsqrts %fp@(8),%fp0
+ fdsqrtw %fp@(8),%fp0
+ fdsqrtd %fp@(8),%fp0
+ fdsqrtb %fp@(8),%fp0
+ fabsd %fp0,%fp0
+ fabsl %fp@(8),%fp0
+ fabss %fp@(8),%fp0
+ fabsw %fp@(8),%fp0
+ fabsd %fp@(8),%fp0
+ fabsb %fp@(8),%fp0
+ fsabsd %fp0,%fp0
+ fsabsl %fp@(8),%fp0
+ fsabss %fp@(8),%fp0
+ fsabsw %fp@(8),%fp0
+ fsabsd %fp@(8),%fp0
+ fsabsb %fp@(8),%fp0
+ fdabsd %fp0,%fp0
+ fdabsl %fp@(8),%fp0
+ fdabss %fp@(8),%fp0
+ fdabsw %fp@(8),%fp0
+ fdabsd %fp@(8),%fp0
+ fdabsb %fp@(8),%fp0
+ fnegd %fp0,%fp0
+ fnegl %fp@(8),%fp0
+ fnegs %fp@(8),%fp0
+ fnegw %fp@(8),%fp0
+ fnegd %fp@(8),%fp0
+ fnegb %fp@(8),%fp0
+ fsnegd %fp0,%fp0
+ fsnegl %fp@(8),%fp0
+ fsnegs %fp@(8),%fp0
+ fsnegw %fp@(8),%fp0
+ fsnegd %fp@(8),%fp0
+ fsnegb %fp@(8),%fp0
+ fdnegd %fp0,%fp0
+ fdnegl %fp@(8),%fp0
+ fdnegs %fp@(8),%fp0
+ fdnegw %fp@(8),%fp0
+ fdnegd %fp@(8),%fp0
+ fdnegb %fp@(8),%fp0
+ fdivd %fp0,%fp0
+ fdivl %fp@(8),%fp0
+ fdivs %fp@(8),%fp0
+ fdivw %fp@(8),%fp0
+ fdivd %fp@(8),%fp0
+ fdivb %fp@(8),%fp0
+ fsdivd %fp0,%fp0
+ fsdivl %fp@(8),%fp0
+ fsdivs %fp@(8),%fp0
+ fsdivw %fp@(8),%fp0
+ fsdivd %fp@(8),%fp0
+ fsdivb %fp@(8),%fp0
+ fddivd %fp0,%fp0
+ fddivl %fp@(8),%fp0
+ fddivs %fp@(8),%fp0
+ fddivw %fp@(8),%fp0
+ fddivd %fp@(8),%fp0
+ fddivb %fp@(8),%fp0
+ faddd %fp0,%fp0
+ faddl %fp@(8),%fp0
+ fadds %fp@(8),%fp0
+ faddw %fp@(8),%fp0
+ faddd %fp@(8),%fp0
+ faddb %fp@(8),%fp0
+ fsaddd %fp0,%fp0
+ fsaddl %fp@(8),%fp0
+ fsadds %fp@(8),%fp0
+ fsaddw %fp@(8),%fp0
+ fsaddd %fp@(8),%fp0
+ fsaddb %fp@(8),%fp0
+ fdaddd %fp0,%fp0
+ fdaddl %fp@(8),%fp0
+ fdadds %fp@(8),%fp0
+ fdaddw %fp@(8),%fp0
+ fdaddd %fp@(8),%fp0
+ fdaddb %fp@(8),%fp0
+ fmuld %fp0,%fp0
+ fmull %fp@(8),%fp0
+ fmuls %fp@(8),%fp0
+ fmulw %fp@(8),%fp0
+ fmuld %fp@(8),%fp0
+ fmulb %fp@(8),%fp0
+ fsmuld %fp0,%fp0
+ fsmull %fp@(8),%fp0
+ fsmuls %fp@(8),%fp0
+ fsmulw %fp@(8),%fp0
+ fsmuld %fp@(8),%fp0
+ fsmulb %fp@(8),%fp0
+ fdmuld %fp0,%fp0
+ fdmull %fp@(8),%fp0
+ fdmuls %fp@(8),%fp0
+ fdmulw %fp@(8),%fp0
+ fdmuld %fp@(8),%fp0
+ fdmulb %fp@(8),%fp0
+ fsubd %fp0,%fp0
+ fsubl %fp@(8),%fp0
+ fsubs %fp@(8),%fp0
+ fsubw %fp@(8),%fp0
+ fsubd %fp@(8),%fp0
+ fsubb %fp@(8),%fp0
+ fssubd %fp0,%fp0
+ fssubl %fp@(8),%fp0
+ fssubs %fp@(8),%fp0
+ fssubw %fp@(8),%fp0
+ fssubd %fp@(8),%fp0
+ fssubb %fp@(8),%fp0
+ fdsubd %fp0,%fp0
+ fdsubl %fp@(8),%fp0
+ fdsubs %fp@(8),%fp0
+ fdsubw %fp@(8),%fp0
+ fdsubd %fp@(8),%fp0
+ fdsubb %fp@(8),%fp0
+ fmoved %fp0,%fp0
+ fmovel %fp@(8),%fp0
+ fmoves %fp@(8),%fp0
+ fmovew %fp@(8),%fp0
+ fmoved %fp@(8),%fp0
+ fmoveb %fp@(8),%fp0
+ fsmoved %fp0,%fp0
+ fsmovel %fp@(8),%fp0
+ fsmoves %fp@(8),%fp0
+ fsmovew %fp@(8),%fp0
+ fsmoved %fp@(8),%fp0
+ fsmoveb %fp@(8),%fp0
+ fdmoved %fp0,%fp0
+ fdmovel %fp@(8),%fp0
+ fdmoves %fp@(8),%fp0
+ fdmovew %fp@(8),%fp0
+ fdmoved %fp@(8),%fp0
+ fdmoveb %fp@(8),%fp0
+ fintd %fp0,%fp0
+ fintl %fp@(8),%fp0
+ fints %fp@(8),%fp0
+ fintw %fp@(8),%fp0
+ fintd %fp@(8),%fp0
+ fintb %fp@(8),%fp0
+ fintrzd %fp0,%fp0
+ fintrzl %fp@(8),%fp0
+ fintrzs %fp@(8),%fp0
+ fintrzw %fp@(8),%fp0
+ fintrzd %fp@(8),%fp0
+ fintrzb %fp@(8),%fp0
+ fcmpd %fp0,%fp0
+ fcmpl %fp@(8),%fp0
+ fcmps %fp@(8),%fp0
+ fcmpw %fp@(8),%fp0
+ fcmpd %fp@(8),%fp0
+ fcmpb %fp@(8),%fp0
Index: opcodes/m68k-opc.c
===================================================================
RCS file: /var/cvsroot/src-cvs/src/opcodes/m68k-opc.c,v
retrieving revision 1.16
diff -u -p -r1.16 m68k-opc.c
--- opcodes/m68k-opc.c 15 Jan 2006 16:35:21 -0000 1.16
+++ opcodes/m68k-opc.c 15 Jan 2006 17:40:02 -0000
@@ -390,7 +390,7 @@ const struct m68k_opcode m68k_opcodes[]
{"fsabsl", 4, two(0xF000, 0x4058), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
{"fsabsl", 4, two(0xF000, 0x4058), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fsabsp", 4, two(0xF000, 0x4C58), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
-{"fsabss", 4, two(0xF000, 0x4258), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fsabss", 4, two(0xF000, 0x4458), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fsabss", 4, two(0xF000, 0x4458), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
{"fsabsw", 4, two(0xF000, 0x5058), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
{"fsabsw", 4, two(0xF000, 0x5058), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
@@ -407,7 +407,7 @@ const struct m68k_opcode m68k_opcodes[]
{"fdabsl", 4, two(0xF000, 0x405C), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fdabsl", 4, two(0xF000, 0x405c), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up},
{"fdabsp", 4, two(0xF000, 0x4C5c), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up},
-{"fdabss", 4, two(0xF000, 0x425C), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fdabss", 4, two(0xF000, 0x445C), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fdabss", 4, two(0xF000, 0x445c), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up},
{"fdabsw", 4, two(0xF000, 0x505C), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fdabsw", 4, two(0xF000, 0x505c), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up},
@@ -443,30 +443,30 @@ const struct m68k_opcode m68k_opcodes[]
{"fsaddb", 4, two(0xF000, 0x5862), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
{"fsaddb", 4, two(0xF000, 0x5862), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
-{"fsaddd", 4, two(0xF000, 0x0066), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
+{"fsaddd", 4, two(0xF000, 0x0062), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
{"fsaddd", 4, two(0xF000, 0x5462), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
{"fsaddd", 4, two(0xF000, 0x5462), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
{"fsaddl", 4, two(0xF000, 0x4062), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
{"fsaddl", 4, two(0xF000, 0x4062), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fsaddp", 4, two(0xF000, 0x4C62), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
{"fsadds", 4, two(0xF000, 0x4462), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
-{"fsadds", 4, two(0xF000, 0x4862), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fsadds", 4, two(0xF000, 0x4462), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fsaddw", 4, two(0xF000, 0x5062), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
{"fsaddw", 4, two(0xF000, 0x5062), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fsaddx", 4, two(0xF000, 0x0062), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
{"fsaddx", 4, two(0xF000, 0x4862), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
-{"fdaddb", 4, two(0xF000, 0x5826), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fdaddb", 4, two(0xF000, 0x5866), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fdaddb", 4, two(0xF000, 0x5866), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
{"fdaddd", 4, two(0xF000, 0x0066), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
-{"fdaddd", 4, two(0xF000, 0x5426), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fdaddd", 4, two(0xF000, 0x5466), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fdaddd", 4, two(0xF000, 0x5466), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
-{"fdaddl", 4, two(0xF000, 0x4026), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
+{"fdaddl", 4, two(0xF000, 0x4066), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
{"fdaddl", 4, two(0xF000, 0x4066), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
{"fdaddp", 4, two(0xF000, 0x4C66), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
{"fdadds", 4, two(0xF000, 0x4466), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
-{"fdadds", 4, two(0xF000, 0x4826), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
-{"fdaddw", 4, two(0xF000, 0x5026), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fdadds", 4, two(0xF000, 0x4466), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fdaddw", 4, two(0xF000, 0x5066), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fdaddw", 4, two(0xF000, 0x5066), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
{"fdaddx", 4, two(0xF000, 0x0066), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
{"fdaddx", 4, two(0xF000, 0x4866), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
@@ -1234,7 +1234,7 @@ const struct m68k_opcode m68k_opcodes[]
{"fsubx", 4, two(0xF000, 0x4828), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat },
{"fsubx", 4, two(0xF000, 0x0028), two(0xF1C0, 0xE07F), "IiFt", mfloat },
-{"fssubb", 4, two(0xF000, 0x5828), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fssubb", 4, two(0xF000, 0x5868), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fssubb", 4, two(0xF000, 0x5868), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
{"fssubd", 4, two(0xF000, 0x0068), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
{"fssubd", 4, two(0xF000, 0x5468), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
@@ -1250,17 +1250,17 @@ const struct m68k_opcode m68k_opcodes[]
{"fssubx", 4, two(0xF000, 0x4868), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },
{"fssubx", 4, two(0xF000, 0x0068), two(0xF1C0, 0xE07F), "IiFt", m68040up },
-{"fdsubb", 4, two(0xF000, 0x586A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fdsubb", 4, two(0xF000, 0x586c), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fdsubb", 4, two(0xF000, 0x586c), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up },
-{"fdsubd", 4, two(0xF000, 0x006A), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
-{"fdsubd", 4, two(0xF000, 0x546A), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
+{"fdsubd", 4, two(0xF000, 0x006c), two(0xF1C0, 0xE07F), "IiF8F7", cfloat },
+{"fdsubd", 4, two(0xF000, 0x546c), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat },
{"fdsubd", 4, two(0xF000, 0x546c), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up },
-{"fdsubl", 4, two(0xF000, 0x406A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fdsubl", 4, two(0xF000, 0x406c), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fdsubl", 4, two(0xF000, 0x406c), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up },
{"fdsubp", 4, two(0xF000, 0x4C6c), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up },
-{"fdsubs", 4, two(0xF000, 0x446A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fdsubs", 4, two(0xF000, 0x446c), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fdsubs", 4, two(0xF000, 0x446c), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up },
-{"fdsubw", 4, two(0xF000, 0x506A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
+{"fdsubw", 4, two(0xF000, 0x506c), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fdsubw", 4, two(0xF000, 0x506c), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up },
{"fdsubx", 4, two(0xF000, 0x006c), two(0xF1C0, 0xE07F), "IiF8F7", m68040up },
{"fdsubx", 4, two(0xF000, 0x486c), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up },