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[PATCH] gax ".code16gcc" fix
- From: Tim Cheng <chengyuqing at yahoo dot com>
- To: binutils at sourceware dot org
- Date: Thu, 10 Nov 2005 16:35:46 -0800 (PST)
- Subject: [PATCH] gax ".code16gcc" fix
The following patched fixed ".code16gcc" directive in gas, where it
doesn't generate 0x66 prefixes for jmp instructions.
Built and Tested on x86-64 and i686
Tim
===================================================================
RCS file: /cvs/src/src/include/opcode/i386.h,v
retrieving revision 1.60
diff -u -r1.60 i386.h
--- opcode/i386.h 20 Jun 2005 23:18:38 -0000 1.60
+++ opcode/i386.h 27 Jun 2005 19:05:24 -0000
@@ -396,15 +396,15 @@
{"lcall", 1, 0xff, 3, 0, wl_Suf|Modrm|DefaultSize,
{WordMem|JumpAbsolute, 0, 0} },
#define JUMP_PC_RELATIVE 0xeb
-{"jmp", 1, 0xeb, X, 0, NoSuf|Jump, {
Disp,0, 0} },
-{"jmp", 1, 0xff, 4, CpuNo64, wl_Suf|Modrm, {
WordReg|WordMem|JumpAbsolute, 0, 0} },
-{"jmp", 1, 0xff, 4, Cpu64, wq_Suf|Modrm|NoRex64, {
Reg16|Reg64|ShortMem|LLongMem|JumpAbsolute, 0, 0} },
+{"jmp", 1, 0xeb, X, 0, NoSuf|Jump|DefaultSize,
{ Disp,0, 0} },
+{"jmp", 1, 0xff, 4, CpuNo64, wl_Suf|Modrm|DefaultSize,
{ WordReg|WordMem|JumpAbsolute, 0, 0} },
+{"jmp", 1, 0xff, 4, Cpu64,
wq_Suf|Modrm|NoRex64|DefaultSize, {
Reg16|Reg64|ShortMem|LLongMem|JumpAbsolute, 0, 0} },
/* Intel Syntax. */
-{"jmp", 2, 0xea, X, CpuNo64,wl_Suf|JumpInterSegment, { Imm16,
Imm16|Imm32, 0} },
+{"jmp", 2, 0xea, X, CpuNo64,wl_Suf|JumpInterSegment|DefaultSize, {
Imm16, Imm16|Imm32, 0} },
/* Intel Syntax. */
-{"jmp", 1, 0xff, 5, 0, x_Suf|Modrm, {
WordMem|JumpAbsolute, 0, 0} },
-{"ljmp", 2, 0xea, X, CpuNo64, wl_Suf|JumpInterSegment, { Imm16,
Imm16|Imm32, 0} },
-{"ljmp", 1, 0xff, 5, 0, wl_Suf|Modrm, {
WordMem|JumpAbsolute, 0, 0} },
+{"jmp", 1, 0xff, 5, 0, x_Suf|Modrm|DefaultSize,
{ WordMem|JumpAbsolute, 0, 0} },
+{"ljmp", 2, 0xea, X, CpuNo64, wl_Suf|JumpInterSegment|DefaultSize,
{ Imm16, Imm16|Imm32, 0} },
+{"ljmp", 1, 0xff, 5, 0, wl_Suf|Modrm|DefaultSize,
{ WordMem|JumpAbsolute, 0, 0} },
{"ret", 0, 0xc3, X, CpuNo64,wl_Suf|DefaultSize, { 0, 0,
0} },
{"ret", 1, 0xc2, X, CpuNo64,wl_Suf|DefaultSize, {
Imm16, 0, 0} },
@@ -418,36 +418,36 @@
{"leave", 0, 0xc9, X, Cpu64, wq_Suf|DefaultSize|NoRex64, { 0, 0,
0} },
/* Conditional jumps. */
-{"jo", 1, 0x70, X, 0, NoSuf|Jump, { Disp, 0, 0}
},
-{"jno", 1, 0x71, X, 0, NoSuf|Jump, { Disp,
0, 0} },
-{"jb", 1, 0x72, X, 0, NoSuf|Jump, { Disp, 0, 0}
},
-{"jc", 1, 0x72, X, 0, NoSuf|Jump, { Disp, 0, 0}
},
-{"jnae", 1, 0x72, X, 0, NoSuf|Jump, { Disp, 0, 0}
},
-{"jnb", 1, 0x73, X, 0, NoSuf|Jump, { Disp,
0, 0} },
-{"jnc", 1, 0x73, X, 0, NoSuf|Jump, { Disp,
0, 0} },
-{"jae", 1, 0x73, X, 0, NoSuf|Jump, { Disp,
0, 0} },
-{"je", 1, 0x74, X, 0, NoSuf|Jump, { Disp, 0, 0}
},
-{"jz", 1, 0x74, X, 0, NoSuf|Jump, { Disp, 0, 0}
},
-{"jne", 1, 0x75, X, 0, NoSuf|Jump, { Disp,
0, 0} },
-{"jnz", 1, 0x75, X, 0, NoSuf|Jump, { Disp,
0, 0} },
-{"jbe", 1, 0x76, X, 0, NoSuf|Jump, { Disp,
0, 0} },
-{"jna", 1, 0x76, X, 0, NoSuf|Jump, { Disp,
0, 0} },
-{"jnbe", 1, 0x77, X, 0, NoSuf|Jump, { Disp, 0, 0}
},
-{"ja", 1, 0x77, X, 0, NoSuf|Jump, { Disp, 0, 0}
},
-{"js", 1, 0x78, X, 0, NoSuf|Jump, { Disp, 0, 0}
},
-{"jns", 1, 0x79, X, 0, NoSuf|Jump, { Disp,
0, 0} },
-{"jp", 1, 0x7a, X, 0, NoSuf|Jump, { Disp, 0, 0}
},
-{"jpe", 1, 0x7a, X, 0, NoSuf|Jump, { Disp,
0, 0} },
-{"jnp", 1, 0x7b, X, 0, NoSuf|Jump, { Disp,
0, 0} },
-{"jpo", 1, 0x7b, X, 0, NoSuf|Jump, { Disp,
0, 0} },
-{"jl", 1, 0x7c, X, 0, NoSuf|Jump, { Disp, 0, 0}
},
-{"jnge", 1, 0x7c, X, 0, NoSuf|Jump, { Disp, 0, 0}
},
-{"jnl", 1, 0x7d, X, 0, NoSuf|Jump, { Disp,
0, 0} },
-{"jge", 1, 0x7d, X, 0, NoSuf|Jump, { Disp,
0, 0} },
-{"jle", 1, 0x7e, X, 0, NoSuf|Jump, { Disp,
0, 0} },
-{"jng", 1, 0x7e, X, 0, NoSuf|Jump, { Disp,
0, 0} },
-{"jnle", 1, 0x7f, X, 0, NoSuf|Jump, { Disp, 0, 0}
},
-{"jg", 1, 0x7f, X, 0, NoSuf|Jump, { Disp, 0, 0}
},
+{"jo", 1, 0x70, X, 0, NoSuf|Jump|DefaultSize,
{ Disp, 0, 0} },
+{"jno", 1, 0x71, X, 0, NoSuf|Jump|DefaultSize,
{ Disp, 0, 0} },
+{"jb", 1, 0x72, X, 0, NoSuf|Jump|DefaultSize,
{ Disp, 0, 0} },
+{"jc", 1, 0x72, X, 0, NoSuf|Jump|DefaultSize,
{ Disp, 0, 0} },
+{"jnae", 1, 0x72, X, 0, NoSuf|Jump|DefaultSize,
{ Disp, 0, 0} },
+{"jnb", 1, 0x73, X, 0, NoSuf|Jump|DefaultSize,
{ Disp, 0, 0} },
+{"jnc", 1, 0x73, X, 0, NoSuf|Jump|DefaultSize,
{ Disp, 0, 0} },
+{"jae", 1, 0x73, X, 0, NoSuf|Jump|DefaultSize,
{ Disp, 0, 0} },
+{"je", 1, 0x74, X, 0, NoSuf|Jump|DefaultSize,
{ Disp, 0, 0} },
+{"jz", 1, 0x74, X, 0, NoSuf|Jump|DefaultSize,
{ Disp, 0, 0} },
+{"jne", 1, 0x75, X, 0, NoSuf|Jump|DefaultSize,
{ Disp, 0, 0} },
+{"jnz", 1, 0x75, X, 0, NoSuf|Jump|DefaultSize,
{ Disp, 0, 0} },
+{"jbe", 1, 0x76, X, 0, NoSuf|Jump|DefaultSize,
{ Disp, 0, 0} },
+{"jna", 1, 0x76, X, 0, NoSuf|Jump|DefaultSize,
{ Disp, 0, 0} },
+{"jnbe", 1, 0x77, X, 0, NoSuf|Jump|DefaultSize,
{ Disp, 0, 0} },
+{"ja", 1, 0x77, X, 0, NoSuf|Jump|DefaultSize,
{ Disp, 0, 0} },
+{"js", 1, 0x78, X, 0, NoSuf|Jump|DefaultSize,
{ Disp, 0, 0} },
+{"jns", 1, 0x79, X, 0, NoSuf|Jump|DefaultSize,
{ Disp, 0, 0} },
+{"jp", 1, 0x7a, X, 0, NoSuf|Jump|DefaultSize,
{ Disp, 0, 0} },
+{"jpe", 1, 0x7a, X, 0, NoSuf|Jump|DefaultSize,
{ Disp, 0, 0} },
+{"jnp", 1, 0x7b, X, 0, NoSuf|Jump|DefaultSize,
{ Disp, 0, 0} },
+{"jpo", 1, 0x7b, X, 0, NoSuf|Jump|DefaultSize,
{ Disp, 0, 0} },
+{"jl", 1, 0x7c, X, 0, NoSuf|Jump|DefaultSize,
{ Disp, 0, 0} },
+{"jnge", 1, 0x7c, X, 0, NoSuf|Jump|DefaultSize,
{ Disp, 0, 0} },
+{"jnl", 1, 0x7d, X, 0, NoSuf|Jump|DefaultSize,
{ Disp, 0, 0} },
+{"jge", 1, 0x7d, X, 0, NoSuf|Jump|DefaultSize,
{ Disp, 0, 0} },
+{"jle", 1, 0x7e, X, 0, NoSuf|Jump|DefaultSize,
{ Disp, 0, 0} },
+{"jng", 1, 0x7e, X, 0, NoSuf|Jump|DefaultSize,
{ Disp, 0, 0} },
+{"jnle", 1, 0x7f, X, 0, NoSuf|Jump|DefaultSize,
{ Disp, 0, 0} },
+{"jg", 1, 0x7f, X, 0, NoSuf|Jump|DefaultSize,
{ Disp, 0, 0} },
/* jcxz vs. jecxz is chosen on the basis of the address size prefix.
*/
{"jcxz", 1, 0xe3, X, CpuNo64,NoSuf|JumpByte|Size16, { Disp, 0, 0}
},