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Thumb32 assembler (27/69)


Make parse_operands record explicitly which operands were omitted,
eliminating a nasty little kludge in NOP handling.  This will also be
useful later, when we get to the more complicated operands like the
ones the load and store instructions take.

zw

	* config/tc-arm.c (struct arm_it): Make 'operands' a struct, not a
        union.  Add 'present' field.
	(parse_operands): Remove value adjustment from OP_(ocI255).
	Set present bit on all operands that were present in the source.
	(do_nop): Check present bit to know if operand was present.
	Remove compensating adjustment to value.

===================================================================
Index: gas/config/tc-arm.c
--- gas/config/tc-arm.c	(revision 28)
+++ gas/config/tc-arm.c	(revision 29)
@@ -191,10 +191,11 @@
     int                      pc_rel;
   } reloc;
 
-  union
+  struct
   {
     int reg;
     int imm;
+    int present    : 1;
   } operands[6];
 };
 
@@ -4445,7 +4446,6 @@
 	  po_char_or_fail ('{');
 	  po_imm_or_fail (0, 255, TRUE);
 	  po_char_or_fail ('}');
-	  inst.operands[i].imm += 1;  /* to distinguish 0 from omitted */
 	  break;
 	  
 	  /* Expressions */
@@ -4473,6 +4473,8 @@
 	default:
 	  as_fatal ("unhandled operand code %03o", *p);
 	}
+      /* If we get here, this operand was successfully parsed.  */
+      inst.operands[i].present = 1;
 
       if (*++p == OP_(stop))
 	break;
@@ -5768,11 +5770,11 @@
   if (parse_operands (str, OPERANDS1(ocI255)))
     return;
 
-  if (inst.operands[0].imm)
+  if (inst.operands[0].present)
     {
       /* Architectural NOP hints are CPSR sets with no bits selected.  */
       inst.instruction &= 0xf0000000;
-      inst.instruction |= 0x0320f000 + inst.operands[0].imm - 1;
+      inst.instruction |= 0x0320f000 + inst.operands[0].imm;
     }
 }
 

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