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PATCH: Fix m68k disassembler
On Thu, Nov 06, 2003 at 03:15:55AM +0100, Bernardo Innocenti wrote:
> H. J. Lu wrote:
>
> >>Hmmm... I will investigate, but I can't build on m68k-linux and
> >
> >What is wrong with m68k-linux?
>
> It's just that I don't have my Amiga to run it ;-)
I don't have a m68k machine. You can build a cross binutils with
--target=m68k-linux.
>
>
> >>m68k-elf-objdump appears to work fine here:
> >
> >It is not the problem. fmoveml is the problem.
>
> Oops. Could you please tell me the exact command line that
> dejagnu passes when running that test?
>
> The disassembler must be told what the CPU type is, otherwise
> it could interpret instructions incorrectly.
>
> The description of fmoveml for the 68881 is:
>
> {"fmoveml", two(0xF000, 0x8000), two(0xF1C0, 0xE3FF), "Ii*lL8", mfloat },
>
> The failure might have something to do with any of these new
> instructions added by the patch:
>
> {"fmovel", two(0xF000, 0x8000), two(0xF1C0, 0xE3FF), "Iibss8", cfloat },
> {"fmovem", two(0xF000, 0xD000), two(0xFFC0, 0xFF00), "IizsL3", cfloat },
> {"fmovem", two(0xF000, 0xD000), two(0xFFC0, 0xFF00), "Iizs#3", cfloat },
> {"fmovem", two(0xF000, 0xF000), two(0xFFC0, 0xFF00), "Ii#3ys", cfloat },
> {"fmovem", two(0xF000, 0xF000), two(0xFFC0, 0xFF00), "IiL3ys", cfloat },
>
> The first one is expecially suspicious because it has the very same encoding
> and mask. The BFD disassembler should be able to tell one from the other
> because "cfloat" and "mfloat" are different CPU masks:
But you can't have the mixed order of "cfloat" and "mfloat". I am checking
this patch to fix the m68k disassembler.
H.J.
----
2003-11-05 H.J. Lu <hongjiu.lu@intel.com>
* m68k-opc.c (m68k_opcodes): Reorder "fmovel".
--- opcodes/m68k-opc.c.fmovel 2003-10-21 16:45:42.000000000 -0700
+++ opcodes/m68k-opc.c 2003-11-05 20:23:32.000000000 -0800
@@ -847,15 +847,15 @@ const struct m68k_opcode m68k_opcodes[]
{"fmoved", two(0xF000, 0x7400), two(0xF1C0, 0xFC7F), "IiF7ws", cfloat },
{"fmovel", two(0xF000, 0x4000), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat },
{"fmovel", two(0xF000, 0x6000), two(0xF1C0, 0xFC7F), "IiF7$l", mfloat },
+/* FIXME: the next two variants should not permit moving an address
+ register to anything but the floating point instruction register. */
+{"fmovel", two(0xF000, 0xA000), two(0xF1C0, 0xE3FF), "Iis8%s", mfloat },
+{"fmovel", two(0xF000, 0x8000), two(0xF1C0, 0xE3FF), "Ii*ls8", mfloat },
{"fmovel", two(0xF000, 0x4000), two(0xF1C0, 0xFC7F), "IibsF7", cfloat },
{"fmovel", two(0xF000, 0x6000), two(0xF1C0, 0xFC7F), "IiF7bs", cfloat },
/* Move the FP control registers */
{"fmovel", two(0xF000, 0xA000), two(0xF1C0, 0xE3FF), "Iis8ps", cfloat },
{"fmovel", two(0xF000, 0x8000), two(0xF1C0, 0xE3FF), "Iibss8", cfloat },
-/* FIXME: the next two variants should not permit moving an address
- register to anything but the floating point instruction register. */
-{"fmovel", two(0xF000, 0xA000), two(0xF1C0, 0xE3FF), "Iis8%s", mfloat },
-{"fmovel", two(0xF000, 0x8000), two(0xF1C0, 0xE3FF), "Ii*ls8", mfloat },
{"fmovep", two(0xF000, 0x4C00), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat },
{"fmovep", two(0xF000, 0x6C00), two(0xF1C0, 0xFC00), "IiF7~pkC", mfloat },
{"fmovep", two(0xF000, 0x7C00), two(0xF1C0, 0xFC0F), "IiF7~pDk", mfloat },