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Hmmm, that's not what I see. When I run with the -mips4 option, I get this: 0: 3401e000 li at,0xe000 4: 00010c38 dsll at,at,0x10 8: 00411025 or v0,v0,at c: 2401ffff li at,-1 10: 00010c38 dsll at,at,0x10 14: 34211fff ori at,at,0x1fff 18: 00010c38 dsll at,at,0x10 1c: 3421ffff ori at,at,0xffff 20: 00411024 and v0,v0,at
Which is what cgd saw also. I configured for mips-elf. What did you configure for?
Moreover, it's difficult to interpret your suggestion for instructions
like `or' and `and'. Those instructions don't have `d' variants; they
don't need them, because the operation is well defined whether working
with a 64-bit value or a sign extended 32-bit value. In this case,
the assembler is synthesizing an immediate value for `or' and `and'.
What size should it synthesize for, when assembling for a 64-bit
target?
li $2, 0x1234 or $2, $2, 0x80000000 addu $2, $2, 1
li $2, 0x1234 or $2, $2, 0xffffffff80000000 addu $2, $2, 1
dli $3, 0x80000000 or $2, $2, $3
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