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Re: PATCH RFC: Fix ARM bug by splitting up iwmmxt_movsi_insn
- From: Richard Earnshaw <rearnsha at arm dot com>
- To: Daniel Jacobowitz <drow at mvista dot com>, Ian Lance Taylor <ian at wasabisystems dot com>
- Cc: Richard dot Earnshaw at arm dot com, gcc-patches at gcc dot gnu dot org, nickc at redhat dot com, binutils at sources dot redhat dot com
- Date: Mon, 13 Oct 2003 17:56:51 +0100
- Subject: Re: PATCH RFC: Fix ARM bug by splitting up iwmmxt_movsi_insn
- Organization: ARM Ltd.
- Reply-to: Richard dot Earnshaw at arm dot com
> Usage WSTR<B,H,W,D>{Cond} wRm, <address_mode>
> WSTRW wCx, <address_mode>
> Qualifiers B Store Byte
> H Store Half
> W Store Word
> D Store Double
>
> So yes, it appears that the wCx registers are differentiated by using the
> cond=0xf encoding and the others have a normal cond field. Of course
> normally you store the wRx registers anyway. It would be nice to
> generate predicated wstrw instructions for wRx.
In which case the final alternative should also be removed from the
predicated variant of iwmmx_movsi_insn.
R.