RE: [PATCH] : For SH target, generate warning if Destination register is same for parallel insns

["Dhananjay R. Deshpande" <dhananjayd at kpit dot com>]

Hi,
Arati is currently on leave. 

The patch below reverts the earlier patch and implements your suggestion to generate
warning if destination register is same for padd /psub and pmuls.

If you find this patch appropriate, please apply it otherwise you can revert the 
earlier patch.

Regards,
Dhananjay Deshpande

====================================================================================
--- tc-sh.c.orig	Wed Jun 19 16:24:41 2002
+++ tc-sh.c	Wed Jun 19 16:23:32 2002
@@ -1566,27 +1566,6 @@
 	  sh_operand_info *user = operands + n;
 	  sh_arg_type arg = this_try->arg[n];
 
- 	  /* If this is a parallel insn check to see if both
-	     parts have the same destination register.  */
- 	  if ((n == 2) && (this_try->nibbles[0] == PPI))
-	    {
-	      static boolean bIsPPI = false;
-	      static int nLastDestReg;
-
-	      if (!bIsPPI)
-		{
-		  bIsPPI = true;
-		  nLastDestReg = user->reg;
-		}
-	      else /* Second insn.  */
-		{
-		  if (nLastDestReg == user->reg)
-		    as_warn (_("destination register is same for parallel insns"));
-
-		  bIsPPI = false;
-		}
-	    }
-
 	  switch (arg)
 	    {
 	    case A_DISP_PC:
@@ -2257,6 +2236,15 @@
 		default:
 		  as_bad (_("bad padd / psub pmuls output operand"));
 		}
+		/* Generate waring if destination register for padd / psub 
+		   and pmuls is same ( only for A0 or A1 )
+		   If last nibble is 1010 then A0 is used in both padd / psub
+		   and pmuls. If it is 1111 then A1 is used as destination 
+		   register in both padd / psub and pmuls */
+
+		if ((((field_b | reg_efg) & 0x000F) == 0x000A ) 
+			|| (((field_b | reg_efg) & 0x000F) == 0x000F ))
+			as_warn (_("destination register is same for parallel insns"));
 	    }
 	  field_b += 0x4000 + reg_efg;
 	  break;
====================================================================================
> 
> -----Original Message-----
> From: Joern Rennecke [mailto:joern.rennecke@superh.com]
> Sent: Friday, June 14, 2002 9:15 PM
> To: Arati Dikey
> Cc: binutils@sources.redhat.com
> Subject: Re: [PATCH] : For SH target, generate warning if Destination
> register is same for parallel insns
> 
> 
> Arati Dikey wrote:
> > 
> > Hi !
> > 
> > The SH assembler currently does not generate a warning if the same
> > destination register is used in parallel instructions. As 
> this can lead
> > to unexpected results, the user needs to be warned as
> > is done in other commercial assemblers.
> > 
> > For example,
> >         PADD X0,Y0,A0 PMULS A1,X0,A0
> > The following patch generates the warning. I have also 
> verified that it
> > does not cause any
> > side effect on other DSP instructions.
> 
> Apparently you didn't test a lot of combinations.
> > 
> > Regards,
> > Arati Dikey
> > 
> > Changelog
> > 2002-01-23  Arati Dikey <aratid@kpit.com>
> > 
> >         * tc-sh.c (get_specific): Generate warning if the same
> > destination register is used in                   parallel 
> instructions.
> 
> > +   static boolean bIsPPI = false ;
> > +   static int nLastDestReg ;
> 	
> This patch is incorrect.  It makes gas complain about using the same
> destination register in separate three-operand parallel processing.
> Moreover, get_specific is a bad choice for this hack, since it is
> used for every instruction, thus you slow down the assembler 
> needlessly.
> Please back oput this patch.
> 
> A much better place to do this check is in assemble_ppi.  This final
> check can be done in the PMUL / if (field_b) case.
> The first register can be either decodes from field_b, or 
> stored beforehand
> in the PPIC case.
> 
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