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[MIPS PATCH RFA] Assume that macros won't be generating MIPS-3Dinsns.
- From: cgd at broadcom dot com
- To: binutils at sources dot redhat dot com
- Date: 24 Apr 2002 14:34:48 -0700
- Subject: [MIPS PATCH RFA] Assume that macros won't be generating MIPS-3Dinsns.
[ sorry if this comes through as a duplicate; tried to send it earlier
and I think it got eaten by some DNS lossage... ]
The patch below undoes one of the changes that I added as part of the
MIPS-3D support. I enabled support in macro_build() for inclusion of
MIPS-3D instructions in the macro expansions.
On further reflection, I'd like to undo that because:
* the likelyhood of macro instructions which generate expansions
including MIPS-3D instructions is currently nil, and hopefully we
won't be adding (m)any new macro instructions, let alone ones which
use MIPS-3D opcodes.
* it sets bad precedent: future ASE code would have to be put there as
well, which leads to much duplication of the opcode operand
handling, etc., when in reality it really isn't necessary.
Tested only by gmake && gmake check on binutils, host x86-linux,
targets mips-linux and mips64-elf. No failures.
chris
===================================================================
2002-04-24 Chris G. Demetriou <cgd@broadcom.com>
* config/tc-mips.c (macro_build): Do _not_ allow MIPS-3D
instructions to be generated by macros.
Index: config/tc-mips.c
===================================================================
RCS file: /cvs/src/src/gas/config/tc-mips.c,v
retrieving revision 1.117
diff -u -p -r1.117 tc-mips.c
--- config/tc-mips.c 22 Apr 2002 21:50:44 -0000 1.117
+++ config/tc-mips.c 24 Apr 2002 18:28:21 -0000
@@ -2913,12 +2913,11 @@ macro_build (place, counter, ep, name, f
/* Search until we get a match for NAME. */
while (1)
{
+ /* It is assumed here that macros will never generate
+ MIPS-3D instructions. */
if (strcmp (fmt, insn.insn_mo->args) == 0
&& insn.insn_mo->pinfo != INSN_MACRO
- && OPCODE_IS_MEMBER (insn.insn_mo,
- (mips_opts.isa
- | (mips_opts.ase_mips3d ? INSN_MIPS3D : 0)),
- mips_arch)
+ && OPCODE_IS_MEMBER (insn.insn_mo, mips_opts.isa, mips_arch)
&& (mips_arch != CPU_R4650 || (insn.insn_mo->pinfo & FP_D) == 0))
break;