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PATCH: Fix the MIPS ISA ELF setting (Re: RedHat 7.1/mips update)
- To: jim at jtan dot com
- Subject: PATCH: Fix the MIPS ISA ELF setting (Re: RedHat 7.1/mips update)
- From: "H . J . Lu" <hjl at lucon dot org>
- Date: Fri, 26 Oct 2001 09:32:48 -0700
- Cc: binutils at sourceware dot cygnus dot com
- References: <20011026001025.A7648@lucon.org>
On Fri, Oct 26, 2001 at 12:10:25AM -0700, H . J . Lu wrote:
> On Thu, Oct 25, 2001 at 08:48:36PM -0400, Jim Paris wrote:
> > > It is intentional. Do what the message says. I only have to check my
> > > arch/mips/Makefile from -mcpu=xxx to -mtune=xxx.
> >
> > The line relevant to my architecture in arch/mips/Makefile used:
> >
> > -mcpu=4100 -mips2 -Wa,--trap
> >
> > The new binutils doesn't allow this; the -mcpu is ignored, so I get:
> >
> > {standard input}:91: Error: opcode not supported on this processor: R6000 (MIPS2) `standby'
> > {standard input}:178: Error: opcode not supported on this processor: R6000 (MIPS2) `hibernate'
> >
> > So, I try changing it to
> >
> > -mtune=4100 -mips2 -Wa,--trap
> >
> > as you suggest here; binutils stops complaining about incompatible
> > parameters, but I get the same build error. What I'm currently using
> > is:
> >
> > -march=r4100 -Wa,-m4100,--trap
> >
> > which elimiates the errors, but has the side effect that everything is
> > now MIPS3. I don't really know much about the different ISA levels;
> > is it preferable to compile the kernel as MIPS2 for some reason, and
> > if so, how do I do that while still getting the R4100 instructions?
>
> I agree. It seems no way to set the ELF e_flags field to indicate
> an object file containing this MIPS ISA plus instructions from that
> MIPS cpu. The problem is we are setting both EF_MIPS_ARCH and
> EF_MIPS_MACH in bfd. I believe they should be set by the assembler
> instead. I'd like to add bfd_mips_elf[32|64]_set_isa () and to set the
> EF_MIPS_ARCH field and let bfd set the EF_MIPS_MACH field only. Then
> we should allow
>
> -march=r4100 -mips2
>
> which means to use instructions from mips2 plus those from r4100.
>
>
Any comments on this patch?
H.J.
-----
2001-10-26 H.J. Lu <hjl@gnu.org>
* elf32-mips.c: Include "opcode/mips.h".
(bfd_mips_elf_set_isa): New function. Set the EF_MIPS_ARCH
field in the ELF header.
(_bfd_mips_elf_final_write_processing): Set the EF_MIPS_ARCH
field only if it is unset.
2001-10-26 H.J. Lu <hjl@gnu.org>
* config/tc-mips.c (md_begin): Check if -march is compatible
with -mipsN. Call bfd_mips_elf_set_isa to set ISA in the
ELF header for ELF.
2001-10-26 H.J. Lu <hjl@gnu.org>
* mips.h (bfd_mips_elf_set_isa): New prototype.
--- binutils/bfd/elf32-mips.c.isa Tue Oct 23 08:44:19 2001
+++ binutils/bfd/elf32-mips.c Fri Oct 26 09:28:38 2001
@@ -36,6 +36,7 @@ Foundation, Inc., 59 Temple Place - Suit
#include "genlink.h"
#include "elf-bfd.h"
#include "elf/mips.h"
+#include "opcode/mips.h"
/* Get the ECOFF swapping routines. */
#include "coff/sym.h"
@@ -2334,6 +2335,55 @@ _bfd_mips_elf_object_p (abfd)
return true;
}
+/* Set MIPS ISA in the ELF header. */
+boolean
+bfd_mips_elf_set_isa (abfd, isa)
+ bfd *abfd;
+ int isa;
+{
+ unsigned long val;
+
+ switch (isa)
+ {
+ default:
+ return false;
+ break;
+
+ case ISA_MIPS1:
+ val = E_MIPS_ARCH_1;
+ break;
+
+ case ISA_MIPS2:
+ val = E_MIPS_ARCH_2;
+ break;
+
+ case ISA_MIPS3:
+ val = E_MIPS_ARCH_3;
+ break;
+
+ case ISA_MIPS4:
+ val = E_MIPS_ARCH_4;
+ break;
+
+ case ISA_MIPS5:
+ val = E_MIPS_ARCH_5;
+ break;
+
+ case ISA_MIPS32:
+ val = E_MIPS_ARCH_32;
+ break;
+
+ case ISA_MIPS64:
+ val = E_MIPS_ARCH_64;
+ break;
+ }
+
+ elf_elfheader (abfd)->e_flags &= ~EF_MIPS_ARCH;
+ elf_elfheader (abfd)->e_flags |= val;
+
+ return true;
+}
+
/* The final processing done just before writing out a MIPS ELF object
file. This gets the MIPS architecture right based on the machine
number. This is used by both the 32-bit and the 64-bit ABI. */
@@ -2343,75 +2393,92 @@ _bfd_mips_elf_final_write_processing (ab
bfd *abfd;
boolean linker ATTRIBUTE_UNUSED;
{
- unsigned long val;
+ unsigned long isa, cpu;
unsigned int i;
Elf_Internal_Shdr **hdrpp;
const char *name;
asection *sec;
+ isa = 0;
+ cpu = 0;
switch (bfd_get_mach (abfd))
{
default:
case bfd_mach_mips3000:
- val = E_MIPS_ARCH_1;
+ isa = E_MIPS_ARCH_1;
break;
case bfd_mach_mips3900:
- val = E_MIPS_ARCH_1 | E_MIPS_MACH_3900;
+ isa = E_MIPS_ARCH_1;
+ cpu = E_MIPS_MACH_3900;
break;
case bfd_mach_mips6000:
- val = E_MIPS_ARCH_2;
+ isa = E_MIPS_ARCH_2;
break;
case bfd_mach_mips4000:
case bfd_mach_mips4300:
case bfd_mach_mips4400:
case bfd_mach_mips4600:
- val = E_MIPS_ARCH_3;
+ isa = E_MIPS_ARCH_3;
break;
case bfd_mach_mips4010:
- val = E_MIPS_ARCH_3 | E_MIPS_MACH_4010;
+ isa = E_MIPS_ARCH_3;
+ cpu = E_MIPS_MACH_4010;
break;
case bfd_mach_mips4100:
- val = E_MIPS_ARCH_3 | E_MIPS_MACH_4100;
+ isa = E_MIPS_ARCH_3;
+ cpu = E_MIPS_MACH_4100;
break;
case bfd_mach_mips4111:
- val = E_MIPS_ARCH_3 | E_MIPS_MACH_4111;
+ isa = E_MIPS_ARCH_3;
+ cpu = E_MIPS_MACH_4111;
break;
case bfd_mach_mips4650:
- val = E_MIPS_ARCH_3 | E_MIPS_MACH_4650;
+ isa = E_MIPS_ARCH_3;
+ cpu = E_MIPS_MACH_4650;
break;
case bfd_mach_mips5000:
case bfd_mach_mips8000:
case bfd_mach_mips10000:
case bfd_mach_mips12000:
- val = E_MIPS_ARCH_4;
+ isa = E_MIPS_ARCH_4;
break;
case bfd_mach_mips5:
- val = E_MIPS_ARCH_5;
+ isa = E_MIPS_ARCH_5;
break;
case bfd_mach_mips_sb1:
- val = E_MIPS_ARCH_64 | E_MIPS_MACH_SB1;
+ isa = E_MIPS_ARCH_64;
+ cpu = E_MIPS_MACH_SB1;
break;
case bfd_mach_mipsisa32:
- val = E_MIPS_ARCH_32;
+ isa = E_MIPS_ARCH_32;
break;
case bfd_mach_mipsisa64:
- val = E_MIPS_ARCH_64;
+ isa = E_MIPS_ARCH_64;
}
- elf_elfheader (abfd)->e_flags &= ~(EF_MIPS_ARCH | EF_MIPS_MACH);
- elf_elfheader (abfd)->e_flags |= val;
+ if (isa != 0 && (elf_elfheader (abfd)->e_flags & EF_MIPS_ARCH) == 0)
+ {
+ elf_elfheader (abfd)->e_flags &= ~EF_MIPS_ARCH;
+ elf_elfheader (abfd)->e_flags |= isa;
+ }
+
+ if (cpu != 0)
+ {
+ elf_elfheader (abfd)->e_flags &= ~EF_MIPS_MACH;
+ elf_elfheader (abfd)->e_flags |= cpu;
+ }
/* Set the sh_info field for .gptab sections and other appropriate
info for each special section. */
--- binutils/gas/config/tc-mips.c.isa Sat Oct 20 23:32:26 2001
+++ binutils/gas/config/tc-mips.c Fri Oct 26 09:16:48 2001
@@ -1054,11 +1054,11 @@ md_begin ()
the command line, or will be set otherwise if one was. */
if (mips_arch != CPU_UNKNOWN && mips_opts.isa != ISA_UNKNOWN)
{
- /* We have to check if the isa is the default isa of arch. Otherwise
- we'll get invalid object file headers. */
+ /* We have to check if the isa is compatible with the arch isa.
+ Otherwise we'll get invalid object file headers. */
ci = mips_cpu_info_from_cpu (mips_arch);
assert (ci != NULL);
- if (mips_opts.isa != ci->isa)
+ if ((mips_opts.isa & ci->isa) != mips_opts.isa)
{
/* This really should be an error instead of a warning, but old
compilers only have -mcpu which sets both arch and tune. For
@@ -1133,6 +1133,12 @@ md_begin ()
if (! bfd_set_arch_mach (stdoutput, bfd_arch_mips, mips_arch))
as_warn (_("Could not set architecture and machine"));
+#if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
+ if (OUTPUT_FLAVOR == bfd_target_elf_flavour
+ && ! bfd_mips_elf_set_isa (stdoutput, mips_opts.isa))
+ as_warn (_("Could not set architecture"));
+#endif
+
file_mips_isa = mips_opts.isa;
op_hash = hash_new ();
--- binutils/include/elf/mips.h.isa Fri Sep 7 15:43:58 2001
+++ binutils/include/elf/mips.h Fri Oct 26 08:46:08 2001
@@ -817,6 +817,9 @@ extern void bfd_mips_elf_swap_options_in
extern void bfd_mips_elf_swap_options_out
PARAMS ((bfd *, const Elf_Internal_Options *, Elf_External_Options *));
+/* Set MIPS ISA in the ELF header. */
+extern boolean bfd_mips_elf_set_isa PARAMS ((bfd *, int));
+
/* Values which may appear in the kind field of an Elf_Options
structure. */