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Parallel instruction syntax
- To: binutils at sources dot redhat dot com
- Subject: Parallel instruction syntax
- From: Laurent Pinchart <laurent dot pinchart at capflow dot com>
- Date: Wed, 06 Jun 2001 17:31:42 +0200
- References: <3B110F34.7334@snafu.de> <m366e97h1v.fsf@north-pole.nickc.cambridge.redhat.com>
- Reply-To: laurent dot pinchart at capflow dot com
Hi,
I'm (still) strying to port the binutils for the TMS320C6000 (Texas
Instrument).
I ran into a problem with the parallel instruction syntax for GAS.
The processor can execute up to 8 instructions in parallel. The TI
syntax for the assembly code is
instruction 1
|| instruction 2
|| instruction 3
|| ...
|| instruction 8
Each opcode contains a parallel flag stating if the NEXT instruction
should be executed in parallel with the current one, or if it should be
executed on the next clock cycle.
Unfortunately, that means that an opcode can only be fully encoded when
the next line of assembly code is parsed.
How is GAS supposed to handle that ? I checked several processors with
parallel processing abilities already included in GAS, but all of them
can only execute 2 instructions in parallel, and the source code for that is
instruction 1 || instruction 2
Any help about that issue would be greatly appreciated.
Laurent Pinchart