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x86_64 fixes
- To: patches at x86-64 dot org, binutils at sources dot redhat dot com
- Subject: x86_64 fixes
- From: Jan Hubicka <jh at suse dot cz>
- Date: Sat, 13 Jan 2001 01:02:10 +0100
Hi
This patch fixes few x86_64 problems. The "ret" is implicitly 64bit,
so "retl" does not exist and "retq" should not have prefix.
Opposite is true about "iret" and "lret".
The patch makes both assembler and disassembler to handle this consistently.
It also fixes pusha template that was broken and got refused with this patch.
Is such patch under scope I can install w/o approval as x86_64 maintainer?
Honza
So led 13 01:05:17 CET 2001 Jan Hubicka <jh@suse.cz>
* i386.c (md_assemble): Check cpu_flags even for nullary instructions.
* i386.h (i386_optab): Fix pusha and ret templates.
* i386-dis.c (dis386_att, disx86_64_att): Fix ret, lret and iret
templates.
*** gas/config/tc-i386.c.old Sat Jan 13 01:02:22 2001
--- gas/config/tc-i386.c Sat Jan 13 01:02:24 2001
*************** md_assemble (line)
*** 1707,1715 ****
|| t->extension_opcode == 7))) /* 0xd9,7 "f{n}stcw" */
continue;
else if (!t->operands)
! /* 0 operands always matches. */
! break;
overlap0 = i.types[0] & t->operand_types[0];
switch (t->operands)
--- 1707,1720 ----
|| t->extension_opcode == 7))) /* 0xd9,7 "f{n}stcw" */
continue;
+ /* 0 operands always matches. */
else if (!t->operands)
! {
! if (t->cpu_flags & ~cpu_arch_flags)
! continue;
! /* We've found a match; break out of loop. */
! break;
! }
overlap0 = i.types[0] & t->operand_types[0];
switch (t->operands)
*** include/opcode/i386.h.old Sat Jan 13 00:52:58 2001
--- include/opcode/i386.h Sat Jan 13 01:03:52 2001
*************** static const template i386_optab[] = {
*** 154,160 ****
{"push", 1, 0x06, X, Cpu64, q_Suf|Seg2ShortForm|DefaultSize|NoRex64, { SReg2, 0, 0 } },
{"push", 1, 0x0fa0, X, Cpu386|Cpu64, q_Suf|Seg3ShortForm|DefaultSize|NoRex64, { SReg3, 0, 0 } },
! {"pusha", 0, 0x60, X, Cpu186|Cpu64, wl_Suf|DefaultSize, { 0, 0, 0 } },
/* Pop instructions. */
{"pop", 1, 0x58, X, CpuNo64, wl_Suf|ShortForm|DefaultSize, { WordReg, 0, 0 } },
--- 154,160 ----
{"push", 1, 0x06, X, Cpu64, q_Suf|Seg2ShortForm|DefaultSize|NoRex64, { SReg2, 0, 0 } },
{"push", 1, 0x0fa0, X, Cpu386|Cpu64, q_Suf|Seg3ShortForm|DefaultSize|NoRex64, { SReg3, 0, 0 } },
! {"pusha", 0, 0x60, X, Cpu186|CpuNo64, wl_Suf|DefaultSize, { 0, 0, 0 } },
/* Pop instructions. */
{"pop", 1, 0x58, X, CpuNo64, wl_Suf|ShortForm|DefaultSize, { WordReg, 0, 0 } },
*************** static const template i386_optab[] = {
*** 389,396 ****
{"ljmp", 1, 0xff, 5, CpuNo64, wl_Suf|Modrm, { WordMem|JumpAbsolute, 0, 0} },
{"ljmp", 1, 0xff, 5, Cpu64, q_Suf|Modrm|NoRex64, { WordMem|JumpAbsolute, 0, 0} },
! {"ret", 0, 0xc3, X, 0, wlq_Suf|DefaultSize, { 0, 0, 0} },
! {"ret", 1, 0xc2, X, 0, wlq_Suf|DefaultSize, { Imm16, 0, 0} },
{"lret", 0, 0xcb, X, 0, wlq_Suf|DefaultSize, { 0, 0, 0} },
{"lret", 1, 0xca, X, 0, wlq_Suf|DefaultSize, { Imm16, 0, 0} },
{"enter", 2, 0xc8, X, Cpu186, wlq_Suf|DefaultSize, { Imm16, Imm8, 0} },
--- 389,398 ----
{"ljmp", 1, 0xff, 5, CpuNo64, wl_Suf|Modrm, { WordMem|JumpAbsolute, 0, 0} },
{"ljmp", 1, 0xff, 5, Cpu64, q_Suf|Modrm|NoRex64, { WordMem|JumpAbsolute, 0, 0} },
! {"ret", 0, 0xc3, X, CpuNo64,wlq_Suf|DefaultSize, { 0, 0, 0} },
! {"ret", 1, 0xc2, X, CpuNo64,wlq_Suf|DefaultSize, { Imm16, 0, 0} },
! {"ret", 0, 0xc3, X, Cpu64, q_Suf|DefaultSize|NoRex64,{ 0, 0, 0} },
! {"ret", 1, 0xc2, X, Cpu64, q_Suf|DefaultSize|NoRex64,{ Imm16, 0, 0} },
{"lret", 0, 0xcb, X, 0, wlq_Suf|DefaultSize, { 0, 0, 0} },
{"lret", 1, 0xca, X, 0, wlq_Suf|DefaultSize, { Imm16, 0, 0} },
{"enter", 2, 0xc8, X, Cpu186, wlq_Suf|DefaultSize, { Imm16, Imm8, 0} },
*** opcodes/i386-dis.c.old Sat Jan 13 00:50:14 2001
--- opcodes/i386-dis.c Sat Jan 13 00:52:44 2001
*************** static const struct dis386 dis386_att[]
*** 661,668 ****
/* c0 */
{ GRP2b },
{ GRP2S },
! { "retP", Iw, XX, XX },
! { "retP", XX, XX, XX },
{ "lesS", Gv, Mp, XX },
{ "ldsS", Gv, Mp, XX },
{ "movA", Eb, Ib, XX },
--- 661,668 ----
/* c0 */
{ GRP2b },
{ GRP2S },
! { "retI", Iw, XX, XX },
! { "retI", XX, XX, XX },
{ "lesS", Gv, Mp, XX },
{ "ldsS", Gv, Mp, XX },
{ "movA", Eb, Ib, XX },
*************** static const struct dis386 dis386_att[]
*** 670,681 ****
/* c8 */
{ "enterI", Iw, Ib, XX },
{ "leaveI", XX, XX, XX },
! { "lretI", Iw, XX, XX },
! { "lretI", XX, XX, XX },
{ "int3", XX, XX, XX },
{ "int", Ib, XX, XX },
{ "into", XX, XX, XX},
! { "iretI", XX, XX, XX },
/* d0 */
{ GRP2b_one },
{ GRP2S_one },
--- 670,681 ----
/* c8 */
{ "enterI", Iw, Ib, XX },
{ "leaveI", XX, XX, XX },
! { "lretP", Iw, XX, XX },
! { "lretP", XX, XX, XX },
{ "int3", XX, XX, XX },
{ "int", Ib, XX, XX },
{ "into", XX, XX, XX},
! { "iretP", XX, XX, XX },
/* d0 */
{ GRP2b_one },
{ GRP2S_one },
*************** static const struct dis386 disx86_64_att
*** 1256,1267 ****
/* c8 */
{ "enterI", Iw, Ib, XX },
{ "leaveI", XX, XX, XX },
! { "lretI", Iw, XX, XX },
! { "lretI", XX, XX, XX },
{ "int3", XX, XX, XX },
{ "int", Ib, XX, XX },
{ "(bad)", XX, XX, XX }, /* reserved. */
! { "iretI", XX, XX, XX },
/* d0 */
{ GRP2b_one },
{ GRP2S_one },
--- 1256,1267 ----
/* c8 */
{ "enterI", Iw, Ib, XX },
{ "leaveI", XX, XX, XX },
! { "lretP", Iw, XX, XX },
! { "lretP", XX, XX, XX },
{ "int3", XX, XX, XX },
{ "int", Ib, XX, XX },
{ "(bad)", XX, XX, XX }, /* reserved. */
! { "iretP", XX, XX, XX },
/* d0 */
{ GRP2b_one },
{ GRP2S_one },