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Re: mips instructions
- To: ian at zembu dot com (Ian Lance Taylor)
- Subject: Re: mips instructions
- From: cgd at sibyte dot com (Chris G. Demetriou)
- Date: 19 Dec 2000 10:20:19 -0800
- Cc: echristo at redhat dot com, binutils at sources dot redhat dot com
- References: <3A3F1218.FE219171@redhat.com> <20001219172938.2902.qmail@daffy.airs.com> <mailpost.977248389.13731@postal.sibyte.com>
ian@zembu.com (Ian Lance Taylor) writes:
> Okay, I've been looking through the new mips32 and 64 isas. I've found
> a few instructions in opcodes/mips-opc.c that I can't find a description
> for anywhere:
>
> mfc2
> mfc3
> mtc2
> mtc3
>
> These are part of the original mips1 spec, but I can't find them in the
> new spec anywhere. Did I just miss the part where it said that all
> original mips1 instructions were supported?
>
> I have a vague recollection that MIPS took the bit definitions for
> these coprocessor instructions and defined them as new instructions.
> Take a look at the bit patterns for the new instructions, and see if
> they overlap with these.
That's true for some, especially for the cp3 instructions. However,
MIPS32/MIPS64 really do define m.c2. (presumably, the notion is, with
all of these cores coming out of the woodwork, it may well be
reasonable for people to define a cproprocessor 2.)
As far as I'm concerned, the cp3 instructions are good catch-alls for
the those forms for disassembly. They shouldn't be used for assembly.
chris