This is the mail archive of the
binutils@sources.redhat.com
mailing list for the binutils project.
[patch] MIPS empic testcase bug fix
- To: binutils at sourceware dot cygnus dot com
- Subject: [patch] MIPS empic testcase bug fix
- From: cgd at sibyte dot com (Chris G. Demetriou)
- Date: 07 Oct 2000 18:47:30 -0700
In looking at why the empic testcase failed (see previous msg/patch
8-), i found that it also tripped over the expected output for the
lines:
la $3,2f-l5 # R_MIPS_GNU_REL_HI16 .text 0
! # R_MIPS_GNU_REL_HI16 .text D8
la $3,2f+8-l5 # R_MIPS_GNU_REL_HI16 .text 0
! # R_MIPS_GNU_REL_HI16 .text E8
In fact, both labels '2' and 'l5' are in the text section, and
therefore can be reduced to a simple constant; no reloc is required.
The patch below adjusts the testcase to reflect that fact.
apply from src/gas/testsuite:
2000-10-07 Chris Demetriou <cgd@sibyte.com>
* gas/mips/empic.d: Adjust for the fact that the difference
between two symbols in the same section are not expected to
generate a reloc.
* gas/mips/empic.s: Likewise. Also, correct typo in comment
about expected relocs.
Index: gas/mips/empic.d
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/mips/empic.d,v
retrieving revision 1.1
diff -c -r1.1 empic.d
*** empic.d 2000/03/11 02:16:25 1.1
--- empic.d 2000/10/08 01:29:51
***************
*** 55,66 ****
0+00000b8 R_MIPS_64 \.text
0+00000cc R_MIPS_GNU_REL16_S2 \.text
0+00000d0 R_MIPS_GNU_REL16_S2 \.text
! 0+00000d4 R_MIPS_GNU_REL_HI16 \.text
! 0+00000d8 R_MIPS_GNU_REL_LO16 \.text
! 0+00000dc R_MIPS_GNU_REL_HI16 \.text
! 0+00000e0 R_MIPS_GNU_REL_LO16 \.text
! 0+00000e4 R_MIPS_32 \.text
! 0+00000f0 R_MIPS_64 \.text
RELOCATION RECORDS FOR \[\.foo\]:
--- 55,62 ----
0+00000b8 R_MIPS_64 \.text
0+00000cc R_MIPS_GNU_REL16_S2 \.text
0+00000d0 R_MIPS_GNU_REL16_S2 \.text
! 0+00000dc R_MIPS_32 \.text
! 0+00000e8 R_MIPS_64 \.text
RELOCATION RECORDS FOR \[\.foo\]:
***************
*** 126,134 ****
00a0 3c030000 [26]46300d8 3c030000 [26]46300e8 .*
00b0 000000cc 00000034 00000000 000000cc .*
00c0 00000000 00000034 00000000 10000032 .*
! 00d0 10000033 3c030000 [26]463010c 3c030000 .*
! 00e0 [26]463011c 000000cc 00000034 00000000 .*
! 00f0 00000000 000000cc 00000000 00000034 .*
Contents of section \.data:
Contents of section \.reginfo:
0000 80000008 00000000 00000000 00000000 .*
--- 122,130 ----
00a0 3c030000 [26]46300d8 3c030000 [26]46300e8 .*
00b0 000000cc 00000034 00000000 000000cc .*
00c0 00000000 00000034 00000000 10000032 .*
! 00d0 10000033 24030034 2403003c 000000cc .*
! 00e0 00000034 00000000 00000000 000000cc .*
! 00f0 00000000 00000034 .*
Contents of section \.data:
Contents of section \.reginfo:
0000 80000008 00000000 00000000 00000000 .*
Index: gas/mips/empic.s
===================================================================
RCS file: /cvs/src/src/gas/testsuite/gas/mips/empic.s,v
retrieving revision 1.1
diff -c -r1.1 empic.s
*** empic.s 2000/03/11 02:16:25 1.1
--- empic.s 2000/10/08 01:29:51
***************
*** 40,48 ****
b 2f # R_MIPS_GNU_REL16_S2 .text 32
b 2f+4 # R_MIPS_GNU_REL16_S2 .text 33
la $3,2f-l5 # R_MIPS_GNU_REL_HI16 .text 0
! # R_MIPS_GNU_REL_HI16 .text D8
la $3,2f+8-l5 # R_MIPS_GNU_REL_HI16 .text 0
! # R_MIPS_GNU_REL_HI16 .text E8
.word 2f # R_MIPS_32 .text CC
.word 2f-l5 # R_MIPS_PC32 .text EC or 34
--- 40,48 ----
b 2f # R_MIPS_GNU_REL16_S2 .text 32
b 2f+4 # R_MIPS_GNU_REL16_S2 .text 33
la $3,2f-l5 # R_MIPS_GNU_REL_HI16 .text 0
! # R_MIPS_GNU_REL_LO16 .text D8
la $3,2f+8-l5 # R_MIPS_GNU_REL_HI16 .text 0
! # R_MIPS_GNU_REL_LO16 .text E8
.word 2f # R_MIPS_32 .text CC
.word 2f-l5 # R_MIPS_PC32 .text EC or 34
***************
*** 52,61 ****
2: # at address 0xCC.
b 2b # R_MIPS_GNU_REL16_S2 .text 32
b 2b+4 # R_MIPS_GNU_REL16_S2 .text 33
! la $3,2b-l5 # R_MIPS_GNU_REL_HI16 .text 0
! # R_MIPS_GNU_REL_HI16 .text 10C
! la $3,2b+8-l5 # R_MIPS_GNU_REL_HI16 .text 0
! # R_MIPS_GNU_REL_HI16 .text 11C
.word 2b # R_MIPS_32 .text CC
.word 2b-l5 # R_MIPS_PC32 .text 11C or 34
nop
--- 52,59 ----
2: # at address 0xCC.
b 2b # R_MIPS_GNU_REL16_S2 .text 32
b 2b+4 # R_MIPS_GNU_REL16_S2 .text 33
! la $3,2b-l5 # 34
! la $3,2b+8-l5 # 3C
.word 2b # R_MIPS_32 .text CC
.word 2b-l5 # R_MIPS_PC32 .text 11C or 34
nop