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Change behaviour of EITHER_BUT_PREFER_MU d30v opcodes
- To: binutils at sourceware dot cygnus dot com
- Subject: Change behaviour of EITHER_BUT_PREFER_MU d30v opcodes
- From: Nick Clifton <nickc at cygnus dot com>
- Date: Tue, 27 Jun 2000 11:20:08 -0700
Hi Guys,
I have checked in the following patch to change the behaviour of the
d30v assembler when it encounters an opcode with the
EITHER_BUT_PREFER_MU packing attribute. At the request of
Mitsubishi, these opcodes are no longer packed into reverse
sequential buckets, and the assembler will issue a warning message
if the input source code contains an explicit packing of this form.
The patch also updates the bittest d30v testcase which causes some
of the new warning messages to be issued.
Cheers
Nick
ChangeLog
2000-06-27 Nick Clifton <nickc@cygnus.com>
* config/tc-d30v.c (write_2_short): Do not allow opcodes with
the EITHER_BUT_PREFER_MU attribute to be combined into a reverse
sequential order, and emit warning messages if the input source
code contains constructs like that, or parallel constructs
containing such opcodes.
testsuite/ChangeLog
2000-06-27 Nick Clifton <nickc@cygnus.com>
* gas/d30v/bittest.l: Edit to match new warning messages produced
by assembler.
Index: config/tc-d30v.c
===================================================================
RCS file: /cvs/src//src/gas/config/tc-d30v.c,v
retrieving revision 1.10
diff -p -r1.10 tc-d30v.c
*** tc-d30v.c 2000/04/21 17:20:03 1.10
--- tc-d30v.c 2000/06/27 18:18:51
*************** write_2_short (opcode1, insn1, opcode2,
*** 832,841 ****
write_1_short (opcode1, insn1, fx->next, false);
return 1;
}
! else if (opcode1->op->unit == IU
! || (opcode1->op->unit == EITHER
! && opcode2->op->unit == EITHER_BUT_PREFER_MU))
{
/* reverse sequential */
insn = FM10 | (insn2 << 32) | insn1;
exec_type = EXEC_REVSEQ;
--- 832,848 ----
write_1_short (opcode1, insn1, fx->next, false);
return 1;
}
! else if (opcode1->op->unit == IU)
{
+ if (opcode2->op->unit == EITHER_BUT_PREFER_MU)
+ {
+ /* Case 103810 is a request from Mitsubishi that opcodes
+ with EITHER_BUT_PREFER_MU should not be executed in
+ reverse sequential order. */
+ write_1_short (opcode1, insn1, fx->next, false);
+ return 1;
+ }
+
/* reverse sequential */
insn = FM10 | (insn2 << 32) | insn1;
exec_type = EXEC_REVSEQ;
*************** write_2_short (opcode1, insn1, opcode2,
*** 872,878 ****
else
{
if (opcode2->op->unit == EITHER_BUT_PREFER_MU)
! as_warn (_("Executing %s in IU may not work"), opcode2->op->name);
insn = FM00 | (insn1 << 32) | insn2;
fx = fx->next;
--- 879,886 ----
else
{
if (opcode2->op->unit == EITHER_BUT_PREFER_MU)
! as_warn (_("Executing %s in IU in parallel with %s may not work"),
! opcode1->op->name, opcode2->op->name);
insn = FM00 | (insn1 << 32) | insn2;
fx = fx->next;
*************** write_2_short (opcode1, insn1, opcode2,
*** 887,894 ****
as_bad (_("special left instruction `%s' kills instruction "
"`%s' in right container"),
opcode1->op->name, opcode2->op->name);
- if (opcode2->op->unit == EITHER_BUT_PREFER_MU)
- as_warn (_("Executing %s in IU may not work"), opcode2->op->name);
insn = FM01 | (insn1 << 32) | insn2;
fx = fx->next;
break;
--- 895,900 ----
*************** write_2_short (opcode1, insn1, opcode2,
*** 896,903 ****
case EXEC_REVSEQ: /* reverse sequential */
if (opcode2->op->unit == MU)
as_bad (_("MU instruction may not be in the right container"));
! if (opcode2->op->unit == EITHER_BUT_PREFER_MU)
! as_warn (_("Executing %s in IU may not work"), opcode2->op->name);
insn = FM10 | (insn1 << 32) | insn2;
fx = fx->next;
break;
--- 902,911 ----
case EXEC_REVSEQ: /* reverse sequential */
if (opcode2->op->unit == MU)
as_bad (_("MU instruction may not be in the right container"));
! if (opcode1->op->unit == EITHER_BUT_PREFER_MU
! || opcode2->op->unit == EITHER_BUT_PREFER_MU)
! as_warn (_("Executing %s in reverse serial with %s may not work"),
! opcode1->op->name, opcode2->op->name);
insn = FM10 | (insn1 << 32) | insn2;
fx = fx->next;
break;
Index: testsuite/gas/d30v/bittest.l
===================================================================
RCS file: /cvs/src//src/gas/testsuite/gas/d30v/bittest.l,v
retrieving revision 1.1.1.1
diff -p -r1.1.1.1 bittest.l
*** bittest.l 1999/05/03 07:28:48 1.1.1.1
--- bittest.l 2000/06/27 18:18:51
***************
*** 1,10 ****
.*: Assembler messages:
.*: Warning: Swapping instruction order
.*: Warning: Executing bset in IU may not work
- .*: Warning: Executing btst in IU may not work
- .*: Warning: Executing bclr in IU may not work
- .*: Warning: Executing bnot in IU may not work
- .*: Warning: Executing bset in IU may not work
.*: Warning: Swapping instruction order
GAS LISTING .*
--- 1,8 ----
.*: Assembler messages:
.*: Warning: Swapping instruction order
+ .*: Warning: Executing nop in reverse serial with btst may not work
+ .*: Warning: Executing nop in IU in parallel with bclr may not work
.*: Warning: Executing bset in IU may not work
.*: Warning: Swapping instruction order
GAS LISTING .*
*************** GAS LISTING .*
*** 25,40 ****
11 00F00000
12
13 0010 00F00000 nop -> BSET R1, R2, R3
- .* Warning:Executing bset in IU may not work
13 82201083
14 0018 80F00000 nop <- BTST F1, R2, R3
! .* Warning:Executing btst in IU may not work
14 02001083
15 0020 00F00000 nop || BCLR R1, R2, R3
! .* Warning:Executing bclr in IU may not work
15 02301083
16 0028 00F00000 nop -> BNOT R1, R2, R3
- .* Warning:Executing bnot in IU may not work
16 82101083
17 0030 02101083 BNOT r1, r2, r3 -> nop
17 80F00000
--- 23,36 ----
11 00F00000
12
13 0010 00F00000 nop -> BSET R1, R2, R3
13 82201083
14 0018 80F00000 nop <- BTST F1, R2, R3
! .* Warning:Executing nop in reverse serial with btst may not work
14 02001083
15 0020 00F00000 nop || BCLR R1, R2, R3
! .* Warning:Executing nop in IU in parallel with bclr may not work
15 02301083
16 0028 00F00000 nop -> BNOT R1, R2, R3
16 82101083
17 0030 02101083 BNOT r1, r2, r3 -> nop
17 80F00000
*************** GAS LISTING .*
*** 52,56 ****
25 88C04146
26
27 joinll r4, r5, r6
! 28 0050 82201083 bset r1, r2, r3
! 28 08C04146
--- 48,52 ----
25 88C04146
26
27 joinll r4, r5, r6
! 28 0050 08C04146 bset r1, r2, r3
! 28 82201083