RE: a question on the definition of -relax in ld

[Kazu Hirata <kazu at hxi dot com>]

Jeff and Ian,

I think I am doing exactly what Ian is saying. With my patch applied, gas
outputs a reloc instead of relaxing right in the spot.

int main() {
asm("mov.b\tr0l,@0xffff00");
asm("mov.w\tr0,@0xffff00");
return 0; )

This sample code generates:

00000006 <_main>:
   6:   6a a8 00 ff ff 00 mov.b r0l,@0xffff00:32
                        8: relaxable mov.b:24   *ABS*+0xffff00
   c:   6b a0 00 ff ff 00 mov.w r0,@0xffff00:32
                        e: 32/24 relaxable move *ABS*+0xffff00

Most of the peripherals of H8/300[HS] are assigned above 0xffff00, so code
with intensive use of perfipherals runs faster and becomes smaller. Is the
above solution still dangerous?

Kazu Hirata

> -----Original Message-----
> From: Ian Lance Taylor [mailto:ian@zembu.com]
> Sent: Wednesday, March 15, 2000 12:26 PM
> To: Kazu Hirata
> Cc: binutils@sourceware.cygnus.com
> Subject: Re: a question on the definition of -relax in ld
> 
> 
>    Date: Wed, 15 Mar 2000 01:45:08 -0500
>    From: Kazu Hirata <kazu@hxi.com>
> 
>    It seems that the -relax option in ld means relaxing only 
> insn with a
>    reloc in it. I have a patch that also relaxes insn without 
> reloc. Could
>    such a patch be considered?
> 
> The -relax option just means to relax.  There is no requirement that
> the instruction have a reloc.
> 
> However, there is a requirement that the linker behave correctly in
> the presence of an unusual initialized const array, such as
>     const char a[] = { 0xf0, 0x0f };
> If the linker searches the .text section for the sequence 0xf00f, and
> finds such an array, and relaxes it, then the linker has made a
> mistake.
> 
> The usual way to avoid such a problem is to have the assembler issue a
> reloc for a relaxable instruction.  The assembler can not be confused
> as to whether it is looking at an instruction or data.  This reloc
> serves as a marker to the linker indicating that the data really is an
> instruction and is safe to relax.
> 
> If you use some other mechanism to ensure that you only relax
> instructions, then it is fine to not require a reloc.
> 
> For example, the SH relaxing uses explicit CODE and DATA relocs,
> emitted by the assembler, to permit the linker to distinguish
> sequences of instructions from data.  This permits the SH relaxation
> to not require a relocation on each instruction to be relaxed.  The
> SH1 through SH3 happen to execute load instructions more efficiently
> if they are aligned on a four byte boundary, so the linker uses the
> CODE and DATA relocs to scan instructions sequences for misaligned
> load instructions.  (Looking at it now, I find it hard to believe that
> this code works correctly, even though I wrote it myself.)
> 
> Ian