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PATCH: fix pa disassembly bug
- To: binutils@sourceware.cygnus.com
- Subject: PATCH: fix pa disassembly bug
- From: "Jerry Quinn" <jquinn@nortelnetworks.com>
- Date: Sun, 20 Jun 1999 23:50:30 -0400 (EDT)
This patch fixes a bug with disassembly of xmpyu, fmpyfadd, and
fmpynfadd. They were using the 'E' and 'X' codes to represent their
two input operands. While the correct opcode is generated by gas, the
disassembler would incorrectly read the opcode, using the wrong bit
for l/r selection. The solution is to use 'J' and 'K' codes instead.
Changelog:
* gas/config/tc-hppa.c (pa_ip): Add 'J' and 'K' code
processing.
* include/opcode/hppa.h (pa_opcodes): Change xmpyu, fmpyfadd,
and fmpynfadd to use 'J' and 'K' instead of 'E' and 'X'.
*** pa-prev/gas/config/tc-hppa.c Sun Jun 20 17:39:28 1999
--- gas-src/gas/config/tc-hppa.c Sun Jun 20 23:44:19 1999
***************
*** 2533,2538 ****
--- 2533,2550 ----
continue;
}
+ /* Float operand 1 similar to 'b' but with l/r registers. */
+ case 'J':
+ {
+ struct pa_11_fp_reg_struct result;
+
+ pa_parse_number (&s, &result);
+ CHECK_FIELD (result.number_part, 31, 0, 0);
+ opcode |= result.number_part << 21;
+ opcode |= (result.l_r_select & 1) << 7;
+ continue;
+ }
+
/* Handle L/R register halves like 'b'. */
case '3':
{
***************
*** 2575,2580 ****
--- 2587,2604 ----
opcode |= (result.l_r_select & 1) << 12;
opcode |= 1 << 27;
}
+ continue;
+ }
+
+ /* Float operand 2, like 'x' but with l/r register halves. */
+ case 'K':
+ {
+ struct pa_11_fp_reg_struct result;
+
+ pa_parse_number (&s, &result);
+ CHECK_FIELD (result.number_part, 31, 0, 0);
+ opcode |= (result.number_part & 0x1f) << 16;
+ opcode |= (result.l_r_select & 1) << 12;
continue;
}
*** pa-prev/include/opcode/hppa.h Sun Jun 20 17:39:46 1999
--- gas-src/include/opcode/hppa.h Sun Jun 20 18:04:52 1999
***************
*** 484,498 ****
{ "fcnvfx", 0x38010200, 0xfc1f8720, "FGJ,v", pa10},
{ "fcnvfxt", 0x30018200, 0xfc1f87e0, "FGE,v", pa10},
{ "fcnvfxt", 0x38018200, 0xfc1f8720, "FGJ,v", pa10},
! { "fmpyfadd", 0xb8000000, 0xfc000020, "FE,X,3,v", pa20},
! { "fmpynfadd", 0xb8000020, 0xfc000020, "FE,X,3,v", pa20},
{ "fneg", 0x3000c000, 0xfc1fe7e0, "FE,v", pa20},
{ "fneg", 0x3800c000, 0xfc1fe720, "FJ,v", pa20},
{ "fnegabs", 0x3000e000, 0xfc1fe7e0, "FE,v", pa20},
{ "fnegabs", 0x3800e000, 0xfc1fe720, "FJ,v", pa20},
{ "fcmp", 0x30000400, 0xfc00e7e0, "FME,X", pa10},
{ "fcmp", 0x38000400, 0xfc00e720, "IMJ,K", pa10},
! { "xmpyu", 0x38004700, 0xfc00e720, "E,X,v", pa11},
{ "fmpyadd", 0x18000000, 0xfc000000, "H4,6,7,9,8", pa11},
{ "fmpysub", 0x98000000, 0xfc000000, "H4,6,7,9,8", pa11},
{ "ftest", 0x30002420, 0xffffffff, "", pa10},
--- 484,498 ----
{ "fcnvfx", 0x38010200, 0xfc1f8720, "FGJ,v", pa10},
{ "fcnvfxt", 0x30018200, 0xfc1f87e0, "FGE,v", pa10},
{ "fcnvfxt", 0x38018200, 0xfc1f8720, "FGJ,v", pa10},
! { "fmpyfadd", 0xb8000000, 0xfc000020, "FJ,K,3,v", pa20},
! { "fmpynfadd", 0xb8000020, 0xfc000020, "FJ,K,3,v", pa20},
{ "fneg", 0x3000c000, 0xfc1fe7e0, "FE,v", pa20},
{ "fneg", 0x3800c000, 0xfc1fe720, "FJ,v", pa20},
{ "fnegabs", 0x3000e000, 0xfc1fe7e0, "FE,v", pa20},
{ "fnegabs", 0x3800e000, 0xfc1fe720, "FJ,v", pa20},
{ "fcmp", 0x30000400, 0xfc00e7e0, "FME,X", pa10},
{ "fcmp", 0x38000400, 0xfc00e720, "IMJ,K", pa10},
! { "xmpyu", 0x38004700, 0xfc00e720, "J,K,v", pa11},
{ "fmpyadd", 0x18000000, 0xfc000000, "H4,6,7,9,8", pa11},
{ "fmpysub", 0x98000000, 0xfc000000, "H4,6,7,9,8", pa11},
{ "ftest", 0x30002420, 0xffffffff, "", pa10},
--
Jerry Quinn Tel: (514) 761-8737
jquinn@nortelnetworks.com Fax: (514) 761-8505
Speech Recognition Research