[binutils-gdb/binutils-2_34-branch] [ARM]: Add support for vldmia/vldmdb/vstmia/vstmdb instructions in MVE.
SRINATH PARVATHANENI
sripar01@sourceware.org
Fri Jan 31 16:40:00 GMT 2020
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=f23bd9891fce239179e9ee9a6d2657869824993c
commit f23bd9891fce239179e9ee9a6d2657869824993c
Author: Srinath Parvathaneni <srinath.parvathaneni@arm.com>
Date: Fri Jan 31 16:16:19 2020 +0000
[ARM]: Add support for vldmia/vldmdb/vstmia/vstmdb instructions in MVE.
This patch adds support for assembly instructions vldmia, vldmdb, vstmia
and vstmdb in MVE. This instructions are already supported for Armv8-M
Floating-point Extension.
gas/ChangeLog:
2020-01-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
* config/tc-arm.c (fldmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2"
to support VLDMIA instruction for MVE.
(fldmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VLDMDB
instruction for MVE.
(fstmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMIA
instruction for MVE.
(fstmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMDB
instruction for MVE.
* testsuite/gas/arm/mve-ldst.d: New test.
* testsuite/gas/arm/mve-ldst.s: Likewise.
Diff:
---
gas/ChangeLog | 13 ++++++++++++
gas/config/tc-arm.c | 10 ++++++----
gas/testsuite/gas/arm/mve-ldst.d | 43 ++++++++++++++++++++++++++++++++++++++++
gas/testsuite/gas/arm/mve-ldst.s | 13 ++++++++++++
4 files changed, 75 insertions(+), 4 deletions(-)
diff --git a/gas/ChangeLog b/gas/ChangeLog
index e79a452..6eb9cb3 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,16 @@
+2020-01-31 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
+
+ * config/tc-arm.c (fldmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2"
+ to support VLDMIA instruction for MVE.
+ (fldmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VLDMDB
+ instruction for MVE.
+ (fstmias): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMIA
+ instruction for MVE.
+ (fstmdbs): Moved inside "THUMB_VARIANT & arm_ext_v6t2" to support VSTMDB
+ instruction for MVE.
+ * testsuite/gas/arm/mve-ldst.d: New test.
+ * testsuite/gas/arm/mve-ldst.s: Likewise.
+
2020-01-31 Nick Clifton <nickc@redhat.com>
* po/fr.po: Updated French translation.
diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index 16cbac4..3adc570 100644
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -24989,6 +24989,12 @@ static const struct asm_opcode insns[] =
mcCE(fstd, d000b00, 2, (RVD, ADDRGLDC), vfp_dp_ldst),
mcCE(flds, d100a00, 2, (RVS, ADDRGLDC), vfp_sp_ldst),
mcCE(fsts, d000a00, 2, (RVS, ADDRGLDC), vfp_sp_ldst),
+
+ /* Memory operations. */
+ mcCE(fldmias, c900a00, 2, (RRnpctw, VRSLST), vfp_sp_ldstmia),
+ mcCE(fldmdbs, d300a00, 2, (RRnpctw, VRSLST), vfp_sp_ldstmdb),
+ mcCE(fstmias, c800a00, 2, (RRnpctw, VRSLST), vfp_sp_ldstmia),
+ mcCE(fstmdbs, d200a00, 2, (RRnpctw, VRSLST), vfp_sp_ldstmdb),
#undef THUMB_VARIANT
/* Moves and type conversions. */
@@ -25003,17 +25009,13 @@ static const struct asm_opcode insns[] =
cCE("fmxr", ee00a10, 2, (RVC, RR), rn_rd),
/* Memory operations. */
- cCE("fldmias", c900a00, 2, (RRnpctw, VRSLST), vfp_sp_ldstmia),
cCE("fldmfds", c900a00, 2, (RRnpctw, VRSLST), vfp_sp_ldstmia),
- cCE("fldmdbs", d300a00, 2, (RRnpctw, VRSLST), vfp_sp_ldstmdb),
cCE("fldmeas", d300a00, 2, (RRnpctw, VRSLST), vfp_sp_ldstmdb),
cCE("fldmiax", c900b00, 2, (RRnpctw, VRDLST), vfp_xp_ldstmia),
cCE("fldmfdx", c900b00, 2, (RRnpctw, VRDLST), vfp_xp_ldstmia),
cCE("fldmdbx", d300b00, 2, (RRnpctw, VRDLST), vfp_xp_ldstmdb),
cCE("fldmeax", d300b00, 2, (RRnpctw, VRDLST), vfp_xp_ldstmdb),
- cCE("fstmias", c800a00, 2, (RRnpctw, VRSLST), vfp_sp_ldstmia),
cCE("fstmeas", c800a00, 2, (RRnpctw, VRSLST), vfp_sp_ldstmia),
- cCE("fstmdbs", d200a00, 2, (RRnpctw, VRSLST), vfp_sp_ldstmdb),
cCE("fstmfds", d200a00, 2, (RRnpctw, VRSLST), vfp_sp_ldstmdb),
cCE("fstmiax", c800b00, 2, (RRnpctw, VRDLST), vfp_xp_ldstmia),
cCE("fstmeax", c800b00, 2, (RRnpctw, VRDLST), vfp_xp_ldstmia),
diff --git a/gas/testsuite/gas/arm/mve-ldst.d b/gas/testsuite/gas/arm/mve-ldst.d
new file mode 100644
index 0000000..b676b5c
--- /dev/null
+++ b/gas/testsuite/gas/arm/mve-ldst.d
@@ -0,0 +1,43 @@
+# name: MVE Floating point load multiple and store multiple instructions.
+# as: -march=armv8.1-m.main+mve
+# objdump: -dr --prefix-addresses --show-raw-insn -marmv8.1-m.main
+
+.*: +file format .*arm.*
+
+Disassembly of section .text:
+[^>]*> ecb0 8a01 vldmia r0!, {s16}
+[^>]*> ed30 8a01 vldmdb r0!, {s16}
+[^>]*> eca0 8a01 vstmia r0!, {s16}
+[^>]*> ed20 8a01 vstmdb r0!, {s16}
+[^>]*> ecb1 8a01 vldmia r1!, {s16}
+[^>]*> ed31 8a01 vldmdb r1!, {s16}
+[^>]*> eca1 8a01 vstmia r1!, {s16}
+[^>]*> ed21 8a01 vstmdb r1!, {s16}
+[^>]*> ecb2 8a01 vldmia r2!, {s16}
+[^>]*> ed32 8a01 vldmdb r2!, {s16}
+[^>]*> eca2 8a01 vstmia r2!, {s16}
+[^>]*> ed22 8a01 vstmdb r2!, {s16}
+[^>]*> ecb4 8a01 vldmia r4!, {s16}
+[^>]*> ed34 8a01 vldmdb r4!, {s16}
+[^>]*> eca4 8a01 vstmia r4!, {s16}
+[^>]*> ed24 8a01 vstmdb r4!, {s16}
+[^>]*> ecb7 8a01 vldmia r7!, {s16}
+[^>]*> ed37 8a01 vldmdb r7!, {s16}
+[^>]*> eca7 8a01 vstmia r7!, {s16}
+[^>]*> ed27 8a01 vstmdb r7!, {s16}
+[^>]*> ecb8 8a01 vldmia r8!, {s16}
+[^>]*> ed38 8a01 vldmdb r8!, {s16}
+[^>]*> eca8 8a01 vstmia r8!, {s16}
+[^>]*> ed28 8a01 vstmdb r8!, {s16}
+[^>]*> ecba 8a01 vldmia sl!, {s16}
+[^>]*> ed3a 8a01 vldmdb sl!, {s16}
+[^>]*> ecaa 8a01 vstmia sl!, {s16}
+[^>]*> ed2a 8a01 vstmdb sl!, {s16}
+[^>]*> ecbc 8a01 vldmia ip!, {s16}
+[^>]*> ed3c 8a01 vldmdb ip!, {s16}
+[^>]*> ecac 8a01 vstmia ip!, {s16}
+[^>]*> ed2c 8a01 vstmdb ip!, {s16}
+[^>]*> ecbe 8a01 vldmia lr!, {s16}
+[^>]*> ed3e 8a01 vldmdb lr!, {s16}
+[^>]*> ecae 8a01 vstmia lr!, {s16}
+[^>]*> ed2e 8a01 vstmdb lr!, {s16}
diff --git a/gas/testsuite/gas/arm/mve-ldst.s b/gas/testsuite/gas/arm/mve-ldst.s
new file mode 100644
index 0000000..c8bbebe
--- /dev/null
+++ b/gas/testsuite/gas/arm/mve-ldst.s
@@ -0,0 +1,13 @@
+.arch armv8.1-m.main
+.arch_extension dsp
+.arch_extension mve
+.syntax unified
+.thumb
+.text
+
+.irp op0, r0, r1, r2, r4, r7, r8, r10, r12, r14
+vldmia.32 \op0!,{s16}
+vldmdb.32 \op0!,{s16}
+vstmia.32 \op0!,{s16}
+vstmdb.32 \op0!,{s16}
+.endr
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