[binutils-gdb] PowerPC CELL cctp*
Alan Modra
amodra@sourceware.org
Tue Aug 11 12:37:02 GMT 2020
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=08770ec259afcc34c2400d5913003584334a412d
commit 08770ec259afcc34c2400d5913003584334a412d
Author: Alan Modra <amodra@gmail.com>
Date: Tue Aug 11 17:20:04 2020 +0930
PowerPC CELL cctp*
* ppc-opc.c (powerpc_opcodes): Move cctpl, cctpm and cctph.
Diff:
---
opcodes/ChangeLog | 4 ++++
opcodes/ppc-opc.c | 11 +++++++----
2 files changed, 11 insertions(+), 4 deletions(-)
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 95f8deb1b49..e31df782e30 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,7 @@
+2020-08-11 Alan Modra <amodra@gmail.com>
+
+ * ppc-opc.c (powerpc_opcodes): Move cctpl, cctpm and cctph.
+
2020-08-10 Przemyslaw Wirkus <przemyslaw.wirkus@arm.com>
* aarch64-opc.c (aarch64_print_operand):
diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c
index d62475e62f9..75944e27517 100644
--- a/opcodes/ppc-opc.c
+++ b/opcodes/ppc-opc.c
@@ -7127,6 +7127,12 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"sthux", X(31,439), X_MASK, COM, 0, {RS, RAS, RB}},
+/* or 1,1,1 */
+{"cctpl", 0x7c210b78, 0xffffffff, CELL, 0, {0}},
+/* or 2,2,2 */
+{"cctpm", 0x7c421378, 0xffffffff, CELL, 0, {0}},
+/* or 3,3,3 */
+{"cctph", 0x7c631b78, 0xffffffff, CELL, 0, {0}},
/* or 26,26,26 */
{"miso", 0x7f5ad378, 0xffffffff, POWER8|E6500, 0, {0}},
/* or 27,27,27 */
@@ -7137,6 +7143,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"mdoio", 0x7fbdeb78, 0xffffffff, POWER7, 0, {0}},
/* or 30,30,30 */
{"mdoom", 0x7fdef378, 0xffffffff, POWER7, 0, {0}},
+
{"mr", XRC(31,444,0), X_MASK, COM, 0, {RA, RSB}},
{"or", XRC(31,444,0), X_MASK, COM, 0, {RA, RS, RB}},
{"mr.", XRC(31,444,1), X_MASK, COM, 0, {RA, RSB}},
@@ -8025,10 +8032,6 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"dcbzl", XOPL(31,1014,1), XRT_MASK, POWER4|E500MC, PPC476, {RA0, RB}},
-{"cctpl", 0x7c210b78, 0xffffffff, CELL, 0, {0}},
-{"cctpm", 0x7c421378, 0xffffffff, CELL, 0, {0}},
-{"cctph", 0x7c631b78, 0xffffffff, CELL, 0, {0}},
-
{"dstt", XDSS(31,342,1), XDSS_MASK, PPCVEC, 0, {RA, RB, STRM}},
{"dststt", XDSS(31,374,1), XDSS_MASK, PPCVEC, 0, {RA, RB, STRM}},
{"dssall", XDSS(31,822,1), XDSS_MASK, PPCVEC, 0, {0}},
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