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[binutils-gdb] MIPS/GAS: Clear the ASE_MIPS16E2_MT flag for recalculation
- From: Maciej W.Rozycki <macro at sourceware dot org>
- To: bfd-cvs at sourceware dot org
- Date: 29 Jun 2017 23:56:06 -0000
- Subject: [binutils-gdb] MIPS/GAS: Clear the ASE_MIPS16E2_MT flag for recalculation
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=92cebb3dbea282bbf7357ed2f3f03bc92fee8c7b
commit 92cebb3dbea282bbf7357ed2f3f03bc92fee8c7b
Author: Maciej W. Rozycki <macro@imgtec.com>
Date: Fri Jun 30 00:55:07 2017 +0100
MIPS/GAS: Clear the ASE_MIPS16E2_MT flag for recalculation
Correct a commit 25499ac7ee92 ("MIPS16e2: Add MIPS16e2 ASE support") GAS
bug with the handling of the ASE_MIPS16E2_MT combination ASE flag, which
is not correctly calculated as `.set nomips16e2' and `.set nomt'
pseudo-ops are processed. This leads to code like:
$ cat foo.s
.set nomt
evpe
.align 4, 0
$ cat bar.s
.set nomips16e2
dvpe
.align 4, 0
$
to successfully assemble where it should not:
$ as -32 -mips32r3 -mmt -mips16 -mmips16e2 -o foo.o foo.s
$ as -32 -mips32r3 -mmt -mips16 -mmips16e2 -o bar.o bar.s
$ objdump -m mips:16 -d foo.o
foo.o: file format elf32-tradbigmips
Disassembly of section .text:
00000000 <.text>:
0: f027 6700 evpe
...
bar.o: file format elf32-tradbigmips
Disassembly of section .text:
00000000 <.text>:
0: f026 6700 dvpe
...
$
This happens because ASE_MIPS16E2_MT once set in `mips_set_ase' is never
cleared. Fix the problem by clearing it there before it is calculated
based on the ASE_MT and ASE_MIPS16E2 flags, making assembly fail as
expected:
$ as -32 -mips32r3 -mmt -mips16 -mmips16e2 -o foo.o foo.s
foo.s: Assembler messages:
foo.s:2: Error: opcode not supported on this processor: mips32r3 (mips32r3) `evpe'
$ as -32 -mips32r3 -mmt -mips16 -mmips16e2 -o bar.o bar.s
bar.s: Assembler messages:
bar.s:2: Error: opcode not supported on this processor: mips32r3 (mips32r3) `dvpe'
$
gas/
* config/tc-mips.c (mips_set_ase): Clear the ASE_MIPS16E2_MT
flag before recalculating.
* testsuite/gas/mips/mips16e2-mt-err.d: New test.
* testsuite/gas/mips/mips16e2-mt-err.l: New stderr output.
* testsuite/gas/mips/mips16e2-mt-err.s: New test source.
* testsuite/gas/mips/mips.exp: Run the new test.
Diff:
---
gas/ChangeLog | 9 +++++++++
gas/config/tc-mips.c | 5 +++++
gas/testsuite/gas/mips/mips.exp | 1 +
gas/testsuite/gas/mips/mips16e2-mt-err.d | 3 +++
gas/testsuite/gas/mips/mips16e2-mt-err.l | 3 +++
gas/testsuite/gas/mips/mips16e2-mt-err.s | 14 ++++++++++++++
6 files changed, 35 insertions(+)
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 92d1f86..43a7528 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,12 @@
+2017-06-29 Maciej W. Rozycki <macro@imgtec.com>
+
+ * config/tc-mips.c (mips_set_ase): Clear the ASE_MIPS16E2_MT
+ flag before recalculating.
+ * testsuite/gas/mips/mips16e2-mt-err.d: New test.
+ * testsuite/gas/mips/mips16e2-mt-err.l: New stderr output.
+ * testsuite/gas/mips/mips16e2-mt-err.s: New test source.
+ * testsuite/gas/mips/mips.exp: Run the new test.
+
2017-06-28 Tamar Christina <tamar.christina@arm.com>
* config/tc-aarch64.c (aarch64_reg_parse_32_64): Accept 4B.
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index d7a1ff3..d06143a 100644
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -2130,6 +2130,11 @@ mips_set_ase (const struct mips_ase *ase, struct mips_set_options *opts,
mask = mips_ase_mask (ase->flags);
opts->ase &= ~mask;
+
+ /* Clear combination ASE flags, which need to be recalculated based on
+ updated regular ASE settings. */
+ opts->ase &= ~ASE_MIPS16E2_MT;
+
if (enabled_p)
opts->ase |= ase->flags;
diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp
index 4d327f5..26d29e4 100644
--- a/gas/testsuite/gas/mips/mips.exp
+++ b/gas/testsuite/gas/mips/mips.exp
@@ -1403,6 +1403,7 @@ if { [istarget mips*-*-vxworks*] } {
run_dump_test "mips16e-jrc"
run_dump_test "mips16e2-lui"
+ run_dump_test "mips16e2-mt-err"
run_dump_test "mips16e2-copy"
run_dump_test "mips16e2-copy-err"
diff --git a/gas/testsuite/gas/mips/mips16e2-mt-err.d b/gas/testsuite/gas/mips/mips16e2-mt-err.d
new file mode 100644
index 0000000..4dc0e99
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips16e2-mt-err.d
@@ -0,0 +1,3 @@
+#name: MIPS16e2 MT ASE instruction errors
+#as: -32 -mips16 -mips32r2 -mmips16e2 -mmt
+#error-output: mips16e2-mt-err.l
diff --git a/gas/testsuite/gas/mips/mips16e2-mt-err.l b/gas/testsuite/gas/mips/mips16e2-mt-err.l
new file mode 100644
index 0000000..d9eb9b3
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips16e2-mt-err.l
@@ -0,0 +1,3 @@
+.*: Assembler messages:
+.*:8: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dvpe'
+.*:12: Error: opcode not supported on this processor: mips32r2 \(mips32r2\) `dvpe'
diff --git a/gas/testsuite/gas/mips/mips16e2-mt-err.s b/gas/testsuite/gas/mips/mips16e2-mt-err.s
new file mode 100644
index 0000000..78b43f4
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips16e2-mt-err.s
@@ -0,0 +1,14 @@
+# Verify that switching off either `mips16e2' or `mt' causes an assembly
+# error with a MIPS16e2 MT ASE instruction, which requires both at a time.
+
+ .text
+foo:
+ evpe
+ .set nomips16e2
+ dvpe
+ .set mips16e2
+ evpe
+ .set nomt
+ dvpe
+ .set mt
+ evpe