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[binutils-gdb] MIPS16e2: Add new MIPS16e2 ASE binutils and GAS tests
- From: Maciej W.Rozycki <macro at sourceware dot org>
- To: bfd-cvs at sourceware dot org
- Date: 15 May 2017 13:25:56 -0000
- Subject: [binutils-gdb] MIPS16e2: Add new MIPS16e2 ASE binutils and GAS tests
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=3f3467ffc4b0a397a7017b8ab729e4c0060b25f0
commit 3f3467ffc4b0a397a7017b8ab729e4c0060b25f0
Author: Maciej W. Rozycki <macro@imgtec.com>
Date: Mon May 15 13:45:42 2017 +0100
MIPS16e2: Add new MIPS16e2 ASE binutils and GAS tests
Verify MIPS16e2 ASE instruction assembly, disassembly and object file
flags.
binutils/
* testsuite/binutils-all/mips/mips16-undecoded.d: Add `-mips3'
to `as' flags.
* testsuite/binutils-all/mips/mips16e2-undecoded.d: New test.
* testsuite/binutils-all/mips/mips16e2-extend-insn.d: New test.
* testsuite/binutils-all/mips/mips16-undecoded.s: Remove
`.module mips3'.
* testsuite/binutils-all/mips/mips.exp: Run the new tests.
gas/
* testsuite/gas/mips/mips16e2.d: New test.
* testsuite/gas/mips/mips16e2-mt.d: New test.
* testsuite/gas/mips/mips16e2-sub.d: New test.
* testsuite/gas/mips/mips16e2@mips16e2-sub.d: New test.
* testsuite/gas/mips/mips16e2-mt-sub.d: New test.
* testsuite/gas/mips/mips16e2@mips16e2-mt-sub.d: New test.
* testsuite/gas/mips/mips16e2-hilo.d: New test.
* testsuite/gas/mips/mips16e2-hilo-n32.d: New test.
* testsuite/gas/mips/mips16e2-reloc-error.d: New test.
* testsuite/gas/mips/mips16e2-imm-error.d: New test.
* testsuite/gas/mips/elf_ase_mips16e2.d: New test.
* testsuite/gas/mips/elf_ase_mips16e2-2.d: New test.
* testsuite/gas/mips/elf-rel9-mips16e2.d: New test.
* testsuite/gas/mips/mips16e2-lui.d: New test.
* testsuite/gas/mips/mips16e2@mips32r2-sync.d: New test.
* testsuite/gas/mips/mips16e2@mips32r2-sync-1.d: New test.
* testsuite/gas/mips/mips16e2@lui-2.d: New test.
* testsuite/gas/mips/mips16e2-reloc-error.l: New stderr output.
* testsuite/gas/mips/mips16e2-imm-error.l: New stderr output.
* testsuite/gas/mips/mips16e2@lui-2.l: New stderr output.
* testsuite/gas/mips/mips16e2.s: New test source.
* testsuite/gas/mips/mips16e2-mt.s: New test source.
* testsuite/gas/mips/mips16e2-sub.s: New test source.
* testsuite/gas/mips/mips16e2-mt-sub.s: New test source.
* testsuite/gas/mips/mips16e2-hilo.s: New test source.
* testsuite/gas/mips/mips16e2-reloc-error.s: New test source.
* testsuite/gas/mips/mips16e2-imm-error.s: New test source.
* testsuite/gas/mips/elf-rel9-mips16e2.s: New test source.
* testsuite/gas/mips/mips16e2-lui.s: New test source.
* testsuite/gas/mips/mips.exp: Expand `mips32r2-sync',
`mips32r2-sync-1', `lui-1' and `lui-2' tests across MIPS16e2
architectures. Run the new tests.
Diff:
---
binutils/ChangeLog | 10 +
binutils/testsuite/binutils-all/mips/mips.exp | 2 +
.../testsuite/binutils-all/mips/mips16-undecoded.d | 2 +-
.../testsuite/binutils-all/mips/mips16-undecoded.s | 1 -
.../binutils-all/mips/mips16e2-extend-insn.d | 355 ++++++++++
.../binutils-all/mips/mips16e2-undecoded.d | 189 ++++++
gas/ChangeLog | 35 +
gas/testsuite/gas/mips/elf-rel9-mips16e2.d | 69 ++
gas/testsuite/gas/mips/elf-rel9-mips16e2.s | 62 ++
gas/testsuite/gas/mips/elf_ase_mips16e2-2.d | 21 +
gas/testsuite/gas/mips/elf_ase_mips16e2.d | 5 +
gas/testsuite/gas/mips/mips.exp | 33 +-
gas/testsuite/gas/mips/mips16e2-hilo-n32.d | 419 ++++++++++++
gas/testsuite/gas/mips/mips16e2-hilo.d | 419 ++++++++++++
gas/testsuite/gas/mips/mips16e2-hilo.s | 239 +++++++
gas/testsuite/gas/mips/mips16e2-imm-error.d | 4 +
gas/testsuite/gas/mips/mips16e2-imm-error.l | 67 ++
gas/testsuite/gas/mips/mips16e2-imm-error.s | 79 +++
gas/testsuite/gas/mips/mips16e2-lui.d | 22 +
gas/testsuite/gas/mips/mips16e2-lui.s | 18 +
gas/testsuite/gas/mips/mips16e2-mt-sub.d | 33 +
gas/testsuite/gas/mips/mips16e2-mt-sub.s | 4 +
gas/testsuite/gas/mips/mips16e2-mt.d | 21 +
gas/testsuite/gas/mips/mips16e2-mt.s | 21 +
gas/testsuite/gas/mips/mips16e2-reloc-error.d | 4 +
gas/testsuite/gas/mips/mips16e2-reloc-error.l | 18 +
gas/testsuite/gas/mips/mips16e2-reloc-error.s | 39 ++
gas/testsuite/gas/mips/mips16e2-sub.d | 749 +++++++++++++++++++++
gas/testsuite/gas/mips/mips16e2-sub.s | 3 +
gas/testsuite/gas/mips/mips16e2.d | 731 ++++++++++++++++++++
gas/testsuite/gas/mips/mips16e2.s | 210 ++++++
gas/testsuite/gas/mips/mips16e2@lui-2.d | 4 +
gas/testsuite/gas/mips/mips16e2@lui-2.l | 5 +
gas/testsuite/gas/mips/mips16e2@mips16e2-mt-sub.d | 34 +
gas/testsuite/gas/mips/mips16e2@mips16e2-sub.d | 5 +
gas/testsuite/gas/mips/mips16e2@mips32r2-sync-1.d | 29 +
gas/testsuite/gas/mips/mips16e2@mips32r2-sync.d | 29 +
37 files changed, 3982 insertions(+), 8 deletions(-)
diff --git a/binutils/ChangeLog b/binutils/ChangeLog
index 8a977d1..7222d9a 100644
--- a/binutils/ChangeLog
+++ b/binutils/ChangeLog
@@ -1,5 +1,15 @@
2017-05-15 Maciej W. Rozycki <macro@imgtec.com>
+ * testsuite/binutils-all/mips/mips16-undecoded.d: Add `-mips3'
+ to `as' flags.
+ * testsuite/binutils-all/mips/mips16e2-undecoded.d: New test.
+ * testsuite/binutils-all/mips/mips16e2-extend-insn.d: New test.
+ * testsuite/binutils-all/mips/mips16-undecoded.s: Remove
+ `.module mips3'.
+ * testsuite/binutils-all/mips/mips.exp: Run the new tests.
+
+2017-05-15 Maciej W. Rozycki <macro@imgtec.com>
+
* readelf.c (print_mips_ases): Handle MIPS16e2 ASE.
* NEWS: Mention MIPS16e2 ASE support.
diff --git a/binutils/testsuite/binutils-all/mips/mips.exp b/binutils/testsuite/binutils-all/mips/mips.exp
index 33752c6..496d9cc 100644
--- a/binutils/testsuite/binutils-all/mips/mips.exp
+++ b/binutils/testsuite/binutils-all/mips/mips.exp
@@ -35,9 +35,11 @@ if [is_elf_format] {
run_dump_test "mixed-micromips"
run_dump_test "mixed-mips16-micromips"
run_dump_test "mips16-undecoded"
+ run_dump_test "mips16e2-undecoded"
run_dump_test "mips16-pcrel"
run_dump_test "mips16-extend-noinsn"
run_dump_test "mips16-extend-insn"
+ run_dump_test "mips16e2-extend-insn"
run_dump_test "mips16-alias"
run_dump_test "mips16-noalias"
}
diff --git a/binutils/testsuite/binutils-all/mips/mips16-undecoded.d b/binutils/testsuite/binutils-all/mips/mips16-undecoded.d
index b455419..123f2c5 100644
--- a/binutils/testsuite/binutils-all/mips/mips16-undecoded.d
+++ b/binutils/testsuite/binutils-all/mips/mips16-undecoded.d
@@ -1,7 +1,7 @@
#PROG: objcopy
#objdump: -dr --prefix-addresses --show-raw-insn
#name: MIPS16 undecoded extended instruction field disassembly
-#as: -32
+#as: -32 -mips3
.*: +file format .*mips.*
diff --git a/binutils/testsuite/binutils-all/mips/mips16-undecoded.s b/binutils/testsuite/binutils-all/mips/mips16-undecoded.s
index e17c45d..8cf4c9a 100644
--- a/binutils/testsuite/binutils-all/mips/mips16-undecoded.s
+++ b/binutils/testsuite/binutils-all/mips/mips16-undecoded.s
@@ -1,5 +1,4 @@
.text
- .module mips3
.set mips16
.globl foo
.ent foo
diff --git a/binutils/testsuite/binutils-all/mips/mips16e2-extend-insn.d b/binutils/testsuite/binutils-all/mips/mips16e2-extend-insn.d
new file mode 100644
index 0000000..fbdddbb
--- /dev/null
+++ b/binutils/testsuite/binutils-all/mips/mips16e2-extend-insn.d
@@ -0,0 +1,355 @@
+#PROG: objcopy
+#objdump: -d --prefix-addresses --show-raw-insn
+#name: MIPS16e2 extensible and non-extensible instruction disassembly
+#as: -32 -mips64r2 -mmips16e2
+#source: mips16-extend-insn.s
+
+# Verify interpreted and separate respectively EXTEND prefix disassembly
+# for extensible and non-extensible instructions.
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> f123 0000 addiu s0,sp,6432
+[0-9a-f]+ <[^>]*> f123 0020 addiu s0,gp,6432
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> 0040 addiu s0,sp,256
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> 0060 addiu s0,sp,384
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> 0080 addiu s0,sp,512
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> 00a0 addiu s0,sp,640
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> 00c0 addiu s0,sp,768
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> 00e0 addiu s0,sp,896
+[0-9a-f]+ <[^>]*> f123 0800 la s0,00001940 <foo\+0x1940>
+[0-9a-f]+ <[^>]*> f123 0820 la s0,00001944 <foo\+0x1944>
+[0-9a-f]+ <[^>]*> f123 0840 la s0,00001948 <foo\+0x1948>
+[0-9a-f]+ <[^>]*> f123 0860 la s0,0000194c <foo\+0x194c>
+[0-9a-f]+ <[^>]*> f123 0880 la s0,00001950 <foo\+0x1950>
+[0-9a-f]+ <[^>]*> f123 08a0 la s0,00001954 <foo\+0x1954>
+[0-9a-f]+ <[^>]*> f123 08c0 la s0,00001958 <foo\+0x1958>
+[0-9a-f]+ <[^>]*> f123 08e0 la s0,0000195c <foo\+0x195c>
+[0-9a-f]+ <[^>]*> f123 1000 b 00003284 <foo\+0x3284>
+[0-9a-f]+ <[^>]*> f123 1020 b 00003288 <foo\+0x3288>
+[0-9a-f]+ <[^>]*> f123 1040 b 0000328c <foo\+0x328c>
+[0-9a-f]+ <[^>]*> f123 1060 b 00003290 <foo\+0x3290>
+[0-9a-f]+ <[^>]*> f123 1080 b 00003294 <foo\+0x3294>
+[0-9a-f]+ <[^>]*> f123 10a0 b 00003298 <foo\+0x3298>
+[0-9a-f]+ <[^>]*> f123 10c0 b 0000329c <foo\+0x329c>
+[0-9a-f]+ <[^>]*> f123 10e0 b 000032a0 <foo\+0x32a0>
+[0-9a-f]+ <[^>]*> f123 2000 beqz s0,000032a4 <foo\+0x32a4>
+[0-9a-f]+ <[^>]*> f123 2020 beqz s0,000032a8 <foo\+0x32a8>
+[0-9a-f]+ <[^>]*> f123 2040 beqz s0,000032ac <foo\+0x32ac>
+[0-9a-f]+ <[^>]*> f123 2060 beqz s0,000032b0 <foo\+0x32b0>
+[0-9a-f]+ <[^>]*> f123 2080 beqz s0,000032b4 <foo\+0x32b4>
+[0-9a-f]+ <[^>]*> f123 20a0 beqz s0,000032b8 <foo\+0x32b8>
+[0-9a-f]+ <[^>]*> f123 20c0 beqz s0,000032bc <foo\+0x32bc>
+[0-9a-f]+ <[^>]*> f123 20e0 beqz s0,000032c0 <foo\+0x32c0>
+[0-9a-f]+ <[^>]*> f123 2800 bnez s0,000032c4 <foo\+0x32c4>
+[0-9a-f]+ <[^>]*> f123 2820 bnez s0,000032c8 <foo\+0x32c8>
+[0-9a-f]+ <[^>]*> f123 2840 bnez s0,000032cc <foo\+0x32cc>
+[0-9a-f]+ <[^>]*> f123 2860 bnez s0,000032d0 <foo\+0x32d0>
+[0-9a-f]+ <[^>]*> f123 2880 bnez s0,000032d4 <foo\+0x32d4>
+[0-9a-f]+ <[^>]*> f123 28a0 bnez s0,000032d8 <foo\+0x32d8>
+[0-9a-f]+ <[^>]*> f123 28c0 bnez s0,000032dc <foo\+0x32dc>
+[0-9a-f]+ <[^>]*> f123 28e0 bnez s0,000032e0 <foo\+0x32e0>
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> 3000 sll s0,8
+[0-9a-f]+ <[^>]*> f123 3004 ins s0,s0,0x4,0x0
+[0-9a-f]+ <[^>]*> f123 3008 ext s0,s0,0x4,0x4
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> 300c sll s0,3
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> 3010 sll s0,4
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> 3014 sll s0,5
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> 3018 sll s0,6
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> 301c sll s0,7
+[0-9a-f]+ <[^>]*> f123 3001 dsll s0,36
+[0-9a-f]+ <[^>]*> f123 3005 dsll s0,36
+[0-9a-f]+ <[^>]*> f123 3009 dsll s0,36
+[0-9a-f]+ <[^>]*> f123 300d dsll s0,36
+[0-9a-f]+ <[^>]*> f123 3011 dsll s0,36
+[0-9a-f]+ <[^>]*> f123 3015 dsll s0,36
+[0-9a-f]+ <[^>]*> f123 3019 dsll s0,36
+[0-9a-f]+ <[^>]*> f123 301d dsll s0,36
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> 3002 srl s0,8
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> 3006 srl s0,1
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> 300a srl s0,2
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> 300e srl s0,3
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> 3012 srl s0,4
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> 3016 srl s0,5
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> 301a srl s0,6
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> 301e srl s0,7
+[0-9a-f]+ <[^>]*> f123 3003 sra s0,4
+[0-9a-f]+ <[^>]*> f123 3007 sra s0,4
+[0-9a-f]+ <[^>]*> f123 300b sra s0,4
+[0-9a-f]+ <[^>]*> f123 300f sra s0,4
+[0-9a-f]+ <[^>]*> f123 3013 sra s0,4
+[0-9a-f]+ <[^>]*> f123 3017 sra s0,4
+[0-9a-f]+ <[^>]*> f123 301b sra s0,4
+[0-9a-f]+ <[^>]*> f123 301f sra s0,4
+[0-9a-f]+ <[^>]*> f123 3800 ld s0,6432\(s0\)
+[0-9a-f]+ <[^>]*> f123 4000 addiu s0,s0,6432
+[0-9a-f]+ <[^>]*> f123 4010 daddiu s0,s0,6432
+[0-9a-f]+ <[^>]*> f123 4800 addiu s0,6432
+[0-9a-f]+ <[^>]*> f123 4820 addiu s0,6432
+[0-9a-f]+ <[^>]*> f123 4840 addiu s0,6432
+[0-9a-f]+ <[^>]*> f123 4860 addiu s0,6432
+[0-9a-f]+ <[^>]*> f123 4880 addiu s0,6432
+[0-9a-f]+ <[^>]*> f123 48a0 addiu s0,6432
+[0-9a-f]+ <[^>]*> f123 48c0 addiu s0,6432
+[0-9a-f]+ <[^>]*> f123 48e0 addiu s0,6432
+[0-9a-f]+ <[^>]*> f123 5000 slti s0,6432
+[0-9a-f]+ <[^>]*> f123 5020 slti s0,6432
+[0-9a-f]+ <[^>]*> f123 5040 slti s0,6432
+[0-9a-f]+ <[^>]*> f123 5060 slti s0,6432
+[0-9a-f]+ <[^>]*> f123 5080 slti s0,6432
+[0-9a-f]+ <[^>]*> f123 50a0 slti s0,6432
+[0-9a-f]+ <[^>]*> f123 50c0 slti s0,6432
+[0-9a-f]+ <[^>]*> f123 50e0 slti s0,6432
+[0-9a-f]+ <[^>]*> f123 5800 sltiu s0,6432
+[0-9a-f]+ <[^>]*> f123 5820 sltiu s0,6432
+[0-9a-f]+ <[^>]*> f123 5840 sltiu s0,6432
+[0-9a-f]+ <[^>]*> f123 5860 sltiu s0,6432
+[0-9a-f]+ <[^>]*> f123 5880 sltiu s0,6432
+[0-9a-f]+ <[^>]*> f123 58a0 sltiu s0,6432
+[0-9a-f]+ <[^>]*> f123 58c0 sltiu s0,6432
+[0-9a-f]+ <[^>]*> f123 58e0 sltiu s0,6432
+[0-9a-f]+ <[^>]*> f123 6000 bteqz 000033d0 <foo\+0x33d0>
+[0-9a-f]+ <[^>]*> f123 6020 bteqz 000033d4 <foo\+0x33d4>
+[0-9a-f]+ <[^>]*> f123 6040 bteqz 000033d8 <foo\+0x33d8>
+[0-9a-f]+ <[^>]*> f123 6060 bteqz 000033dc <foo\+0x33dc>
+[0-9a-f]+ <[^>]*> f123 6080 bteqz 000033e0 <foo\+0x33e0>
+[0-9a-f]+ <[^>]*> f123 60a0 bteqz 000033e4 <foo\+0x33e4>
+[0-9a-f]+ <[^>]*> f123 60c0 bteqz 000033e8 <foo\+0x33e8>
+[0-9a-f]+ <[^>]*> f123 60e0 bteqz 000033ec <foo\+0x33ec>
+[0-9a-f]+ <[^>]*> f123 6100 btnez 000033f0 <foo\+0x33f0>
+[0-9a-f]+ <[^>]*> f123 6120 btnez 000033f4 <foo\+0x33f4>
+[0-9a-f]+ <[^>]*> f123 6140 btnez 000033f8 <foo\+0x33f8>
+[0-9a-f]+ <[^>]*> f123 6160 btnez 000033fc <foo\+0x33fc>
+[0-9a-f]+ <[^>]*> f123 6180 btnez 00003400 <foo\+0x3400>
+[0-9a-f]+ <[^>]*> f123 61a0 btnez 00003404 <foo\+0x3404>
+[0-9a-f]+ <[^>]*> f123 61c0 btnez 00003408 <foo\+0x3408>
+[0-9a-f]+ <[^>]*> f123 61e0 btnez 0000340c <foo\+0x340c>
+[0-9a-f]+ <[^>]*> f123 6200 sw ra,6432\(sp\)
+[0-9a-f]+ <[^>]*> f123 6220 sw ra,6432\(sp\)
+[0-9a-f]+ <[^>]*> f123 6240 sw ra,6432\(sp\)
+[0-9a-f]+ <[^>]*> f123 6280 sw ra,6432\(sp\)
+[0-9a-f]+ <[^>]*> f123 62a0 sw ra,6432\(sp\)
+[0-9a-f]+ <[^>]*> f123 62c0 sw ra,6432\(sp\)
+[0-9a-f]+ <[^>]*> f123 62e0 sw ra,6432\(sp\)
+[0-9a-f]+ <[^>]*> f123 6200 sw ra,6432\(sp\)
+[0-9a-f]+ <[^>]*> f123 6300 addiu sp,6432
+[0-9a-f]+ <[^>]*> f123 6320 addiu sp,6432
+[0-9a-f]+ <[^>]*> f123 6340 addiu sp,6432
+[0-9a-f]+ <[^>]*> f123 6360 addiu sp,6432
+[0-9a-f]+ <[^>]*> f123 6380 addiu sp,6432
+[0-9a-f]+ <[^>]*> f123 63a0 addiu sp,6432
+[0-9a-f]+ <[^>]*> f123 63c0 addiu sp,6432
+[0-9a-f]+ <[^>]*> f123 63e0 addiu sp,6432
+[0-9a-f]+ <[^>]*> f123 6400 restore 256,s2,a1-a3
+[0-9a-f]+ <[^>]*> f123 6480 save 256,s2,a1-a3
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> 6500 nop
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> 6501 move zero,s1
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> 6700 move s0,zero
+[0-9a-f]+ <[^>]*> f123 6800 li s0,6432
+[0-9a-f]+ <[^>]*> f123 6820 lui s0,0x1920
+[0-9a-f]+ <[^>]*> f123 6840 ori s0,0x1920
+[0-9a-f]+ <[^>]*> f123 6860 andi s0,0x1920
+[0-9a-f]+ <[^>]*> f123 6880 xori s0,0x1920
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> 68a0 li s0,160
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> 68c0 li s0,192
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> 68e0 li s0,224
+[0-9a-f]+ <[^>]*> f123 7000 cmpi s0,6432
+[0-9a-f]+ <[^>]*> f123 7020 cmpi s0,6432
+[0-9a-f]+ <[^>]*> f123 7040 cmpi s0,6432
+[0-9a-f]+ <[^>]*> f123 7060 cmpi s0,6432
+[0-9a-f]+ <[^>]*> f123 7080 cmpi s0,6432
+[0-9a-f]+ <[^>]*> f123 70a0 cmpi s0,6432
+[0-9a-f]+ <[^>]*> f123 70c0 cmpi s0,6432
+[0-9a-f]+ <[^>]*> f123 70e0 cmpi s0,6432
+[0-9a-f]+ <[^>]*> f123 7800 sd s0,6432\(s0\)
+[0-9a-f]+ <[^>]*> f123 8000 lb s0,6432\(s0\)
+[0-9a-f]+ <[^>]*> f123 8800 lh s0,6432\(s0\)
+[0-9a-f]+ <[^>]*> f123 9000 lw s0,6432\(sp\)
+[0-9a-f]+ <[^>]*> f123 9020 lw s0,6432\(gp\)
+[0-9a-f]+ <[^>]*> f123 9040 lh s0,6432\(gp\)
+[0-9a-f]+ <[^>]*> f123 9060 lb s0,6432\(gp\)
+[0-9a-f]+ <[^>]*> f123 9080 lhu s0,6432\(gp\)
+[0-9a-f]+ <[^>]*> f123 90a0 lbu s0,6432\(gp\)
+[0-9a-f]+ <[^>]*> f123 90c0 ll s0,-224\(v1\)
+[0-9a-f]+ <[^>]*> f123 90e0 lwl s0,-224\(v1\)
+[0-9a-f]+ <[^>]*> f123 9800 lw s0,6432\(s0\)
+[0-9a-f]+ <[^>]*> f123 a000 lbu s0,6432\(s0\)
+[0-9a-f]+ <[^>]*> f123 a800 lhu s0,6432\(s0\)
+[0-9a-f]+ <[^>]*> f123 b000 lw s0,00001bb8 <foo\+0x1bb8>
+[0-9a-f]+ <[^>]*> f123 b020 lw s0,00001bbc <foo\+0x1bbc>
+[0-9a-f]+ <[^>]*> f123 b040 lw s0,00001bc0 <foo\+0x1bc0>
+[0-9a-f]+ <[^>]*> f123 b060 lw s0,00001bc4 <foo\+0x1bc4>
+[0-9a-f]+ <[^>]*> f123 b080 lw s0,00001bc8 <foo\+0x1bc8>
+[0-9a-f]+ <[^>]*> f123 b0a0 lw s0,00001bcc <foo\+0x1bcc>
+[0-9a-f]+ <[^>]*> f123 b0c0 lw s0,00001bd0 <foo\+0x1bd0>
+[0-9a-f]+ <[^>]*> f123 b0e0 lw s0,00001bd4 <foo\+0x1bd4>
+[0-9a-f]+ <[^>]*> f123 b800 lwu s0,6432\(s0\)
+[0-9a-f]+ <[^>]*> f123 c000 sb s0,6432\(s0\)
+[0-9a-f]+ <[^>]*> f123 c800 sh s0,6432\(s0\)
+[0-9a-f]+ <[^>]*> f123 d000 sw s0,6432\(sp\)
+[0-9a-f]+ <[^>]*> f123 d020 sw s0,6432\(gp\)
+[0-9a-f]+ <[^>]*> f123 d040 sh s0,6432\(gp\)
+[0-9a-f]+ <[^>]*> f123 d060 sb s0,6432\(gp\)
+[0-9a-f]+ <[^>]*> f123 d080 pref 0x3,-224\(s0\)
+[0-9a-f]+ <[^>]*> f123 d0a0 cache 0x3,-224\(s0\)
+[0-9a-f]+ <[^>]*> f123 d0c0 sc s0,-224\(v1\)
+[0-9a-f]+ <[^>]*> f123 d0e0 swl s0,-224\(v1\)
+[0-9a-f]+ <[^>]*> f123 d800 sw s0,6432\(s0\)
+[0-9a-f]+ <[^>]*> f123 e000 asmacro 0x1,0x0,0x0,0x0,0x3,0x1
+[0-9a-f]+ <[^>]*> f123 e001 asmacro 0x1,0x1,0x0,0x0,0x3,0x1
+[0-9a-f]+ <[^>]*> f123 e002 asmacro 0x1,0x2,0x0,0x0,0x3,0x1
+[0-9a-f]+ <[^>]*> f123 e003 asmacro 0x1,0x3,0x0,0x0,0x3,0x1
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> e800 jr s0
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> e820 jr ra
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> e840 jalr s0
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> e880 jrc s0
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> e8a0 jrc ra
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> e8c0 jalrc s0
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> e801 sdbbp
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> e802 slt s0,s0
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> e803 sltu s0,s0
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> e804 sllv s0,s0
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> e805 break
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> e806 srlv s0,s0
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> e807 srav s0,s0
+[0-9a-f]+ <[^>]*> f123 e808 dsrl s0,36
+[0-9a-f]+ <[^>]*> f123 e908 dsrl s0,36
+[0-9a-f]+ <[^>]*> f123 ea08 dsrl s0,36
+[0-9a-f]+ <[^>]*> f123 eb08 dsrl s0,36
+[0-9a-f]+ <[^>]*> f123 ec08 dsrl s0,36
+[0-9a-f]+ <[^>]*> f123 ed08 dsrl s0,36
+[0-9a-f]+ <[^>]*> f123 ee08 dsrl s0,36
+[0-9a-f]+ <[^>]*> f123 ef08 dsrl s0,36
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> e809 entry
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> e829 entry ra
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> ed09 exit \$f0
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> ee09 exit \$f0-\$f1
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> ef09 exit
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> e80a cmp s0,s0
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> e80b neg s0
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> e80c and s0,s0
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> e80d or s0,s0
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> e80e xor s0,s0
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> e80f not s0
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> e810 mfhi s0
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> e811 zeb s0
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> e831 zeh s0
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> e851 zew s0
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> e891 seb s0
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> e8b1 seh s0
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> e8d1 sew s0
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> e812 mflo s0
+[0-9a-f]+ <[^>]*> f123 e813 dsra s0,36
+[0-9a-f]+ <[^>]*> f123 e913 dsra s0,36
+[0-9a-f]+ <[^>]*> f123 ea13 dsra s0,36
+[0-9a-f]+ <[^>]*> f123 eb13 dsra s0,36
+[0-9a-f]+ <[^>]*> f123 ec13 dsra s0,36
+[0-9a-f]+ <[^>]*> f123 ed13 dsra s0,36
+[0-9a-f]+ <[^>]*> f123 ee13 dsra s0,36
+[0-9a-f]+ <[^>]*> f123 ef13 dsra s0,36
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> e814 dsllv s0,s0
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> e816 dsrlv s0,s0
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> e817 dsrav s0,s0
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> e818 mult s0,s0
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> e819 multu s0,s0
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> e81a div zero,s0,s0
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> e81b divu zero,s0,s0
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> e81c dmult s0,s0
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> e81d dmultu s0,s0
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> e81e ddiv zero,s0,s0
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> e81f ddivu zero,s0,s0
+[0-9a-f]+ <[^>]*> f123 extend 0x123
+[0-9a-f]+ <[^>]*> f000 extend 0x0
+[0-9a-f]+ <[^>]*> f123 f800 ld s0,6432\(sp\)
+[0-9a-f]+ <[^>]*> f123 f900 sd s0,6432\(sp\)
+[0-9a-f]+ <[^>]*> f123 fa00 sd ra,6432\(sp\)
+[0-9a-f]+ <[^>]*> f123 fa20 sd ra,6432\(sp\)
+[0-9a-f]+ <[^>]*> f123 fa40 sd ra,6432\(sp\)
+[0-9a-f]+ <[^>]*> f123 fa60 sd ra,6432\(sp\)
+[0-9a-f]+ <[^>]*> f123 fa80 sd ra,6432\(sp\)
+[0-9a-f]+ <[^>]*> f123 faa0 sd ra,6432\(sp\)
+[0-9a-f]+ <[^>]*> f123 fac0 sd ra,6432\(sp\)
+[0-9a-f]+ <[^>]*> f123 fae0 sd ra,6432\(sp\)
+[0-9a-f]+ <[^>]*> f123 fb00 daddiu sp,6432
+[0-9a-f]+ <[^>]*> f123 fb20 daddiu sp,6432
+[0-9a-f]+ <[^>]*> f123 fb40 daddiu sp,6432
+[0-9a-f]+ <[^>]*> f123 fb60 daddiu sp,6432
+[0-9a-f]+ <[^>]*> f123 fb80 daddiu sp,6432
+[0-9a-f]+ <[^>]*> f123 fba0 daddiu sp,6432
+[0-9a-f]+ <[^>]*> f123 fbc0 daddiu sp,6432
+[0-9a-f]+ <[^>]*> f123 fbe0 daddiu sp,6432
+[0-9a-f]+ <[^>]*> f123 fc00 ld s0,00001d50 <foo\+0x1d50>
+[0-9a-f]+ <[^>]*> f123 fd00 daddiu s0,6432
+[0-9a-f]+ <[^>]*> f123 fe00 dla s0,00001d58 <foo\+0x1d58>
+[0-9a-f]+ <[^>]*> f123 ff00 daddiu s0,sp,6432
+ \.\.\.
diff --git a/binutils/testsuite/binutils-all/mips/mips16e2-undecoded.d b/binutils/testsuite/binutils-all/mips/mips16e2-undecoded.d
new file mode 100644
index 0000000..2e9601f
--- /dev/null
+++ b/binutils/testsuite/binutils-all/mips/mips16e2-undecoded.d
@@ -0,0 +1,189 @@
+#PROG: objcopy
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16e2 undecoded extended instruction field disassembly
+#as: -32 -mips64r2 -mmips16e2
+#source: mips16-undecoded.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> f008 0211 addiu v0,sp,16401
+[0-9a-f]+ <[^>]*> f008 0211 addiu v0,sp,16401
+[0-9a-f]+ <[^>]*> f008 0231 addiu v0,gp,16401
+[0-9a-f]+ <[^>]*> f008 extend 0x8
+[0-9a-f]+ <[^>]*> 0251 addiu v0,sp,324
+[0-9a-f]+ <[^>]*> f008 extend 0x8
+[0-9a-f]+ <[^>]*> 0291 addiu v0,sp,580
+[0-9a-f]+ <[^>]*> f008 0a11 la v0,00004025 <foo\+0x4025>
+[0-9a-f]+ <[^>]*> f008 0a11 la v0,00004029 <foo\+0x4029>
+[0-9a-f]+ <[^>]*> f008 0a31 la v0,0000402d <foo\+0x402d>
+[0-9a-f]+ <[^>]*> f008 0a51 la v0,00004031 <foo\+0x4031>
+[0-9a-f]+ <[^>]*> f008 0a91 la v0,00004035 <foo\+0x4035>
+[0-9a-f]+ <[^>]*> f008 1011 b 0000804e <foo\+0x804e>
+[0-9a-f]+ <[^>]*> f008 1011 b 00008052 <foo\+0x8052>
+[0-9a-f]+ <[^>]*> f008 1031 b 00008056 <foo\+0x8056>
+[0-9a-f]+ <[^>]*> f008 1051 b 0000805a <foo\+0x805a>
+[0-9a-f]+ <[^>]*> f008 1091 b 0000805e <foo\+0x805e>
+[0-9a-f]+ <[^>]*> f008 1111 b 00008062 <foo\+0x8062>
+[0-9a-f]+ <[^>]*> f008 1211 b 00008066 <foo\+0x8066>
+[0-9a-f]+ <[^>]*> f008 1411 b 0000806a <foo\+0x806a>
+[0-9a-f]+ <[^>]*> f008 2211 beqz v0,0000806e <foo\+0x806e>
+[0-9a-f]+ <[^>]*> f008 2211 beqz v0,00008072 <foo\+0x8072>
+[0-9a-f]+ <[^>]*> f008 2231 beqz v0,00008076 <foo\+0x8076>
+[0-9a-f]+ <[^>]*> f008 2251 beqz v0,0000807a <foo\+0x807a>
+[0-9a-f]+ <[^>]*> f008 2291 beqz v0,0000807e <foo\+0x807e>
+[0-9a-f]+ <[^>]*> f008 2a11 bnez v0,00008082 <foo\+0x8082>
+[0-9a-f]+ <[^>]*> f008 2a11 bnez v0,00008086 <foo\+0x8086>
+[0-9a-f]+ <[^>]*> f008 2a31 bnez v0,0000808a <foo\+0x808a>
+[0-9a-f]+ <[^>]*> f008 2a51 bnez v0,0000808e <foo\+0x808e>
+[0-9a-f]+ <[^>]*> f008 2a91 bnez v0,00008092 <foo\+0x8092>
+[0-9a-f]+ <[^>]*> f008 4a11 addiu v0,16401
+[0-9a-f]+ <[^>]*> f008 4a11 addiu v0,16401
+[0-9a-f]+ <[^>]*> f008 4a31 addiu v0,16401
+[0-9a-f]+ <[^>]*> f008 4a51 addiu v0,16401
+[0-9a-f]+ <[^>]*> f008 4a91 addiu v0,16401
+[0-9a-f]+ <[^>]*> f008 5211 slti v0,16401
+[0-9a-f]+ <[^>]*> f008 5211 slti v0,16401
+[0-9a-f]+ <[^>]*> f008 5231 slti v0,16401
+[0-9a-f]+ <[^>]*> f008 5251 slti v0,16401
+[0-9a-f]+ <[^>]*> f008 5291 slti v0,16401
+[0-9a-f]+ <[^>]*> f008 5a11 sltiu v0,16401
+[0-9a-f]+ <[^>]*> f008 5a11 sltiu v0,16401
+[0-9a-f]+ <[^>]*> f008 5a31 sltiu v0,16401
+[0-9a-f]+ <[^>]*> f008 5a51 sltiu v0,16401
+[0-9a-f]+ <[^>]*> f008 5a91 sltiu v0,16401
+[0-9a-f]+ <[^>]*> f008 6a11 li v0,16401
+[0-9a-f]+ <[^>]*> f008 6a11 li v0,16401
+[0-9a-f]+ <[^>]*> f008 6a31 lui v0,0x4011
+[0-9a-f]+ <[^>]*> f008 6a51 ori v0,0x4011
+[0-9a-f]+ <[^>]*> f008 6a91 xori v0,0x4011
+[0-9a-f]+ <[^>]*> f008 7211 cmpi v0,16401
+[0-9a-f]+ <[^>]*> f008 7211 cmpi v0,16401
+[0-9a-f]+ <[^>]*> f008 7231 cmpi v0,16401
+[0-9a-f]+ <[^>]*> f008 7251 cmpi v0,16401
+[0-9a-f]+ <[^>]*> f008 7291 cmpi v0,16401
+[0-9a-f]+ <[^>]*> f008 9211 lw v0,16401\(sp\)
+[0-9a-f]+ <[^>]*> f008 9211 lw v0,16401\(sp\)
+[0-9a-f]+ <[^>]*> f008 9231 lw v0,16401\(gp\)
+[0-9a-f]+ <[^>]*> f008 9251 lh v0,16401\(gp\)
+[0-9a-f]+ <[^>]*> f008 9291 lhu v0,16401\(gp\)
+[0-9a-f]+ <[^>]*> f008 b211 lw v0,000040f9 <foo\+0x40f9>
+[0-9a-f]+ <[^>]*> f008 b211 lw v0,000040fd <foo\+0x40fd>
+[0-9a-f]+ <[^>]*> f008 b231 lw v0,00004101 <foo\+0x4101>
+[0-9a-f]+ <[^>]*> f008 b251 lw v0,00004105 <foo\+0x4105>
+[0-9a-f]+ <[^>]*> f008 b291 lw v0,00004109 <foo\+0x4109>
+[0-9a-f]+ <[^>]*> f008 d211 sw v0,16401\(sp\)
+[0-9a-f]+ <[^>]*> f008 d211 sw v0,16401\(sp\)
+[0-9a-f]+ <[^>]*> f008 d231 sw v0,16401\(gp\)
+[0-9a-f]+ <[^>]*> f008 d251 sh v0,16401\(gp\)
+[0-9a-f]+ <[^>]*> f008 d291 pref 0x8,17\(v0\)
+[0-9a-f]+ <[^>]*> f008 6011 bteqz 00008136 <foo\+0x8136>
+[0-9a-f]+ <[^>]*> f008 6011 bteqz 0000813a <foo\+0x813a>
+[0-9a-f]+ <[^>]*> f008 6031 bteqz 0000813e <foo\+0x813e>
+[0-9a-f]+ <[^>]*> f008 6051 bteqz 00008142 <foo\+0x8142>
+[0-9a-f]+ <[^>]*> f008 6091 bteqz 00008146 <foo\+0x8146>
+[0-9a-f]+ <[^>]*> f008 6111 btnez 0000814a <foo\+0x814a>
+[0-9a-f]+ <[^>]*> f008 6111 btnez 0000814e <foo\+0x814e>
+[0-9a-f]+ <[^>]*> f008 6131 btnez 00008152 <foo\+0x8152>
+[0-9a-f]+ <[^>]*> f008 6151 btnez 00008156 <foo\+0x8156>
+[0-9a-f]+ <[^>]*> f008 6191 btnez 0000815a <foo\+0x815a>
+[0-9a-f]+ <[^>]*> f008 6211 sw ra,16401\(sp\)
+[0-9a-f]+ <[^>]*> f008 6211 sw ra,16401\(sp\)
+[0-9a-f]+ <[^>]*> f008 6231 sw ra,16401\(sp\)
+[0-9a-f]+ <[^>]*> f008 6251 sw ra,16401\(sp\)
+[0-9a-f]+ <[^>]*> f008 6291 sw ra,16401\(sp\)
+[0-9a-f]+ <[^>]*> f008 6311 addiu sp,16401
+[0-9a-f]+ <[^>]*> f008 6311 addiu sp,16401
+[0-9a-f]+ <[^>]*> f008 6331 addiu sp,16401
+[0-9a-f]+ <[^>]*> f008 6351 addiu sp,16401
+[0-9a-f]+ <[^>]*> f008 6391 addiu sp,16401
+[0-9a-f]+ <[^>]*> f500 3260 sll v0,v1,20
+[0-9a-f]+ <[^>]*> f500 3260 sll v0,v1,20
+[0-9a-f]+ <[^>]*> f500 extend 0x500
+[0-9a-f]+ <[^>]*> 3264 sll v0,v1,1
+[0-9a-f]+ <[^>]*> f500 extend 0x500
+[0-9a-f]+ <[^>]*> 3268 sll v0,v1,2
+[0-9a-f]+ <[^>]*> f500 extend 0x500
+[0-9a-f]+ <[^>]*> 3270 sll v0,v1,4
+[0-9a-f]+ <[^>]*> f501 extend 0x501
+[0-9a-f]+ <[^>]*> 3260 sll v0,v1,8
+[0-9a-f]+ <[^>]*> f502 extend 0x502
+[0-9a-f]+ <[^>]*> 3260 sll v0,v1,8
+[0-9a-f]+ <[^>]*> f504 extend 0x504
+[0-9a-f]+ <[^>]*> 3260 sll v0,v1,8
+[0-9a-f]+ <[^>]*> f508 extend 0x508
+[0-9a-f]+ <[^>]*> 3260 sll v0,v1,8
+[0-9a-f]+ <[^>]*> f510 extend 0x510
+[0-9a-f]+ <[^>]*> 3260 sll v0,v1,8
+[0-9a-f]+ <[^>]*> f520 extend 0x520
+[0-9a-f]+ <[^>]*> 3260 sll v0,v1,8
+[0-9a-f]+ <[^>]*> f500 3261 dsll v0,v1,20
+[0-9a-f]+ <[^>]*> f500 3261 dsll v0,v1,20
+[0-9a-f]+ <[^>]*> f500 3265 dsll v0,v1,20
+[0-9a-f]+ <[^>]*> f500 3269 dsll v0,v1,20
+[0-9a-f]+ <[^>]*> f500 3271 dsll v0,v1,20
+[0-9a-f]+ <[^>]*> f501 3261 dsll v0,v1,20
+[0-9a-f]+ <[^>]*> f502 3261 dsll v0,v1,20
+[0-9a-f]+ <[^>]*> f504 3261 dsll v0,v1,20
+[0-9a-f]+ <[^>]*> f508 3261 dsll v0,v1,20
+[0-9a-f]+ <[^>]*> f510 3261 dsll v0,v1,20
+[0-9a-f]+ <[^>]*> f520 3261 dsll v0,v1,52
+[0-9a-f]+ <[^>]*> f500 3262 srl v0,v1,20
+[0-9a-f]+ <[^>]*> f500 3262 srl v0,v1,20
+[0-9a-f]+ <[^>]*> f500 extend 0x500
+[0-9a-f]+ <[^>]*> 3266 srl v0,v1,1
+[0-9a-f]+ <[^>]*> f500 extend 0x500
+[0-9a-f]+ <[^>]*> 326a srl v0,v1,2
+[0-9a-f]+ <[^>]*> f500 extend 0x500
+[0-9a-f]+ <[^>]*> 3272 srl v0,v1,4
+[0-9a-f]+ <[^>]*> f501 extend 0x501
+[0-9a-f]+ <[^>]*> 3262 srl v0,v1,8
+[0-9a-f]+ <[^>]*> f502 extend 0x502
+[0-9a-f]+ <[^>]*> 3262 srl v0,v1,8
+[0-9a-f]+ <[^>]*> f504 extend 0x504
+[0-9a-f]+ <[^>]*> 3262 srl v0,v1,8
+[0-9a-f]+ <[^>]*> f508 extend 0x508
+[0-9a-f]+ <[^>]*> 3262 srl v0,v1,8
+[0-9a-f]+ <[^>]*> f510 extend 0x510
+[0-9a-f]+ <[^>]*> 3262 srl v0,v1,8
+[0-9a-f]+ <[^>]*> f520 extend 0x520
+[0-9a-f]+ <[^>]*> 3262 srl v0,v1,8
+[0-9a-f]+ <[^>]*> f500 3263 sra v0,v1,20
+[0-9a-f]+ <[^>]*> f500 3263 sra v0,v1,20
+[0-9a-f]+ <[^>]*> f500 3267 sra v0,v1,20
+[0-9a-f]+ <[^>]*> f500 326b sra v0,v1,20
+[0-9a-f]+ <[^>]*> f500 3273 sra v0,v1,20
+[0-9a-f]+ <[^>]*> f501 3263 sra v0,v1,20
+[0-9a-f]+ <[^>]*> f502 3263 sra v0,v1,20
+[0-9a-f]+ <[^>]*> f504 3263 sra v0,v1,20
+[0-9a-f]+ <[^>]*> f508 3263 sra v0,v1,20
+[0-9a-f]+ <[^>]*> f510 3263 sra v0,v1,20
+[0-9a-f]+ <[^>]*> f520 3263 sra v0,v1,20
+[0-9a-f]+ <[^>]*> f500 e848 dsrl v0,20
+[0-9a-f]+ <[^>]*> f500 e848 dsrl v0,20
+[0-9a-f]+ <[^>]*> f500 e948 dsrl v0,20
+[0-9a-f]+ <[^>]*> f500 ea48 dsrl v0,20
+[0-9a-f]+ <[^>]*> f500 ec48 dsrl v0,20
+[0-9a-f]+ <[^>]*> f501 e848 dsrl v0,20
+[0-9a-f]+ <[^>]*> f502 e848 dsrl v0,20
+[0-9a-f]+ <[^>]*> f504 e848 dsrl v0,20
+[0-9a-f]+ <[^>]*> f508 e848 dsrl v0,20
+[0-9a-f]+ <[^>]*> f510 e848 dsrl v0,20
+[0-9a-f]+ <[^>]*> f520 e848 dsrl v0,52
+[0-9a-f]+ <[^>]*> f500 e853 dsra v0,20
+[0-9a-f]+ <[^>]*> f500 e853 dsra v0,20
+[0-9a-f]+ <[^>]*> f500 e953 dsra v0,20
+[0-9a-f]+ <[^>]*> f500 ea53 dsra v0,20
+[0-9a-f]+ <[^>]*> f500 ec53 dsra v0,20
+[0-9a-f]+ <[^>]*> f501 e853 dsra v0,20
+[0-9a-f]+ <[^>]*> f502 e853 dsra v0,20
+[0-9a-f]+ <[^>]*> f504 e853 dsra v0,20
+[0-9a-f]+ <[^>]*> f508 e853 dsra v0,20
+[0-9a-f]+ <[^>]*> f510 e853 dsra v0,20
+[0-9a-f]+ <[^>]*> f520 e853 dsra v0,52
+[0-9a-f]+ <[^>]*> f008 fb11 daddiu sp,16401
+[0-9a-f]+ <[^>]*> f008 fb11 daddiu sp,16401
+[0-9a-f]+ <[^>]*> f008 fb31 daddiu sp,16401
+[0-9a-f]+ <[^>]*> f008 fb51 daddiu sp,16401
+[0-9a-f]+ <[^>]*> f008 fb91 daddiu sp,16401
+ \.\.\.
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 004c5f8..6cdca28 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,40 @@
2017-05-15 Maciej W. Rozycki <macro@imgtec.com>
+ * testsuite/gas/mips/mips16e2.d: New test.
+ * testsuite/gas/mips/mips16e2-mt.d: New test.
+ * testsuite/gas/mips/mips16e2-sub.d: New test.
+ * testsuite/gas/mips/mips16e2@mips16e2-sub.d: New test.
+ * testsuite/gas/mips/mips16e2-mt-sub.d: New test.
+ * testsuite/gas/mips/mips16e2@mips16e2-mt-sub.d: New test.
+ * testsuite/gas/mips/mips16e2-hilo.d: New test.
+ * testsuite/gas/mips/mips16e2-hilo-n32.d: New test.
+ * testsuite/gas/mips/mips16e2-reloc-error.d: New test.
+ * testsuite/gas/mips/mips16e2-imm-error.d: New test.
+ * testsuite/gas/mips/elf_ase_mips16e2.d: New test.
+ * testsuite/gas/mips/elf_ase_mips16e2-2.d: New test.
+ * testsuite/gas/mips/elf-rel9-mips16e2.d: New test.
+ * testsuite/gas/mips/mips16e2-lui.d: New test.
+ * testsuite/gas/mips/mips16e2@mips32r2-sync.d: New test.
+ * testsuite/gas/mips/mips16e2@mips32r2-sync-1.d: New test.
+ * testsuite/gas/mips/mips16e2@lui-2.d: New test.
+ * testsuite/gas/mips/mips16e2-reloc-error.l: New stderr output.
+ * testsuite/gas/mips/mips16e2-imm-error.l: New stderr output.
+ * testsuite/gas/mips/mips16e2@lui-2.l: New stderr output.
+ * testsuite/gas/mips/mips16e2.s: New test source.
+ * testsuite/gas/mips/mips16e2-mt.s: New test source.
+ * testsuite/gas/mips/mips16e2-sub.s: New test source.
+ * testsuite/gas/mips/mips16e2-mt-sub.s: New test source.
+ * testsuite/gas/mips/mips16e2-hilo.s: New test source.
+ * testsuite/gas/mips/mips16e2-reloc-error.s: New test source.
+ * testsuite/gas/mips/mips16e2-imm-error.s: New test source.
+ * testsuite/gas/mips/elf-rel9-mips16e2.s: New test source.
+ * testsuite/gas/mips/mips16e2-lui.s: New test source.
+ * testsuite/gas/mips/mips.exp: Expand `mips32r2-sync',
+ `mips32r2-sync-1', `lui-1' and `lui-2' tests across MIPS16e2
+ architectures. Run the new tests.
+
+2017-05-15 Maciej W. Rozycki <macro@imgtec.com>
+
* testsuite/gas/mips/mips.exp (run_dump_test_arch): Add
`mips16e2@' prefix.
(run_list_test_arch): Likewise.
diff --git a/gas/testsuite/gas/mips/elf-rel9-mips16e2.d b/gas/testsuite/gas/mips/elf-rel9-mips16e2.d
new file mode 100644
index 0000000..d27343f
--- /dev/null
+++ b/gas/testsuite/gas/mips/elf-rel9-mips16e2.d
@@ -0,0 +1,69 @@
+#as: -march=mips32r2 -mmips16e2 -mabi=32
+#objdump: -M gpr-names=numeric -dr
+#name: MIPS ELF reloc 9 (MIPS16e2 version)
+
+.*: file format .*
+
+Disassembly of section \.text:
+
+0+00 <foo>:
+[ ]*[0-9a-f]+: 659a move \$28,\$2
+[ ]*[0-9a-f]+: f000 9420 lw \$4,0\(\$28\)
+[ ]*[0-9a-f]+: R_MIPS16_GOT16 \.data
+[ ]*[0-9a-f]+: f000 4c10 addiu \$4,16
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data
+[ ]*[0-9a-f]+: f000 9420 lw \$4,0\(\$28\)
+[ ]*[0-9a-f]+: R_MIPS16_GOT16 \.data
+[ ]*[0-9a-f]+: f020 4c00 addiu \$4,32
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data
+[ ]*[0-9a-f]+: f000 9420 lw \$4,0\(\$28\)
+[ ]*[0-9a-f]+: R_MIPS16_GOT16 \.data
+[ ]*[0-9a-f]+: f7ef 4c1c addiu \$4,32764
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data
+[ ]*[0-9a-f]+: f000 9421 lw \$4,1\(\$28\)
+[ ]*[0-9a-f]+: R_MIPS16_GOT16 \.data
+[ ]*[0-9a-f]+: f010 4c00 addiu \$4,-32768
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data
+[ ]*[0-9a-f]+: f000 9421 lw \$4,1\(\$28\)
+[ ]*[0-9a-f]+: R_MIPS16_GOT16 \.data
+[ ]*[0-9a-f]+: f7ff 4c1c addiu \$4,-4
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data
+[ ]*[0-9a-f]+: f000 9421 lw \$4,1\(\$28\)
+[ ]*[0-9a-f]+: R_MIPS16_GOT16 \.data
+[ ]*[0-9a-f]+: f000 4c00 addiu \$4,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data
+[ ]*[0-9a-f]+: f000 9422 lw \$4,2\(\$28\)
+[ ]*[0-9a-f]+: R_MIPS16_GOT16 \.data
+[ ]*[0-9a-f]+: f010 4c10 addiu \$4,-32752
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data
+[ ]*[0-9a-f]+: f000 9422 lw \$4,2\(\$28\)
+[ ]*[0-9a-f]+: R_MIPS16_GOT16 \.data
+[ ]*[0-9a-f]+: f01e 4c00 addiu \$4,-4096
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data
+[ ]*[0-9a-f]+: f000 9422 lw \$4,2\(\$28\)
+[ ]*[0-9a-f]+: R_MIPS16_GOT16 \.data
+[ ]*[0-9a-f]+: f7ff 4c1f addiu \$4,-1
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data
+[ ]*[0-9a-f]+: f000 9422 lw \$4,2\(\$28\)
+[ ]*[0-9a-f]+: R_MIPS16_GOT16 \.data
+[ ]*[0-9a-f]+: f000 4c00 addiu \$4,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data
+[ ]*[0-9a-f]+: f000 9423 lw \$4,3\(\$28\)
+[ ]*[0-9a-f]+: R_MIPS16_GOT16 \.data
+[ ]*[0-9a-f]+: f342 4c05 addiu \$4,4933
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data
+[ ]*[0-9a-f]+: f000 9420 lw \$4,0\(\$28\)
+[ ]*[0-9a-f]+: R_MIPS16_GPREL \.sdata
+[ ]*[0-9a-f]+: f000 9424 lw \$4,4\(\$28\)
+[ ]*[0-9a-f]+: R_MIPS16_GPREL \.sdata
+[ ]*[0-9a-f]+: f000 9424 lw \$4,4\(\$28\)
+[ ]*[0-9a-f]+: R_MIPS16_GPREL \.sdata
+[ ]*[0-9a-f]+: f000 9428 lw \$4,8\(\$28\)
+[ ]*[0-9a-f]+: R_MIPS16_GPREL \.sdata
+[ ]*[0-9a-f]+: f000 942c lw \$4,12\(\$28\)
+[ ]*[0-9a-f]+: R_MIPS16_GPREL \.sdata
+[ ]*[0-9a-f]+: f000 9434 lw \$4,20\(\$28\)
+[ ]*[0-9a-f]+: R_MIPS16_GPREL \.sdata
+[ ]*[0-9a-f]+: f000 9438 lw \$4,24\(\$28\)
+[ ]*[0-9a-f]+: R_MIPS16_GPREL \.sdata
+ \.\.\.
diff --git a/gas/testsuite/gas/mips/elf-rel9-mips16e2.s b/gas/testsuite/gas/mips/elf-rel9-mips16e2.s
new file mode 100644
index 0000000..d2c9ce0
--- /dev/null
+++ b/gas/testsuite/gas/mips/elf-rel9-mips16e2.s
@@ -0,0 +1,62 @@
+ .set mips16
+ .ent foo
+foo:
+ move $28, $2
+ lw $4,%got(l1)($28)
+ addiu $4,%lo(l1)
+
+ lw $4,%got(l1 + 16)($28)
+ addiu $4,%lo(l1 + 16)
+
+ lw $4,%got(l1 + 0x7fec)($28)
+ addiu $4,%lo(l1 + 0x7fec)
+
+ lw $4,%got(l1 + 0x7ff0)($28)
+ addiu $4,%lo(l1 + 0x7ff0)
+
+ lw $4,%got(l1 + 0xffec)($28)
+ addiu $4,%lo(l1 + 0xffec)
+
+ lw $4,%got(l1 + 0xfff0)($28)
+ addiu $4,%lo(l1 + 0xfff0)
+
+ lw $4,%got(l1 + 0x18000)($28)
+ addiu $4,%lo(l1 + 0x18000)
+
+ lw $4,%got(l2)($28)
+ addiu $4,%lo(l2)
+
+ lw $4,%got(l2 + 0xfff)($28)
+ addiu $4,%lo(l2 + 0xfff)
+
+ lw $4,%got(l2 + 0x1000)($28)
+ addiu $4,%lo(l2 + 0x1000)
+
+ lw $4,%got(l2 + 0x12345)($28)
+ addiu $4,%lo(l2 + 0x12345)
+
+ lw $4,%gprel(l3)($28)
+ lw $4,%gprel(l3 + 4)($28)
+ lw $4,%gprel(l4)($28)
+ lw $4,%gprel(l4 + 4)($28)
+ lw $4,%gprel(l5)($28)
+ lw $4,%gprel(l5 + 8)($28)
+ lw $4,%gprel(l5 + 12)($28)
+
+ .end foo
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+ .space 16
+ .align 4, 0
+
+ .data
+ .word 1,2,3,4
+l1: .word 4,5
+ .space 0x1f000 - 24
+l2: .word 7,8
+
+ .sdata
+l3: .word 1
+l4: .word 2
+ .word 3
+l5: .word 4
diff --git a/gas/testsuite/gas/mips/elf_ase_mips16e2-2.d b/gas/testsuite/gas/mips/elf_ase_mips16e2-2.d
new file mode 100644
index 0000000..399b751
--- /dev/null
+++ b/gas/testsuite/gas/mips/elf_ase_mips16e2-2.d
@@ -0,0 +1,21 @@
+#name: ELF MIPS16e2 ASE markings 2
+#source: nop.s
+#objdump: -p
+#as: -32 -mips16 -mips32r2 -mmips16e2
+
+.*:.*file format.*mips.*
+private flags = [0-9a-f]*[4-7c-f]......: .*[[,]mips16[],].*
+
+MIPS ABI Flags Version: 0
+
+ISA: MIPS.*
+GPR size: 32
+CPR1 size: 32
+CPR2 size: 0
+FP ABI: Hard float \(double precision\)
+ISA Extension: .*
+ASEs:
+ MIPS16 ASE
+ MIPS16e2 ASE
+FLAGS 1: 0000000.
+FLAGS 2: 00000000
diff --git a/gas/testsuite/gas/mips/elf_ase_mips16e2.d b/gas/testsuite/gas/mips/elf_ase_mips16e2.d
new file mode 100644
index 0000000..384adcc
--- /dev/null
+++ b/gas/testsuite/gas/mips/elf_ase_mips16e2.d
@@ -0,0 +1,5 @@
+#name: ELF MIPS16e2 ASE markings
+#source: empty.s
+#objdump: -p
+#as: -32 -mips16 -mips32r2 -mmips16e2
+#dump: elf_ase_mips16.d
diff --git a/gas/testsuite/gas/mips/mips.exp b/gas/testsuite/gas/mips/mips.exp
index a024ee5..7b20b4c 100644
--- a/gas/testsuite/gas/mips/mips.exp
+++ b/gas/testsuite/gas/mips/mips.exp
@@ -896,11 +896,17 @@ if { [istarget mips*-*-vxworks*] } {
# Check MIPS16e extensions
run_dump_test_arches "mips16e" [mips_arch_list_matching mips16e-32]
run_dump_test_arches "mips16e-64" [mips_arch_list_matching mips16e-32]
+ # Check MIPS16e2 extensions.
+ run_dump_test_arches "mips16e2" [mips_arch_list_matching mips16e2-32]
+ run_dump_test_arches "mips16e2-mt" [mips_arch_list_matching mips16e2-32]
# Check MIPS16 ISA subset disassembly
run_dump_test_arches "mips16-sub" [mips_arch_list_matching mips16-32]
run_dump_test_arches "mips16e-sub" [mips_arch_list_matching mips16-32]
run_dump_test_arches "mips16e-64-sub" \
[mips_arch_list_matching mips16-32]
+ run_dump_test_arches "mips16e2-sub" [mips_arch_list_matching mips16-32]
+ run_dump_test_arches "mips16e2-mt-sub" \
+ [mips_arch_list_matching mips16-32]
# Check jalx handling
run_dump_test "mips16-jalx"
@@ -975,12 +981,16 @@ if { [istarget mips*-*-vxworks*] } {
# Check MIPS16 HI16/LO16 relocations
run_dump_test "mips16-hilo"
+ run_dump_test "mips16e2-hilo"
if $has_newabi {
run_dump_test "mips16-hilo-n32"
+ run_dump_test "mips16e2-hilo-n32"
}
run_dump_test "mips16-hilo-match"
run_dump_test "mips16-reloc-error"
+ run_dump_test "mips16e2-reloc-error"
run_dump_test "mips16-reg-error"
+ run_dump_test "mips16e2-imm-error"
run_dump_test "delay"
run_dump_test "nodelay"
@@ -1106,6 +1116,8 @@ if { [istarget mips*-*-vxworks*] } {
# Verify that ASE markings are handled properly.
run_dump_test "elf_ase_mips16"
run_dump_test "elf_ase_mips16-2"
+ run_dump_test "elf_ase_mips16e2"
+ run_dump_test "elf_ase_mips16e2-2"
run_dump_test "elf_ase_micromips"
run_dump_test "elf_ase_micromips-2"
@@ -1137,6 +1149,7 @@ if { [istarget mips*-*-vxworks*] } {
run_dump_test "elf-rel8-mips16"
run_dump_test "elf-rel9"
run_dump_test "elf-rel9-mips16"
+ run_dump_test "elf-rel9-mips16e2"
if $has_newabi {
run_dump_test "elf-rel10"
run_dump_test "elf-rel11"
@@ -1372,6 +1385,8 @@ if { [istarget mips*-*-vxworks*] } {
run_dump_test "mips16e-jrc"
run_dump_test "mips16e-save"
run_list_test "mips16e-save-err" "-march=mips32 -32"
+ run_dump_test "mips16e2-lui"
+
run_dump_test "mips16-intermix"
run_dump_test "mips16-extend"
run_dump_test "mips16-extend-swap"
@@ -1416,10 +1431,12 @@ if { [istarget mips*-*-vxworks*] } {
run_dump_test "mips16-vis-1"
run_dump_test "call-nonpic-1"
run_dump_test "mips32-sync"
- run_dump_test_arches "mips32r2-sync" \
- [mips_arch_list_matching mips32r2]
- run_dump_test_arches "mips32r2-sync-1" \
- [mips_arch_list_matching mips32r2]
+ run_dump_test_arches "mips32r2-sync" [lsort -dictionary -unique [concat \
+ [mips_arch_list_matching mips32r2] \
+ [mips_arch_list_matching mips16e2-32]]]
+ run_dump_test_arches "mips32r2-sync-1" [lsort -dictionary -unique [concat \
+ [mips_arch_list_matching mips32r2] \
+ [mips_arch_list_matching mips16e2-32]]]
run_dump_test_arches "alnv_ps-swap" [mips_arch_list_matching fpisa5 \
!mips32r6]
run_dump_test_arches "cache" [lsort -dictionary -unique [concat \
@@ -1476,8 +1493,12 @@ if { [istarget mips*-*-vxworks*] } {
run_dump_test_arches "hilo-diff-el-n64" [mips_arch_list_matching mips3]
}
run_dump_test_arches "lui" [mips_arch_list_matching mips1]
- run_dump_test_arches "lui-1" [mips_arch_list_matching mips1]
- run_dump_test_arches "lui-2" [mips_arch_list_matching mips1]
+ run_dump_test_arches "lui-1" [lsort -dictionary -unique [concat \
+ [mips_arch_list_matching mips1] \
+ [mips_arch_list_matching mips16e2-32]]]
+ run_dump_test_arches "lui-2" [lsort -dictionary -unique [concat \
+ [mips_arch_list_matching mips1] \
+ [mips_arch_list_matching mips16e2-32]]]
run_dump_test_arches "addiu-error" [mips_arch_list_all]
run_dump_test_arches "break-error" [mips_arch_list_all]
diff --git a/gas/testsuite/gas/mips/mips16e2-hilo-n32.d b/gas/testsuite/gas/mips/mips16e2-hilo-n32.d
new file mode 100644
index 0000000..b5df2b9
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips16e2-hilo-n32.d
@@ -0,0 +1,419 @@
+#objdump: -dr
+#name: MIPS16e2 lui/addi n32
+#as: -mips16 -mabi=n32 -march=mips64r2 -mmips16e2
+#source: mips16e2-hilo.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+
+0+0000 <stuff>:
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: 4c00 addiu a0,0
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data\+0x4
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data\+0x4
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 big_external_data_label
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 big_external_data_label
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 small_external_data_label
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 small_external_data_label
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 big_external_common
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 big_external_common
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 small_external_common
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 small_external_common
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.bss
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.bss
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.sbss
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.sbss
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: 4c01 addiu a0,1
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data\+0x1
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data\+0x1
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data\+0x5
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data\+0x5
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 big_external_data_label\+0x1
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 big_external_data_label\+0x1
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 small_external_data_label\+0x1
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 small_external_data_label\+0x1
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 big_external_common\+0x1
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 big_external_common\+0x1
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 small_external_common\+0x1
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 small_external_common\+0x1
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.bss\+0x1
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.bss\+0x1
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.sbss\+0x1
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.sbss\+0x1
+[ ]*[0-9a-f]+: f000 6c21 lui a0,0x1
+[ ]*[0-9a-f]+: f010 4c00 addiu a0,-32768
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data\+0x8000
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data\+0x8000
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data\+0x8004
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data\+0x8004
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 big_external_data_label\+0x8000
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 big_external_data_label\+0x8000
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 small_external_data_label\+0x8000
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 small_external_data_label\+0x8000
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 big_external_common\+0x8000
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 big_external_common\+0x8000
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 small_external_common\+0x8000
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 small_external_common\+0x8000
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.bss\+0x8000
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.bss\+0x8000
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.sbss\+0x8000
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.sbss\+0x8000
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: f010 4c00 addiu a0,-32768
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data-0x8000
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data-0x8000
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data-0x7ffc
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data-0x7ffc
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 big_external_data_label-0x8000
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 big_external_data_label-0x8000
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 small_external_data_label-0x8000
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 small_external_data_label-0x8000
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 big_external_common-0x8000
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 big_external_common-0x8000
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 small_external_common-0x8000
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 small_external_common-0x8000
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.bss-0x8000
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.bss-0x8000
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.sbss-0x8000
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.sbss-0x8000
+[ ]*[0-9a-f]+: f000 6c21 lui a0,0x1
+[ ]*[0-9a-f]+: 4c00 addiu a0,0
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data\+0x10000
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data\+0x10000
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data\+0x10004
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data\+0x10004
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 big_external_data_label\+0x10000
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 big_external_data_label\+0x10000
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 small_external_data_label\+0x10000
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 small_external_data_label\+0x10000
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 big_external_common\+0x10000
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 big_external_common\+0x10000
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 small_external_common\+0x10000
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 small_external_common\+0x10000
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.bss\+0x10000
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.bss\+0x10000
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.sbss\+0x10000
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.sbss\+0x10000
+[ ]*[0-9a-f]+: f000 6c22 lui a0,0x2
+[ ]*[0-9a-f]+: f5b4 4c05 addiu a0,-23131
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data\+0x1a5a5
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data\+0x1a5a5
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data\+0x1a5a9
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data\+0x1a5a9
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 big_external_data_label\+0x1a5a5
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 big_external_data_label\+0x1a5a5
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 small_external_data_label\+0x1a5a5
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 small_external_data_label\+0x1a5a5
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 big_external_common\+0x1a5a5
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 big_external_common\+0x1a5a5
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 small_external_common\+0x1a5a5
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 small_external_common\+0x1a5a5
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.bss\+0x1a5a5
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.bss\+0x1a5a5
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.sbss\+0x1a5a5
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.sbss\+0x1a5a5
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data\+0x4
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data\+0x4
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 big_external_data_label
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 big_external_data_label
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 small_external_data_label
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 small_external_data_label
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 big_external_common
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 big_external_common
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 small_external_common
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 small_external_common
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.bss
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.bss
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.sbss
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.sbss
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: f000 9d81 lw a0,1\(a1\)
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data\+0x1
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data\+0x1
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data\+0x5
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data\+0x5
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 big_external_data_label\+0x1
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 big_external_data_label\+0x1
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 small_external_data_label\+0x1
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 small_external_data_label\+0x1
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 big_external_common\+0x1
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 big_external_common\+0x1
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 small_external_common\+0x1
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 small_external_common\+0x1
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.bss\+0x1
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.bss\+0x1
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.sbss\+0x1
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.sbss\+0x1
+[ ]*[0-9a-f]+: f000 6d21 lui a1,0x1
+[ ]*[0-9a-f]+: f010 9d80 lw a0,-32768\(a1\)
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data\+0x8000
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data\+0x8000
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data\+0x8004
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data\+0x8004
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 big_external_data_label\+0x8000
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 big_external_data_label\+0x8000
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 small_external_data_label\+0x8000
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 small_external_data_label\+0x8000
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 big_external_common\+0x8000
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 big_external_common\+0x8000
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 small_external_common\+0x8000
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 small_external_common\+0x8000
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.bss\+0x8000
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.bss\+0x8000
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.sbss\+0x8000
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.sbss\+0x8000
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: f010 9d80 lw a0,-32768\(a1\)
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data-0x8000
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data-0x8000
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data-0x7ffc
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data-0x7ffc
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 big_external_data_label-0x8000
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 big_external_data_label-0x8000
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 small_external_data_label-0x8000
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 small_external_data_label-0x8000
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 big_external_common-0x8000
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 big_external_common-0x8000
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 small_external_common-0x8000
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 small_external_common-0x8000
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.bss-0x8000
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.bss-0x8000
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.sbss-0x8000
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.sbss-0x8000
+[ ]*[0-9a-f]+: f000 6d21 lui a1,0x1
+[ ]*[0-9a-f]+: 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data\+0x10000
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data\+0x10000
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data\+0x10004
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data\+0x10004
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 big_external_data_label\+0x10000
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 big_external_data_label\+0x10000
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 small_external_data_label\+0x10000
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 small_external_data_label\+0x10000
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 big_external_common\+0x10000
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 big_external_common\+0x10000
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 small_external_common\+0x10000
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 small_external_common\+0x10000
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.bss\+0x10000
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.bss\+0x10000
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.sbss\+0x10000
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.sbss\+0x10000
+[ ]*[0-9a-f]+: f000 6d22 lui a1,0x2
+[ ]*[0-9a-f]+: f5b4 9d85 lw a0,-23131\(a1\)
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data\+0x1a5a5
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data\+0x1a5a5
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data\+0x1a5a9
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data\+0x1a5a9
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 big_external_data_label\+0x1a5a5
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 big_external_data_label\+0x1a5a5
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 small_external_data_label\+0x1a5a5
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 small_external_data_label\+0x1a5a5
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 big_external_common\+0x1a5a5
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 big_external_common\+0x1a5a5
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 small_external_common\+0x1a5a5
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 small_external_common\+0x1a5a5
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.bss\+0x1a5a5
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.bss\+0x1a5a5
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.sbss\+0x1a5a5
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.sbss\+0x1a5a5
+ \.\.\.
diff --git a/gas/testsuite/gas/mips/mips16e2-hilo.d b/gas/testsuite/gas/mips/mips16e2-hilo.d
new file mode 100644
index 0000000..49dca2d
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips16e2-hilo.d
@@ -0,0 +1,419 @@
+#objdump: -dr
+#name: MIPS16e2 lui/addi
+#as: -mips16 -mabi=32 -march=mips32r2 -mmips16e2
+#source: mips16e2-hilo.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+
+0+0000 <stuff>:
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: 4c00 addiu a0,0
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data
+[ ]*[0-9a-f]+: f000 4c04 addiu a0,4
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 big_external_data_label
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 big_external_data_label
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 small_external_data_label
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 small_external_data_label
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 big_external_common
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 big_external_common
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 small_external_common
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 small_external_common
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.bss
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.bss
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.sbss
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.sbss
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: 4c01 addiu a0,1
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data
+[ ]*[0-9a-f]+: f000 4c01 addiu a0,1
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data
+[ ]*[0-9a-f]+: f000 4c05 addiu a0,5
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 big_external_data_label
+[ ]*[0-9a-f]+: f000 4c01 addiu a0,1
+[ ]*[0-9a-f]+: R_MIPS16_LO16 big_external_data_label
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 small_external_data_label
+[ ]*[0-9a-f]+: f000 4c01 addiu a0,1
+[ ]*[0-9a-f]+: R_MIPS16_LO16 small_external_data_label
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 big_external_common
+[ ]*[0-9a-f]+: f000 4c01 addiu a0,1
+[ ]*[0-9a-f]+: R_MIPS16_LO16 big_external_common
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 small_external_common
+[ ]*[0-9a-f]+: f000 4c01 addiu a0,1
+[ ]*[0-9a-f]+: R_MIPS16_LO16 small_external_common
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.bss
+[ ]*[0-9a-f]+: f000 4c01 addiu a0,1
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.bss
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.sbss
+[ ]*[0-9a-f]+: f000 4c01 addiu a0,1
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.sbss
+[ ]*[0-9a-f]+: f000 6c21 lui a0,0x1
+[ ]*[0-9a-f]+: f010 4c00 addiu a0,-32768
+[ ]*[0-9a-f]+: f000 6c21 lui a0,0x1
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data
+[ ]*[0-9a-f]+: f010 4c00 addiu a0,-32768
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data
+[ ]*[0-9a-f]+: f000 6c21 lui a0,0x1
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data
+[ ]*[0-9a-f]+: f010 4c04 addiu a0,-32764
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data
+[ ]*[0-9a-f]+: f000 6c21 lui a0,0x1
+[ ]*[0-9a-f]+: R_MIPS16_HI16 big_external_data_label
+[ ]*[0-9a-f]+: f010 4c00 addiu a0,-32768
+[ ]*[0-9a-f]+: R_MIPS16_LO16 big_external_data_label
+[ ]*[0-9a-f]+: f000 6c21 lui a0,0x1
+[ ]*[0-9a-f]+: R_MIPS16_HI16 small_external_data_label
+[ ]*[0-9a-f]+: f010 4c00 addiu a0,-32768
+[ ]*[0-9a-f]+: R_MIPS16_LO16 small_external_data_label
+[ ]*[0-9a-f]+: f000 6c21 lui a0,0x1
+[ ]*[0-9a-f]+: R_MIPS16_HI16 big_external_common
+[ ]*[0-9a-f]+: f010 4c00 addiu a0,-32768
+[ ]*[0-9a-f]+: R_MIPS16_LO16 big_external_common
+[ ]*[0-9a-f]+: f000 6c21 lui a0,0x1
+[ ]*[0-9a-f]+: R_MIPS16_HI16 small_external_common
+[ ]*[0-9a-f]+: f010 4c00 addiu a0,-32768
+[ ]*[0-9a-f]+: R_MIPS16_LO16 small_external_common
+[ ]*[0-9a-f]+: f000 6c21 lui a0,0x1
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.bss
+[ ]*[0-9a-f]+: f010 4c00 addiu a0,-32768
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.bss
+[ ]*[0-9a-f]+: f000 6c21 lui a0,0x1
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.sbss
+[ ]*[0-9a-f]+: f010 4c00 addiu a0,-32768
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.sbss
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: f010 4c00 addiu a0,-32768
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data
+[ ]*[0-9a-f]+: f010 4c00 addiu a0,-32768
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data
+[ ]*[0-9a-f]+: f010 4c04 addiu a0,-32764
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 big_external_data_label
+[ ]*[0-9a-f]+: f010 4c00 addiu a0,-32768
+[ ]*[0-9a-f]+: R_MIPS16_LO16 big_external_data_label
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 small_external_data_label
+[ ]*[0-9a-f]+: f010 4c00 addiu a0,-32768
+[ ]*[0-9a-f]+: R_MIPS16_LO16 small_external_data_label
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 big_external_common
+[ ]*[0-9a-f]+: f010 4c00 addiu a0,-32768
+[ ]*[0-9a-f]+: R_MIPS16_LO16 big_external_common
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 small_external_common
+[ ]*[0-9a-f]+: f010 4c00 addiu a0,-32768
+[ ]*[0-9a-f]+: R_MIPS16_LO16 small_external_common
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.bss
+[ ]*[0-9a-f]+: f010 4c00 addiu a0,-32768
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.bss
+[ ]*[0-9a-f]+: f000 6c20 lui a0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.sbss
+[ ]*[0-9a-f]+: f010 4c00 addiu a0,-32768
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.sbss
+[ ]*[0-9a-f]+: f000 6c21 lui a0,0x1
+[ ]*[0-9a-f]+: 4c00 addiu a0,0
+[ ]*[0-9a-f]+: f000 6c21 lui a0,0x1
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data
+[ ]*[0-9a-f]+: f000 6c21 lui a0,0x1
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data
+[ ]*[0-9a-f]+: f000 4c04 addiu a0,4
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data
+[ ]*[0-9a-f]+: f000 6c21 lui a0,0x1
+[ ]*[0-9a-f]+: R_MIPS16_HI16 big_external_data_label
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 big_external_data_label
+[ ]*[0-9a-f]+: f000 6c21 lui a0,0x1
+[ ]*[0-9a-f]+: R_MIPS16_HI16 small_external_data_label
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 small_external_data_label
+[ ]*[0-9a-f]+: f000 6c21 lui a0,0x1
+[ ]*[0-9a-f]+: R_MIPS16_HI16 big_external_common
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 big_external_common
+[ ]*[0-9a-f]+: f000 6c21 lui a0,0x1
+[ ]*[0-9a-f]+: R_MIPS16_HI16 small_external_common
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 small_external_common
+[ ]*[0-9a-f]+: f000 6c21 lui a0,0x1
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.bss
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.bss
+[ ]*[0-9a-f]+: f000 6c21 lui a0,0x1
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.sbss
+[ ]*[0-9a-f]+: f000 4c00 addiu a0,0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.sbss
+[ ]*[0-9a-f]+: f000 6c22 lui a0,0x2
+[ ]*[0-9a-f]+: f5b4 4c05 addiu a0,-23131
+[ ]*[0-9a-f]+: f000 6c22 lui a0,0x2
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data
+[ ]*[0-9a-f]+: f5b4 4c05 addiu a0,-23131
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data
+[ ]*[0-9a-f]+: f000 6c22 lui a0,0x2
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data
+[ ]*[0-9a-f]+: f5b4 4c09 addiu a0,-23127
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data
+[ ]*[0-9a-f]+: f000 6c22 lui a0,0x2
+[ ]*[0-9a-f]+: R_MIPS16_HI16 big_external_data_label
+[ ]*[0-9a-f]+: f5b4 4c05 addiu a0,-23131
+[ ]*[0-9a-f]+: R_MIPS16_LO16 big_external_data_label
+[ ]*[0-9a-f]+: f000 6c22 lui a0,0x2
+[ ]*[0-9a-f]+: R_MIPS16_HI16 small_external_data_label
+[ ]*[0-9a-f]+: f5b4 4c05 addiu a0,-23131
+[ ]*[0-9a-f]+: R_MIPS16_LO16 small_external_data_label
+[ ]*[0-9a-f]+: f000 6c22 lui a0,0x2
+[ ]*[0-9a-f]+: R_MIPS16_HI16 big_external_common
+[ ]*[0-9a-f]+: f5b4 4c05 addiu a0,-23131
+[ ]*[0-9a-f]+: R_MIPS16_LO16 big_external_common
+[ ]*[0-9a-f]+: f000 6c22 lui a0,0x2
+[ ]*[0-9a-f]+: R_MIPS16_HI16 small_external_common
+[ ]*[0-9a-f]+: f5b4 4c05 addiu a0,-23131
+[ ]*[0-9a-f]+: R_MIPS16_LO16 small_external_common
+[ ]*[0-9a-f]+: f000 6c22 lui a0,0x2
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.bss
+[ ]*[0-9a-f]+: f5b4 4c05 addiu a0,-23131
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.bss
+[ ]*[0-9a-f]+: f000 6c22 lui a0,0x2
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.sbss
+[ ]*[0-9a-f]+: f5b4 4c05 addiu a0,-23131
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.sbss
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 big_external_data_label
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 big_external_data_label
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 small_external_data_label
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 small_external_data_label
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 big_external_common
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 big_external_common
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 small_external_common
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 small_external_common
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.bss
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.bss
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.sbss
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.sbss
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: f000 9d81 lw a0,1\(a1\)
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data
+[ ]*[0-9a-f]+: f000 9d81 lw a0,1\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data
+[ ]*[0-9a-f]+: f000 9d85 lw a0,5\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 big_external_data_label
+[ ]*[0-9a-f]+: f000 9d81 lw a0,1\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 big_external_data_label
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 small_external_data_label
+[ ]*[0-9a-f]+: f000 9d81 lw a0,1\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 small_external_data_label
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 big_external_common
+[ ]*[0-9a-f]+: f000 9d81 lw a0,1\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 big_external_common
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 small_external_common
+[ ]*[0-9a-f]+: f000 9d81 lw a0,1\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 small_external_common
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.bss
+[ ]*[0-9a-f]+: f000 9d81 lw a0,1\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.bss
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.sbss
+[ ]*[0-9a-f]+: f000 9d81 lw a0,1\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.sbss
+[ ]*[0-9a-f]+: f000 6d21 lui a1,0x1
+[ ]*[0-9a-f]+: f010 9d80 lw a0,-32768\(a1\)
+[ ]*[0-9a-f]+: f000 6d21 lui a1,0x1
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data
+[ ]*[0-9a-f]+: f010 9d80 lw a0,-32768\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data
+[ ]*[0-9a-f]+: f000 6d21 lui a1,0x1
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data
+[ ]*[0-9a-f]+: f010 9d84 lw a0,-32764\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data
+[ ]*[0-9a-f]+: f000 6d21 lui a1,0x1
+[ ]*[0-9a-f]+: R_MIPS16_HI16 big_external_data_label
+[ ]*[0-9a-f]+: f010 9d80 lw a0,-32768\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 big_external_data_label
+[ ]*[0-9a-f]+: f000 6d21 lui a1,0x1
+[ ]*[0-9a-f]+: R_MIPS16_HI16 small_external_data_label
+[ ]*[0-9a-f]+: f010 9d80 lw a0,-32768\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 small_external_data_label
+[ ]*[0-9a-f]+: f000 6d21 lui a1,0x1
+[ ]*[0-9a-f]+: R_MIPS16_HI16 big_external_common
+[ ]*[0-9a-f]+: f010 9d80 lw a0,-32768\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 big_external_common
+[ ]*[0-9a-f]+: f000 6d21 lui a1,0x1
+[ ]*[0-9a-f]+: R_MIPS16_HI16 small_external_common
+[ ]*[0-9a-f]+: f010 9d80 lw a0,-32768\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 small_external_common
+[ ]*[0-9a-f]+: f000 6d21 lui a1,0x1
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.bss
+[ ]*[0-9a-f]+: f010 9d80 lw a0,-32768\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.bss
+[ ]*[0-9a-f]+: f000 6d21 lui a1,0x1
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.sbss
+[ ]*[0-9a-f]+: f010 9d80 lw a0,-32768\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.sbss
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: f010 9d80 lw a0,-32768\(a1\)
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data
+[ ]*[0-9a-f]+: f010 9d80 lw a0,-32768\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data
+[ ]*[0-9a-f]+: f010 9d84 lw a0,-32764\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 big_external_data_label
+[ ]*[0-9a-f]+: f010 9d80 lw a0,-32768\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 big_external_data_label
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 small_external_data_label
+[ ]*[0-9a-f]+: f010 9d80 lw a0,-32768\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 small_external_data_label
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 big_external_common
+[ ]*[0-9a-f]+: f010 9d80 lw a0,-32768\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 big_external_common
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 small_external_common
+[ ]*[0-9a-f]+: f010 9d80 lw a0,-32768\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 small_external_common
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.bss
+[ ]*[0-9a-f]+: f010 9d80 lw a0,-32768\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.bss
+[ ]*[0-9a-f]+: f000 6d20 lui a1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.sbss
+[ ]*[0-9a-f]+: f010 9d80 lw a0,-32768\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.sbss
+[ ]*[0-9a-f]+: f000 6d21 lui a1,0x1
+[ ]*[0-9a-f]+: 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: f000 6d21 lui a1,0x1
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data
+[ ]*[0-9a-f]+: f000 6d21 lui a1,0x1
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data
+[ ]*[0-9a-f]+: f000 9d84 lw a0,4\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data
+[ ]*[0-9a-f]+: f000 6d21 lui a1,0x1
+[ ]*[0-9a-f]+: R_MIPS16_HI16 big_external_data_label
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 big_external_data_label
+[ ]*[0-9a-f]+: f000 6d21 lui a1,0x1
+[ ]*[0-9a-f]+: R_MIPS16_HI16 small_external_data_label
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 small_external_data_label
+[ ]*[0-9a-f]+: f000 6d21 lui a1,0x1
+[ ]*[0-9a-f]+: R_MIPS16_HI16 big_external_common
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 big_external_common
+[ ]*[0-9a-f]+: f000 6d21 lui a1,0x1
+[ ]*[0-9a-f]+: R_MIPS16_HI16 small_external_common
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 small_external_common
+[ ]*[0-9a-f]+: f000 6d21 lui a1,0x1
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.bss
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.bss
+[ ]*[0-9a-f]+: f000 6d21 lui a1,0x1
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.sbss
+[ ]*[0-9a-f]+: f000 9d80 lw a0,0\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.sbss
+[ ]*[0-9a-f]+: f000 6d22 lui a1,0x2
+[ ]*[0-9a-f]+: f5b4 9d85 lw a0,-23131\(a1\)
+[ ]*[0-9a-f]+: f000 6d22 lui a1,0x2
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data
+[ ]*[0-9a-f]+: f5b4 9d85 lw a0,-23131\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data
+[ ]*[0-9a-f]+: f000 6d22 lui a1,0x2
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.data
+[ ]*[0-9a-f]+: f5b4 9d89 lw a0,-23127\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.data
+[ ]*[0-9a-f]+: f000 6d22 lui a1,0x2
+[ ]*[0-9a-f]+: R_MIPS16_HI16 big_external_data_label
+[ ]*[0-9a-f]+: f5b4 9d85 lw a0,-23131\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 big_external_data_label
+[ ]*[0-9a-f]+: f000 6d22 lui a1,0x2
+[ ]*[0-9a-f]+: R_MIPS16_HI16 small_external_data_label
+[ ]*[0-9a-f]+: f5b4 9d85 lw a0,-23131\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 small_external_data_label
+[ ]*[0-9a-f]+: f000 6d22 lui a1,0x2
+[ ]*[0-9a-f]+: R_MIPS16_HI16 big_external_common
+[ ]*[0-9a-f]+: f5b4 9d85 lw a0,-23131\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 big_external_common
+[ ]*[0-9a-f]+: f000 6d22 lui a1,0x2
+[ ]*[0-9a-f]+: R_MIPS16_HI16 small_external_common
+[ ]*[0-9a-f]+: f5b4 9d85 lw a0,-23131\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 small_external_common
+[ ]*[0-9a-f]+: f000 6d22 lui a1,0x2
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.bss
+[ ]*[0-9a-f]+: f5b4 9d85 lw a0,-23131\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.bss
+[ ]*[0-9a-f]+: f000 6d22 lui a1,0x2
+[ ]*[0-9a-f]+: R_MIPS16_HI16 \.sbss
+[ ]*[0-9a-f]+: f5b4 9d85 lw a0,-23131\(a1\)
+[ ]*[0-9a-f]+: R_MIPS16_LO16 \.sbss
+ \.\.\.
diff --git a/gas/testsuite/gas/mips/mips16e2-hilo.s b/gas/testsuite/gas/mips/mips16e2-hilo.s
new file mode 100644
index 0000000..f16a354
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips16e2-hilo.s
@@ -0,0 +1,239 @@
+# Source file used to test li/addi on MIPS16e2
+
+ .set mips16
+
+ .data
+data_label:
+ .word 0
+data_label2:
+ .word 0
+
+ .extern big_external_data_label,1000
+ .extern small_external_data_label,1
+ .comm big_external_common,1000
+ .comm small_external_common,1
+ .lcomm big_local_common,1000
+ .lcomm small_local_common,1
+
+ .text
+stuff:
+ lui $4,%hi(0)
+ addiu $4,%lo(0)
+ lui $4,%hi(data_label)
+ addiu $4,%lo(data_label)
+ lui $4,%hi(data_label2)
+ addiu $4,%lo(data_label2)
+ lui $4,%hi(big_external_data_label)
+ addiu $4,%lo(big_external_data_label)
+ lui $4,%hi(small_external_data_label)
+ addiu $4,%lo(small_external_data_label)
+ lui $4,%hi(big_external_common)
+ addiu $4,%lo(big_external_common)
+ lui $4,%hi(small_external_common)
+ addiu $4,%lo(small_external_common)
+ lui $4,%hi(big_local_common)
+ addiu $4,%lo(big_local_common)
+ lui $4,%hi(small_local_common)
+ addiu $4,%lo(small_local_common)
+ lui $4,%hi(1)
+ addiu $4,%lo(1)
+ lui $4,%hi(data_label+1)
+ addiu $4,%lo(data_label+1)
+ lui $4,%hi(data_label2+1)
+ addiu $4,%lo(data_label2+1)
+ lui $4,%hi(big_external_data_label+1)
+ addiu $4,%lo(big_external_data_label+1)
+ lui $4,%hi(small_external_data_label+1)
+ addiu $4,%lo(small_external_data_label+1)
+ lui $4,%hi(big_external_common+1)
+ addiu $4,%lo(big_external_common+1)
+ lui $4,%hi(small_external_common+1)
+ addiu $4,%lo(small_external_common+1)
+ lui $4,%hi(big_local_common+1)
+ addiu $4,%lo(big_local_common+1)
+ lui $4,%hi(small_local_common+1)
+ addiu $4,%lo(small_local_common+1)
+ lui $4,%hi(0x8000)
+ addiu $4,%lo(0x8000)
+ lui $4,%hi(data_label+0x8000)
+ addiu $4,%lo(data_label+0x8000)
+ lui $4,%hi(data_label2+0x8000)
+ addiu $4,%lo(data_label2+0x8000)
+ lui $4,%hi(big_external_data_label+0x8000)
+ addiu $4,%lo(big_external_data_label+0x8000)
+ lui $4,%hi(small_external_data_label+0x8000)
+ addiu $4,%lo(small_external_data_label+0x8000)
+ lui $4,%hi(big_external_common+0x8000)
+ addiu $4,%lo(big_external_common+0x8000)
+ lui $4,%hi(small_external_common+0x8000)
+ addiu $4,%lo(small_external_common+0x8000)
+ lui $4,%hi(big_local_common+0x8000)
+ addiu $4,%lo(big_local_common+0x8000)
+ lui $4,%hi(small_local_common+0x8000)
+ addiu $4,%lo(small_local_common+0x8000)
+ lui $4,%hi(-0x8000)
+ addiu $4,%lo(-0x8000)
+ lui $4,%hi(data_label-0x8000)
+ addiu $4,%lo(data_label-0x8000)
+ lui $4,%hi(data_label2-0x8000)
+ addiu $4,%lo(data_label2-0x8000)
+ lui $4,%hi(big_external_data_label-0x8000)
+ addiu $4,%lo(big_external_data_label-0x8000)
+ lui $4,%hi(small_external_data_label-0x8000)
+ addiu $4,%lo(small_external_data_label-0x8000)
+ lui $4,%hi(big_external_common-0x8000)
+ addiu $4,%lo(big_external_common-0x8000)
+ lui $4,%hi(small_external_common-0x8000)
+ addiu $4,%lo(small_external_common-0x8000)
+ lui $4,%hi(big_local_common-0x8000)
+ addiu $4,%lo(big_local_common-0x8000)
+ lui $4,%hi(small_local_common-0x8000)
+ addiu $4,%lo(small_local_common-0x8000)
+ lui $4,%hi(0x10000)
+ addiu $4,%lo(0x10000)
+ lui $4,%hi(data_label+0x10000)
+ addiu $4,%lo(data_label+0x10000)
+ lui $4,%hi(data_label2+0x10000)
+ addiu $4,%lo(data_label2+0x10000)
+ lui $4,%hi(big_external_data_label+0x10000)
+ addiu $4,%lo(big_external_data_label+0x10000)
+ lui $4,%hi(small_external_data_label+0x10000)
+ addiu $4,%lo(small_external_data_label+0x10000)
+ lui $4,%hi(big_external_common+0x10000)
+ addiu $4,%lo(big_external_common+0x10000)
+ lui $4,%hi(small_external_common+0x10000)
+ addiu $4,%lo(small_external_common+0x10000)
+ lui $4,%hi(big_local_common+0x10000)
+ addiu $4,%lo(big_local_common+0x10000)
+ lui $4,%hi(small_local_common+0x10000)
+ addiu $4,%lo(small_local_common+0x10000)
+ lui $4,%hi(0x1a5a5)
+ addiu $4,%lo(0x1a5a5)
+ lui $4,%hi(data_label+0x1a5a5)
+ addiu $4,%lo(data_label+0x1a5a5)
+ lui $4,%hi(data_label2+0x1a5a5)
+ addiu $4,%lo(data_label2+0x1a5a5)
+ lui $4,%hi(big_external_data_label+0x1a5a5)
+ addiu $4,%lo(big_external_data_label+0x1a5a5)
+ lui $4,%hi(small_external_data_label+0x1a5a5)
+ addiu $4,%lo(small_external_data_label+0x1a5a5)
+ lui $4,%hi(big_external_common+0x1a5a5)
+ addiu $4,%lo(big_external_common+0x1a5a5)
+ lui $4,%hi(small_external_common+0x1a5a5)
+ addiu $4,%lo(small_external_common+0x1a5a5)
+ lui $4,%hi(big_local_common+0x1a5a5)
+ addiu $4,%lo(big_local_common+0x1a5a5)
+ lui $4,%hi(small_local_common+0x1a5a5)
+ addiu $4,%lo(small_local_common+0x1a5a5)
+ lui $5,%hi(0)
+ lw $4,%hi(0)($5)
+ lui $5,%hi(data_label)
+ lw $4,%hi(data_label)($5)
+ lui $5,%hi(data_label2)
+ lw $4,%hi(data_label2)($5)
+ lui $5,%hi(big_external_data_label)
+ lw $4,%lo(big_external_data_label)($5)
+ lui $5,%hi(small_external_data_label)
+ lw $4,%lo(small_external_data_label)($5)
+ lui $5,%hi(big_external_common)
+ lw $4,%lo(big_external_common)($5)
+ lui $5,%hi(small_external_common)
+ lw $4,%lo(small_external_common)($5)
+ lui $5,%hi(big_local_common)
+ lw $4,%lo(big_local_common)($5)
+ lui $5,%hi(small_local_common)
+ lw $4,%lo(small_local_common)($5)
+ lui $5,%hi(1)
+ lw $4,%lo(1)($5)
+ lui $5,%hi(data_label+1)
+ lw $4,%lo(data_label+1)($5)
+ lui $5,%hi(data_label2+1)
+ lw $4,%lo(data_label2+1)($5)
+ lui $5,%hi(big_external_data_label+1)
+ lw $4,%lo(big_external_data_label+1)($5)
+ lui $5,%hi(small_external_data_label+1)
+ lw $4,%lo(small_external_data_label+1)($5)
+ lui $5,%hi(big_external_common+1)
+ lw $4,%lo(big_external_common+1)($5)
+ lui $5,%hi(small_external_common+1)
+ lw $4,%lo(small_external_common+1)($5)
+ lui $5,%hi(big_local_common+1)
+ lw $4,%lo(big_local_common+1)($5)
+ lui $5,%hi(small_local_common+1)
+ lw $4,%lo(small_local_common+1)($5)
+ lui $5,%hi(0x8000)
+ lw $4,%lo(0x8000)($5)
+ lui $5,%hi(data_label+0x8000)
+ lw $4,%lo(data_label+0x8000)($5)
+ lui $5,%hi(data_label2+0x8000)
+ lw $4,%lo(data_label2+0x8000)($5)
+ lui $5,%hi(big_external_data_label+0x8000)
+ lw $4,%lo(big_external_data_label+0x8000)($5)
+ lui $5,%hi(small_external_data_label+0x8000)
+ lw $4,%lo(small_external_data_label+0x8000)($5)
+ lui $5,%hi(big_external_common+0x8000)
+ lw $4,%lo(big_external_common+0x8000)($5)
+ lui $5,%hi(small_external_common+0x8000)
+ lw $4,%lo(small_external_common+0x8000)($5)
+ lui $5,%hi(big_local_common+0x8000)
+ lw $4,%lo(big_local_common+0x8000)($5)
+ lui $5,%hi(small_local_common+0x8000)
+ lw $4,%lo(small_local_common+0x8000)($5)
+ lui $5,%hi(-0x8000)
+ lw $4,%lo(-0x8000)($5)
+ lui $5,%hi(data_label-0x8000)
+ lw $4,%lo(data_label-0x8000)($5)
+ lui $5,%hi(data_label2-0x8000)
+ lw $4,%lo(data_label2-0x8000)($5)
+ lui $5,%hi(big_external_data_label-0x8000)
+ lw $4,%lo(big_external_data_label-0x8000)($5)
+ lui $5,%hi(small_external_data_label-0x8000)
+ lw $4,%lo(small_external_data_label-0x8000)($5)
+ lui $5,%hi(big_external_common-0x8000)
+ lw $4,%lo(big_external_common-0x8000)($5)
+ lui $5,%hi(small_external_common-0x8000)
+ lw $4,%lo(small_external_common-0x8000)($5)
+ lui $5,%hi(big_local_common-0x8000)
+ lw $4,%lo(big_local_common-0x8000)($5)
+ lui $5,%hi(small_local_common-0x8000)
+ lw $4,%lo(small_local_common-0x8000)($5)
+ lui $5,%hi(0x10000)
+ lw $4,%lo(0x10000)($5)
+ lui $5,%hi(data_label+0x10000)
+ lw $4,%lo(data_label+0x10000)($5)
+ lui $5,%hi(data_label2+0x10000)
+ lw $4,%lo(data_label2+0x10000)($5)
+ lui $5,%hi(big_external_data_label+0x10000)
+ lw $4,%lo(big_external_data_label+0x10000)($5)
+ lui $5,%hi(small_external_data_label+0x10000)
+ lw $4,%lo(small_external_data_label+0x10000)($5)
+ lui $5,%hi(big_external_common+0x10000)
+ lw $4,%lo(big_external_common+0x10000)($5)
+ lui $5,%hi(small_external_common+0x10000)
+ lw $4,%lo(small_external_common+0x10000)($5)
+ lui $5,%hi(big_local_common+0x10000)
+ lw $4,%lo(big_local_common+0x10000)($5)
+ lui $5,%hi(small_local_common+0x10000)
+ lw $4,%lo(small_local_common+0x10000)($5)
+ lui $5,%hi(0x1a5a5)
+ lw $4,%lo(0x1a5a5)($5)
+ lui $5,%hi(data_label+0x1a5a5)
+ lw $4,%lo(data_label+0x1a5a5)($5)
+ lui $5,%hi(data_label2+0x1a5a5)
+ lw $4,%lo(data_label2+0x1a5a5)($5)
+ lui $5,%hi(big_external_data_label+0x1a5a5)
+ lw $4,%lo(big_external_data_label+0x1a5a5)($5)
+ lui $5,%hi(small_external_data_label+0x1a5a5)
+ lw $4,%lo(small_external_data_label+0x1a5a5)($5)
+ lui $5,%hi(big_external_common+0x1a5a5)
+ lw $4,%lo(big_external_common+0x1a5a5)($5)
+ lui $5,%hi(small_external_common+0x1a5a5)
+ lw $4,%lo(small_external_common+0x1a5a5)($5)
+ lui $5,%hi(big_local_common+0x1a5a5)
+ lw $4,%lo(big_local_common+0x1a5a5)($5)
+ lui $5,%hi(small_local_common+0x1a5a5)
+ lw $4,%lo(small_local_common+0x1a5a5)($5)
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+ .space 16
+ .align 4, 0
diff --git a/gas/testsuite/gas/mips/mips16e2-imm-error.d b/gas/testsuite/gas/mips/mips16e2-imm-error.d
new file mode 100644
index 0000000..7a0bfb4
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips16e2-imm-error.d
@@ -0,0 +1,4 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16e2 ASE immediates
+#as: -32 -mips32r2 -mmips16e2
+#error-output: mips16e2-imm-error.l
diff --git a/gas/testsuite/gas/mips/mips16e2-imm-error.l b/gas/testsuite/gas/mips/mips16e2-imm-error.l
new file mode 100644
index 0000000..ff1638a
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips16e2-imm-error.l
@@ -0,0 +1,67 @@
+.*: Assembler messages:
+.*:3: Error: operand 2 out of range `lw \$2,-32769\(\$gp\)'
+.*:4: Error: operand 2 out of range `lw \$2,32768\(\$gp\)'
+.*:5: Error: operand 2 out of range `lh \$2,-32769\(\$gp\)'
+.*:6: Error: operand 2 out of range `lh \$2,32768\(\$gp\)'
+.*:7: Error: operand 2 out of range `lhu \$2,-32769\(\$gp\)'
+.*:8: Error: operand 2 out of range `lhu \$2,32768\(\$gp\)'
+.*:9: Error: operand 2 out of range `lb \$2,-32769\(\$gp\)'
+.*:10: Error: operand 2 out of range `lb \$2,32768\(\$gp\)'
+.*:11: Error: operand 2 out of range `lbu \$2,-32769\(\$gp\)'
+.*:12: Error: operand 2 out of range `lbu \$2,32768\(\$gp\)'
+.*:13: Error: operand 2 out of range `sw \$2,-32769\(\$gp\)'
+.*:14: Error: operand 2 out of range `sw \$2,32768\(\$gp\)'
+.*:15: Error: operand 2 out of range `sh \$2,-32769\(\$gp\)'
+.*:16: Error: operand 2 out of range `sh \$2,32768\(\$gp\)'
+.*:17: Error: operand 2 out of range `sb \$2,-32769\(\$gp\)'
+.*:18: Error: operand 2 out of range `sb \$2,32768\(\$gp\)'
+.*:20: Error: operand 2 out of range `ll \$2,-257\(\$gp\)'
+.*:21: Error: operand 2 out of range `ll \$2,256\(\$gp\)'
+.*:22: Error: operand 2 out of range `lwl \$2,-257\(\$gp\)'
+.*:23: Error: operand 2 out of range `lwl \$2,256\(\$gp\)'
+.*:24: Error: operand 2 out of range `lwr \$2,-257\(\$gp\)'
+.*:25: Error: operand 2 out of range `lwr \$2,256\(\$gp\)'
+.*:26: Error: operand 2 out of range `sc \$2,-257\(\$gp\)'
+.*:27: Error: operand 2 out of range `sc \$2,256\(\$gp\)'
+.*:28: Error: operand 2 out of range `swl \$2,-257\(\$gp\)'
+.*:29: Error: operand 2 out of range `swl \$2,256\(\$gp\)'
+.*:30: Error: operand 2 out of range `swr \$2,-257\(\$gp\)'
+.*:31: Error: operand 2 out of range `swr \$2,256\(\$gp\)'
+.*:33: Error: operand 2 out of range `cache 0,-257\(\$2\)'
+.*:34: Error: operand 2 out of range `cache 0,256\(\$2\)'
+.*:35: Error: operand 1 out of range `cache -1,0\(\$2\)'
+.*:36: Error: operand 1 out of range `cache 32,0\(\$2\)'
+.*:37: Error: operand 2 out of range `pref 0,-257\(\$2\)'
+.*:38: Error: operand 2 out of range `pref 0,256\(\$2\)'
+.*:39: Error: operand 1 out of range `pref -1,0\(\$2\)'
+.*:40: Error: operand 1 out of range `pref 32,0\(\$2\)'
+.*:42: Error: operand 3 out of range `addiu \$2,\$gp,-32769'
+.*:43: Error: operand 3 out of range `addiu \$2,\$gp,32768'
+.*:44: Error: operand 3 out of range `addu \$2,\$gp,-32769'
+.*:45: Error: operand 3 out of range `addu \$2,\$gp,32768'
+.*:47: Error: operand 2 out of range `lui \$2,-1'
+.*:48: Error: operand 2 out of range `lui \$2,65536'
+.*:49: Error: operand 2 out of range `andi \$2,-1'
+.*:50: Error: operand 2 out of range `andi \$2,65536'
+.*:51: Error: operand 2 out of range `ori \$2,-1'
+.*:52: Error: operand 2 out of range `ori \$2,65536'
+.*:53: Error: operand 2 out of range `xori \$2,-1'
+.*:54: Error: operand 2 out of range `xori \$2,65536'
+.*:56: Error: operand 4 out of range `ext \$2,\$3,0,0'
+.*:57: Error: operand 4 out of range `ext \$2,\$3,0,33'
+.*:58: Error: operand 3 out of range `ext \$2,\$3,-1,1'
+.*:59: Error: operand 3 out of range `ext \$2,\$3,32,1'
+.*:60: Error: operand 4 out of range `ins \$2,\$3,0,0'
+.*:61: Error: operand 4 out of range `ins \$2,\$3,0,33'
+.*:62: Error: operand 3 out of range `ins \$2,\$3,-1,1'
+.*:63: Error: operand 3 out of range `ins \$2,\$3,32,1'
+.*:64: Error: operand 4 out of range `ins \$2,\$0,0,0'
+.*:65: Error: operand 4 out of range `ins \$2,\$0,0,33'
+.*:66: Error: operand 3 out of range `ins \$2,\$0,-1,1'
+.*:67: Error: operand 3 out of range `ins \$2,\$0,32,1'
+.*:69: Error: operand 1 out of range `sync -1'
+.*:70: Error: operand 1 out of range `sync 32'
+.*:72: Error: operand 3 out of range `mfc0 \$2,\$3,-1'
+.*:73: Error: operand 3 out of range `mfc0 \$2,\$3,32'
+.*:74: Error: operand 3 out of range `mtc0 \$2,\$3,-1'
+.*:75: Error: operand 3 out of range `mtc0 \$2,\$3,32'
diff --git a/gas/testsuite/gas/mips/mips16e2-imm-error.s b/gas/testsuite/gas/mips/mips16e2-imm-error.s
new file mode 100644
index 0000000..d993d8b
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips16e2-imm-error.s
@@ -0,0 +1,79 @@
+ .set mips16
+foo:
+ lw $2, -32769($gp)
+ lw $2, 32768($gp)
+ lh $2, -32769($gp)
+ lh $2, 32768($gp)
+ lhu $2, -32769($gp)
+ lhu $2, 32768($gp)
+ lb $2, -32769($gp)
+ lb $2, 32768($gp)
+ lbu $2, -32769($gp)
+ lbu $2, 32768($gp)
+ sw $2, -32769($gp)
+ sw $2, 32768($gp)
+ sh $2, -32769($gp)
+ sh $2, 32768($gp)
+ sb $2, -32769($gp)
+ sb $2, 32768($gp)
+
+ ll $2, -257($gp)
+ ll $2, 256($gp)
+ lwl $2, -257($gp)
+ lwl $2, 256($gp)
+ lwr $2, -257($gp)
+ lwr $2, 256($gp)
+ sc $2, -257($gp)
+ sc $2, 256($gp)
+ swl $2, -257($gp)
+ swl $2, 256($gp)
+ swr $2, -257($gp)
+ swr $2, 256($gp)
+
+ cache 0, -257($2)
+ cache 0, 256($2)
+ cache -1, 0($2)
+ cache 32, 0($2)
+ pref 0, -257($2)
+ pref 0, 256($2)
+ pref -1, 0($2)
+ pref 32, 0($2)
+
+ addiu $2, $gp, -32769
+ addiu $2, $gp, 32768
+ addu $2, $gp, -32769
+ addu $2, $gp, 32768
+
+ lui $2, -1
+ lui $2, 65536
+ andi $2, -1
+ andi $2, 65536
+ ori $2, -1
+ ori $2, 65536
+ xori $2, -1
+ xori $2, 65536
+
+ ext $2, $3, 0, 0
+ ext $2, $3, 0, 33
+ ext $2, $3, -1, 1
+ ext $2, $3, 32, 1
+ ins $2, $3, 0, 0
+ ins $2, $3, 0, 33
+ ins $2, $3, -1, 1
+ ins $2, $3, 32, 1
+ ins $2, $0, 0, 0
+ ins $2, $0, 0, 33
+ ins $2, $0, -1, 1
+ ins $2, $0, 32, 1
+
+ sync -1
+ sync 32
+
+ mfc0 $2, $3, -1
+ mfc0 $2, $3, 32
+ mtc0 $2, $3, -1
+ mtc0 $2, $3, 32
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+ .space 16
+ .align 4, 0
diff --git a/gas/testsuite/gas/mips/mips16e2-lui.d b/gas/testsuite/gas/mips/mips16e2-lui.d
new file mode 100644
index 0000000..ee7e9f0
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips16e2-lui.d
@@ -0,0 +1,22 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16e2 LUI
+#as: -32 -mips16 -mips32r2 -mmips16e2
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> f000 6a20 lui v0,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 bar
+[0-9a-f]+ <[^>]*> f000 6b20 lui v1,0x0
+[ ]*[0-9a-f]+: R_MIPS16_HI16 .text
+[0-9a-f]+ <[^>]*> f770 6c25 lui a0,0x8765
+[0-9a-f]+ <[^>]*> f222 6d34 lui a1,0x1234
+[0-9a-f]+ <[^>]*> f000 6e20 lui a2,0x0
+[ ]*[0-9a-f]+: R_MIPS16_LO16 bar
+[0-9a-f]+ <[^>]*> f020 6f28 lui a3,0x28
+[ ]*[0-9a-f]+: R_MIPS16_LO16 .text
+[0-9a-f]+ <[^>]*> f328 6821 lui s0,0x4321
+[0-9a-f]+ <[^>]*> f66a 6938 lui s1,0x5678
+[0-9a-f]+ <[^>]*> f222 6a34 lui v0,0x1234
+[0-9a-f]+ <[^>]*> f000 6b21 lui v1,0x1
+ \.\.\.
diff --git a/gas/testsuite/gas/mips/mips16e2-lui.s b/gas/testsuite/gas/mips/mips16e2-lui.s
new file mode 100644
index 0000000..d0715a7
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips16e2-lui.s
@@ -0,0 +1,18 @@
+ .text
+foo:
+ lui $2, %hi(bar)
+ lui $3, %hi(0f)
+ lui $4, %hi(baz)
+ lui $5, %hi(0x12345678)
+ lui $6, %lo(bar)
+ lui $7, %lo(0f)
+ lui $16, %lo(baz)
+ lui $17, %lo(0x12345678)
+ lui $2, 0x1234
+ lui $3, 1
+0:
+ .set baz, 0x87654321
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+ .space 16
+ .align 4, 0
diff --git a/gas/testsuite/gas/mips/mips16e2-mt-sub.d b/gas/testsuite/gas/mips/mips16e2-mt-sub.d
new file mode 100644
index 0000000..c19ebf9
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips16e2-mt-sub.d
@@ -0,0 +1,33 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16e2 MT ASE subset disassembly
+#as: -32 -I$srcdir/$subdir
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> f0c0 3010 sll s0,3
+[0-9a-f]+ <[^>]*> f026 extend 0x26
+[0-9a-f]+ <[^>]*> 6701 move s0,at
+[0-9a-f]+ <[^>]*> f026 extend 0x26
+[0-9a-f]+ <[^>]*> 6701 move s0,at
+[0-9a-f]+ <[^>]*> f022 extend 0x22
+[0-9a-f]+ <[^>]*> 6741 move v0,at
+[0-9a-f]+ <[^>]*> f027 extend 0x27
+[0-9a-f]+ <[^>]*> 6701 move s0,at
+[0-9a-f]+ <[^>]*> f027 extend 0x27
+[0-9a-f]+ <[^>]*> 6701 move s0,at
+[0-9a-f]+ <[^>]*> f023 extend 0x23
+[0-9a-f]+ <[^>]*> 6741 move v0,at
+[0-9a-f]+ <[^>]*> f026 extend 0x26
+[0-9a-f]+ <[^>]*> 6700 move s0,zero
+[0-9a-f]+ <[^>]*> f026 extend 0x26
+[0-9a-f]+ <[^>]*> 6700 move s0,zero
+[0-9a-f]+ <[^>]*> f022 extend 0x22
+[0-9a-f]+ <[^>]*> 6740 move v0,zero
+[0-9a-f]+ <[^>]*> f027 extend 0x27
+[0-9a-f]+ <[^>]*> 6700 move s0,zero
+[0-9a-f]+ <[^>]*> f027 extend 0x27
+[0-9a-f]+ <[^>]*> 6700 move s0,zero
+[0-9a-f]+ <[^>]*> f023 extend 0x23
+[0-9a-f]+ <[^>]*> 6740 move v0,zero
+ \.\.\.
diff --git a/gas/testsuite/gas/mips/mips16e2-mt-sub.s b/gas/testsuite/gas/mips/mips16e2-mt-sub.s
new file mode 100644
index 0000000..990e06f
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips16e2-mt-sub.s
@@ -0,0 +1,4 @@
+ .set mips64r2
+ .set mips16e2
+ .set mt
+ .include "mips16e2-mt.s"
diff --git a/gas/testsuite/gas/mips/mips16e2-mt.d b/gas/testsuite/gas/mips/mips16e2-mt.d
new file mode 100644
index 0000000..0987614
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips16e2-mt.d
@@ -0,0 +1,21 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16e2 MT ASE instructions
+#as: -32 -mmt
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+[0-9a-f]+ <[^>]*> f0c0 3010 ehb
+[0-9a-f]+ <[^>]*> f026 6701 dmt
+[0-9a-f]+ <[^>]*> f026 6701 dmt
+[0-9a-f]+ <[^>]*> f022 6741 dmt v0
+[0-9a-f]+ <[^>]*> f027 6701 emt
+[0-9a-f]+ <[^>]*> f027 6701 emt
+[0-9a-f]+ <[^>]*> f023 6741 emt v0
+[0-9a-f]+ <[^>]*> f026 6700 dvpe
+[0-9a-f]+ <[^>]*> f026 6700 dvpe
+[0-9a-f]+ <[^>]*> f022 6740 dvpe v0
+[0-9a-f]+ <[^>]*> f027 6700 evpe
+[0-9a-f]+ <[^>]*> f027 6700 evpe
+[0-9a-f]+ <[^>]*> f023 6740 evpe v0
+ \.\.\.
diff --git a/gas/testsuite/gas/mips/mips16e2-mt.s b/gas/testsuite/gas/mips/mips16e2-mt.s
new file mode 100644
index 0000000..ea8032c
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips16e2-mt.s
@@ -0,0 +1,21 @@
+ .set mips16
+foo:
+ ehb
+
+ dmt
+ dmt $0
+ dmt $2
+ emt
+ emt $0
+ emt $2
+
+ dvpe
+ dvpe $0
+ dvpe $2
+ evpe
+ evpe $0
+ evpe $2
+
+# Force some (non-delay-slot) zero bytes, to make 'objdump' print ...
+ .space 16
+ .align 4, 0
diff --git a/gas/testsuite/gas/mips/mips16e2-reloc-error.d b/gas/testsuite/gas/mips/mips16e2-reloc-error.d
new file mode 100644
index 0000000..705fff2
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips16e2-reloc-error.d
@@ -0,0 +1,4 @@
+#objdump: -dr --prefix-addresses --show-raw-insn
+#name: MIPS16e2 relocation errors
+#as: -32 -mips64r2 -mmips16e2
+#error-output: mips16e2-reloc-error.l
diff --git a/gas/testsuite/gas/mips/mips16e2-reloc-error.l b/gas/testsuite/gas/mips/mips16e2-reloc-error.l
new file mode 100644
index 0000000..5e23abd
--- /dev/null
+++ b/gas/testsuite/gas/mips/mips16e2-reloc-error.l
@@ -0,0 +1,18 @@
+.*: Assembler messages:
+.*:11: Error: operand 3 must be constant `ext \$3,\$2,%lo\(bar\),16'
+.*:12: Error: operand 4 must be constant `ext \$3,\$2,16,%lo\(bar\)'
+.*:13: Error: operand 3 must be constant `ins \$3,\$2,%lo\(bar\),16'
+.*:14: Error: operand 4 must be constant `ins \$3,\$2,16,%lo\(bar\)'
+.*:15: Error: operand 3 must be constant `ins \$2,\$0,%lo\(bar\),16'
+.*:16: Error: operand 4 must be constant `ins \$2,\$0,16,%lo\(bar\)'
+.*:18: Error: operand 1 must be constant `sync %lo\(bar\)'
+.*:20: Error: operand 2 must be constant `ll \$3,%lo\(bar\)\(\$2\)'
+.*:21: Error: operand 2 must be constant `lwl \$3,%lo\(bar\)\(\$2\)'
+.*:22: Error: operand 2 must be constant `lwr \$3,%lo\(bar\)\(\$2\)'
+.*:23: Error: operand 2 must be constant `sc \$3,%lo\(bar\)\(\$2\)'
+.*:24: Error: operand 2 must be constant `swl \$3,%lo\(bar\)\(\$2\)'
+.*:25: Error: operand 2 must be constant `swr \$3,%lo\(bar\)\(\$2\)'
+.*:27: Error: operand 2 must be constant `cache 3,%lo\(bar\)\(\$2\)'
+.*:28: Error: operand 2 must be constant `pref 3,%lo\(bar\)\(\$2\)'
+.*:30: Error: operand 3 must be constant `mfc0 \$3,\$2,%lo\(bar\)'
+.*:31: Error: operand 3 must be constant `mtc0 \$3,\$2,%lo\(bar\)'
diff --git a/gas/testsuite/gas/mips/mips16e2-reloc-error.s b/gas/testsuite/gas/mips/mips16e2-reloc-error.s
new file mode 100644
index 0000000..17657c0
--- /dev/null
+++ b/gas/tests[...]
[diff truncated at 100000 bytes]