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[binutils-gdb] MIPS/GAS: Implement microMIPS branch/jump compaction
- From: Maciej W.Rozycki <macro at sourceware dot org>
- To: bfd-cvs at sourceware dot org
- Date: 27 Jul 2016 16:49:39 -0000
- Subject: [binutils-gdb] MIPS/GAS: Implement microMIPS branch/jump compaction
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=7bd374a44d1db21b54a9a52ecde1d064cdaa8cd1
commit 7bd374a44d1db21b54a9a52ecde1d064cdaa8cd1
Author: Maciej W. Rozycki <macro@imgtec.com>
Date: Wed Jul 27 17:27:55 2016 +0100
MIPS/GAS: Implement microMIPS branch/jump compaction
Convert microMIPS branches and jumps whose delay slot would be filled by
a generated NOP instruction to the corresponding compact form where one
exists, in a manner similar to MIPS16 JR->JRC and JALR->JALRC swap.
Do so even where the transformation switches from a 16-bit to a 32-bit
branch encoding for no benefit in code size reduction, as this is still
advantageous. This is because a branch/NOP pair takes 2 pipeline slots
or a 2-cycle completion latency except in superscalar implementations.
Whereas a compact branch may or may not stall on its target fetch, so it
will at most have a 2-cycle completion latency and may have only 1 even
in scalar implementations, and in superscalar implementations it is
expected to have no worse latency as a branch/NOP pair has. Also it
won't stall and therefore take the extra latency cycle in the not-taken
case.
Technically this is the same as MIPS16 compaction: for the qualifying
instruction encodings the APPEND_ADD_COMPACT machine code generation
method is selected where APPEND_ADD_WITH_NOP otherwise would and tells
the code generator in `append_insn' to convert the regular form of an
instruction to its corresponding compact form. For this the opcode is
tweaked as necessary and the microMIPS opcode table is scanned for the
matching updated instruction. A non-$0 `rt' operand to BEQ and BNE
instructions is moved to the `rs' operand field of BEQZC and BNEZC
encodings as required.
Unlike with MIPS16 compaction however we need to handle out-of-distance
branch relaxation as well. We do this by deferring the generation of
any delay-slot NOP required to relaxation made in `md_convert_frag', by
converting the APPEND_ADD_WITH_NOP machine code generation to APPEND_ADD
where a relaxed instruction is recorded. Relaxation then, depending on
actual code produced, chooses between either using a compact branch or
jump encoding and emitting the NOP outstanding if no compact encoding is
possible.
For code simplicity's sake the relaxation pass is retained even if the
principle of preferring a compact encoding to a 16-bit branch/NOP pair
means, in the absence of out-of-range branch relaxation, that a single
compact branch machine code instruction will eventually be produced from
a given assembly source instruction.
gas/
* config/tc-mips.c (RELAX_MICROMIPS_ENCODE): Add `nods' flag.
(RELAX_MICROMIPS_RELAX32, RELAX_MICROMIPS_TOOFAR16)
(RELAX_MICROMIPS_MARK_TOOFAR16, RELAX_MICROMIPS_CLEAR_TOOFAR16)
(RELAX_MICROMIPS_TOOFAR32, RELAX_MICROMIPS_MARK_TOOFAR32)
(RELAX_MICROMIPS_CLEAR_TOOFAR32): Shift bits.
(get_append_method): Also return APPEND_ADD_COMPACT for
microMIPS instructions.
(find_altered_mips16_opcode): Exclude macros from matching.
Factor code out...
(find_altered_opcode): ... to this new function.
(find_altered_micromips_opcode): New function.
(frag_branch_delay_slot_size): Likewise.
(append_insn): Handle microMIPS branch/jump compaction.
(macro_start): Likewise.
(relaxed_micromips_32bit_branch_length): Likewise.
(md_convert_frag): Likewise.
* testsuite/gas/mips/micromips.s: Add conditional explicit NOPs
for delay slot filling.
* testsuite/gas/mips/micromips-b16.s: Add explicit NOPs for
delay slot filling.
* testsuite/gas/mips/micromips-size-1.s: Likewise.
* testsuite/gas/mips/micromips.l: Adjust line numbers.
* testsuite/gas/mips/micromips-warn.l: Likewise.
* testsuite/gas/mips/micromips-size-1.l: Likewise.
* testsuite/gas/mips/micromips.d: Adjust padding.
* testsuite/gas/mips/micromips-trap.d: Likewise.
* testsuite/gas/mips/micromips-insn32.d: Likewise.
* testsuite/gas/mips/micromips-noinsn32.d: Likewise.
* testsuite/gas/mips/micromips@beq.d: Update patterns for
branch/jump compaction.
* testsuite/gas/mips/micromips@bge.d: Likewise.
* testsuite/gas/mips/micromips@bgeu.d: Likewise.
* testsuite/gas/mips/micromips@blt.d: Likewise.
* testsuite/gas/mips/micromips@bltu.d: Likewise.
* testsuite/gas/mips/micromips@branch-misc-4.d: Likewise.
* testsuite/gas/mips/micromips@branch-misc-4-64.d: Likewise.
* testsuite/gas/mips/micromips@branch-misc-5.d: Likewise.
* testsuite/gas/mips/micromips@branch-misc-5pic.d: Likewise.
* testsuite/gas/mips/micromips@branch-misc-5-64.d: Likewise.
* testsuite/gas/mips/micromips@branch-misc-5pic-64.d: Likewise.
* testsuite/gas/mips/micromips@jal-svr4pic-local.d: Likewise.
* testsuite/gas/mips/micromips@jal-svr4pic-local-n32.d:
Likewise.
* testsuite/gas/mips/micromips@jal-svr4pic-local-n64.d:
Likewise.
* testsuite/gas/mips/micromips@loc-swap.d: Likewise.
* testsuite/gas/mips/micromips@loc-swap-dis.d: Likewise.
* testsuite/gas/mips/micromips@relax.d: Likewise.
* testsuite/gas/mips/micromips@relax-at.d: Likewise.
* testsuite/gas/mips/micromips@relax-swap3.d: Likewise.
* testsuite/gas/mips/branch-extern-2.d: Likewise.
* testsuite/gas/mips/branch-extern-4.d: Likewise.
* testsuite/gas/mips/branch-section-2.d: Likewise.
* testsuite/gas/mips/branch-section-4.d: Likewise.
* testsuite/gas/mips/branch-weak-2.d: Likewise.
* testsuite/gas/mips/branch-weak-5.d: Likewise.
* testsuite/gas/mips/micromips-branch-absolute.d: Likewise.
* testsuite/gas/mips/micromips-branch-absolute-n32.d: Likewise.
* testsuite/gas/mips/micromips-branch-absolute-n64.d: Likewise.
* testsuite/gas/mips/micromips-branch-absolute-addend.d:
Likewise.
* testsuite/gas/mips/micromips-branch-absolute-addend-n32.d:
Likewise.
* testsuite/gas/mips/micromips-branch-absolute-addend-n64.d:
Likewise.
* testsuite/gas/mips/micromips-compact.d: New test.
* testsuite/gas/mips/mips.exp: Run the new test.
ld/
* testsuite/ld-mips-elf/micromips-branch-absolute.d: Update
patterns for branch compaction.
* testsuite/ld-mips-elf/micromips-branch-absolute-addend.d:
Likewise.
opcodes/
* micromips-opc.c (micromips_opcodes): Reorder "bc" next to "b",
"beqzc" next to "beq", "bnezc" next to "bne" and "jrc" next to
"j".
Diff:
---
gas/ChangeLog | 70 +
gas/config/tc-mips.c | 254 +-
gas/testsuite/gas/mips/branch-extern-2.d | 3 +-
gas/testsuite/gas/mips/branch-extern-4.d | 3 +-
gas/testsuite/gas/mips/branch-section-2.d | 6 +-
gas/testsuite/gas/mips/branch-section-4.d | 3 +-
gas/testsuite/gas/mips/branch-weak-2.d | 3 +-
gas/testsuite/gas/mips/branch-weak-5.d | 3 +-
gas/testsuite/gas/mips/micromips-b16.s | 6 +
.../mips/micromips-branch-absolute-addend-n32.d | 13 +-
.../mips/micromips-branch-absolute-addend-n64.d | 13 +-
.../gas/mips/micromips-branch-absolute-addend.d | 13 +-
.../gas/mips/micromips-branch-absolute-n32.d | 13 +-
.../gas/mips/micromips-branch-absolute-n64.d | 13 +-
gas/testsuite/gas/mips/micromips-branch-absolute.d | 13 +-
gas/testsuite/gas/mips/micromips-compact.d | 7710 ++++++++++++++++++++
gas/testsuite/gas/mips/micromips-insn32.d | 2 +
gas/testsuite/gas/mips/micromips-noinsn32.d | 2 +-
gas/testsuite/gas/mips/micromips-size-1.l | 14 +-
gas/testsuite/gas/mips/micromips-size-1.s | 8 +
gas/testsuite/gas/mips/micromips-trap.d | 2 +-
gas/testsuite/gas/mips/micromips-warn.l | 52 +-
gas/testsuite/gas/mips/micromips.d | 2 +-
gas/testsuite/gas/mips/micromips.l | 212 +-
gas/testsuite/gas/mips/micromips.s | 91 +
gas/testsuite/gas/mips/micromips@beq.d | 44 +-
gas/testsuite/gas/mips/micromips@bge.d | 70 +-
gas/testsuite/gas/mips/micromips@bgeu.d | 64 +-
gas/testsuite/gas/mips/micromips@blt.d | 70 +-
gas/testsuite/gas/mips/micromips@bltu.d | 64 +-
.../gas/mips/micromips@branch-misc-4-64.d | 12 +-
gas/testsuite/gas/mips/micromips@branch-misc-4.d | 12 +-
.../gas/mips/micromips@branch-misc-5-64.d | 22 +-
gas/testsuite/gas/mips/micromips@branch-misc-5.d | 14 +-
.../gas/mips/micromips@branch-misc-5pic-64.d | 22 +-
.../gas/mips/micromips@branch-misc-5pic.d | 14 +-
.../gas/mips/micromips@jal-svr4pic-local-n32.d | 3 +-
.../gas/mips/micromips@jal-svr4pic-local-n64.d | 3 +-
.../gas/mips/micromips@jal-svr4pic-local.d | 3 +-
gas/testsuite/gas/mips/micromips@loc-swap-dis.d | 6 +-
gas/testsuite/gas/mips/micromips@loc-swap.d | 30 +-
gas/testsuite/gas/mips/micromips@relax-at.d | 98 +-
gas/testsuite/gas/mips/micromips@relax-swap3.d | 7 +-
gas/testsuite/gas/mips/micromips@relax.d | 98 +-
gas/testsuite/gas/mips/mips.exp | 1 +
ld/ChangeLog | 7 +
.../ld-mips-elf/micromips-branch-absolute-addend.d | 13 +-
.../ld-mips-elf/micromips-branch-absolute.d | 13 +-
opcodes/ChangeLog | 6 +
opcodes/micromips-opc.c | 22 +-
50 files changed, 8579 insertions(+), 663 deletions(-)
diff --git a/gas/ChangeLog b/gas/ChangeLog
index c2d132e..0273942 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,73 @@
+2016-07-27 Maciej W. Rozycki <macro@imgtec.com>
+
+ * config/tc-mips.c (RELAX_MICROMIPS_ENCODE): Add `nods' flag.
+ (RELAX_MICROMIPS_RELAX32, RELAX_MICROMIPS_TOOFAR16)
+ (RELAX_MICROMIPS_MARK_TOOFAR16, RELAX_MICROMIPS_CLEAR_TOOFAR16)
+ (RELAX_MICROMIPS_TOOFAR32, RELAX_MICROMIPS_MARK_TOOFAR32)
+ (RELAX_MICROMIPS_CLEAR_TOOFAR32): Shift bits.
+ (get_append_method): Also return APPEND_ADD_COMPACT for
+ microMIPS instructions.
+ (find_altered_mips16_opcode): Exclude macros from matching.
+ Factor code out...
+ (find_altered_opcode): ... to this new function.
+ (find_altered_micromips_opcode): New function.
+ (frag_branch_delay_slot_size): Likewise.
+ (append_insn): Handle microMIPS branch/jump compaction.
+ (macro_start): Likewise.
+ (relaxed_micromips_32bit_branch_length): Likewise.
+ (md_convert_frag): Likewise.
+ * testsuite/gas/mips/micromips.s: Add conditional explicit NOPs
+ for delay slot filling.
+ * testsuite/gas/mips/micromips-b16.s: Add explicit NOPs for
+ delay slot filling.
+ * testsuite/gas/mips/micromips-size-1.s: Likewise.
+ * testsuite/gas/mips/micromips.l: Adjust line numbers.
+ * testsuite/gas/mips/micromips-warn.l: Likewise.
+ * testsuite/gas/mips/micromips-size-1.l: Likewise.
+ * testsuite/gas/mips/micromips.d: Adjust padding.
+ * testsuite/gas/mips/micromips-trap.d: Likewise.
+ * testsuite/gas/mips/micromips-insn32.d: Likewise.
+ * testsuite/gas/mips/micromips-noinsn32.d: Likewise.
+ * testsuite/gas/mips/micromips@beq.d: Update patterns for
+ branch/jump compaction.
+ * testsuite/gas/mips/micromips@bge.d: Likewise.
+ * testsuite/gas/mips/micromips@bgeu.d: Likewise.
+ * testsuite/gas/mips/micromips@blt.d: Likewise.
+ * testsuite/gas/mips/micromips@bltu.d: Likewise.
+ * testsuite/gas/mips/micromips@branch-misc-4.d: Likewise.
+ * testsuite/gas/mips/micromips@branch-misc-4-64.d: Likewise.
+ * testsuite/gas/mips/micromips@branch-misc-5.d: Likewise.
+ * testsuite/gas/mips/micromips@branch-misc-5pic.d: Likewise.
+ * testsuite/gas/mips/micromips@branch-misc-5-64.d: Likewise.
+ * testsuite/gas/mips/micromips@branch-misc-5pic-64.d: Likewise.
+ * testsuite/gas/mips/micromips@jal-svr4pic-local.d: Likewise.
+ * testsuite/gas/mips/micromips@jal-svr4pic-local-n32.d:
+ Likewise.
+ * testsuite/gas/mips/micromips@jal-svr4pic-local-n64.d:
+ Likewise.
+ * testsuite/gas/mips/micromips@loc-swap.d: Likewise.
+ * testsuite/gas/mips/micromips@loc-swap-dis.d: Likewise.
+ * testsuite/gas/mips/micromips@relax.d: Likewise.
+ * testsuite/gas/mips/micromips@relax-at.d: Likewise.
+ * testsuite/gas/mips/micromips@relax-swap3.d: Likewise.
+ * testsuite/gas/mips/branch-extern-2.d: Likewise.
+ * testsuite/gas/mips/branch-extern-4.d: Likewise.
+ * testsuite/gas/mips/branch-section-2.d: Likewise.
+ * testsuite/gas/mips/branch-section-4.d: Likewise.
+ * testsuite/gas/mips/branch-weak-2.d: Likewise.
+ * testsuite/gas/mips/branch-weak-5.d: Likewise.
+ * testsuite/gas/mips/micromips-branch-absolute.d: Likewise.
+ * testsuite/gas/mips/micromips-branch-absolute-n32.d: Likewise.
+ * testsuite/gas/mips/micromips-branch-absolute-n64.d: Likewise.
+ * testsuite/gas/mips/micromips-branch-absolute-addend.d:
+ Likewise.
+ * testsuite/gas/mips/micromips-branch-absolute-addend-n32.d:
+ Likewise.
+ * testsuite/gas/mips/micromips-branch-absolute-addend-n64.d:
+ Likewise.
+ * testsuite/gas/mips/micromips-compact.d: New test.
+ * testsuite/gas/mips/mips.exp: Run the new test.
+
2016-07-27 Graham Markall <graham.markall@embecosm.com>
* config/tc-arc.c: Add new global arc_addrtype_hash.
diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
index 5768f18..224b9d0 100644
--- a/gas/config/tc-mips.c
+++ b/gas/config/tc-mips.c
@@ -1153,13 +1153,14 @@ static int mips_relax_branch;
code found in the opcode file for this relocation, the register
selected as the assembler temporary, whether in the 32-bit
instruction mode, whether the branch is unconditional, whether it is
- compact, whether it stores the link address implicitly in $ra,
- whether relaxation of out-of-range 32-bit branches to a sequence of
+ compact, whether there is no delay-slot instruction available to fill
+ in, whether it stores the link address implicitly in $ra, whether
+ relaxation of out-of-range 32-bit branches to a sequence of
instructions is enabled, and whether the displacement of a branch is
too large to fit as an immediate argument of a 16-bit and a 32-bit
branch, respectively. */
#define RELAX_MICROMIPS_ENCODE(type, at, insn32, \
- uncond, compact, link, \
+ uncond, compact, link, nods, \
relax32, toofar16, toofar32) \
(0x40000000 \
| ((type) & 0xff) \
@@ -1168,9 +1169,10 @@ static int mips_relax_branch;
| ((uncond) ? 0x4000 : 0) \
| ((compact) ? 0x8000 : 0) \
| ((link) ? 0x10000 : 0) \
- | ((relax32) ? 0x20000 : 0) \
- | ((toofar16) ? 0x40000 : 0) \
- | ((toofar32) ? 0x80000 : 0))
+ | ((nods) ? 0x20000 : 0) \
+ | ((relax32) ? 0x40000 : 0) \
+ | ((toofar16) ? 0x80000 : 0) \
+ | ((toofar32) ? 0x100000 : 0))
#define RELAX_MICROMIPS_P(i) (((i) & 0xc0000000) == 0x40000000)
#define RELAX_MICROMIPS_TYPE(i) ((i) & 0xff)
#define RELAX_MICROMIPS_AT(i) (((i) >> 8) & 0x1f)
@@ -1178,14 +1180,15 @@ static int mips_relax_branch;
#define RELAX_MICROMIPS_UNCOND(i) (((i) & 0x4000) != 0)
#define RELAX_MICROMIPS_COMPACT(i) (((i) & 0x8000) != 0)
#define RELAX_MICROMIPS_LINK(i) (((i) & 0x10000) != 0)
-#define RELAX_MICROMIPS_RELAX32(i) (((i) & 0x20000) != 0)
+#define RELAX_MICROMIPS_NODS(i) (((i) & 0x20000) != 0)
+#define RELAX_MICROMIPS_RELAX32(i) (((i) & 0x40000) != 0)
-#define RELAX_MICROMIPS_TOOFAR16(i) (((i) & 0x40000) != 0)
-#define RELAX_MICROMIPS_MARK_TOOFAR16(i) ((i) | 0x40000)
-#define RELAX_MICROMIPS_CLEAR_TOOFAR16(i) ((i) & ~0x40000)
-#define RELAX_MICROMIPS_TOOFAR32(i) (((i) & 0x80000) != 0)
-#define RELAX_MICROMIPS_MARK_TOOFAR32(i) ((i) | 0x80000)
-#define RELAX_MICROMIPS_CLEAR_TOOFAR32(i) ((i) & ~0x80000)
+#define RELAX_MICROMIPS_TOOFAR16(i) (((i) & 0x80000) != 0)
+#define RELAX_MICROMIPS_MARK_TOOFAR16(i) ((i) | 0x80000)
+#define RELAX_MICROMIPS_CLEAR_TOOFAR16(i) ((i) & ~0x80000)
+#define RELAX_MICROMIPS_TOOFAR32(i) (((i) & 0x100000) != 0)
+#define RELAX_MICROMIPS_MARK_TOOFAR32(i) ((i) | 0x100000)
+#define RELAX_MICROMIPS_CLEAR_TOOFAR32(i) ((i) & ~0x100000)
/* Sign-extend 16-bit value X. */
#define SEXT_16BIT(X) ((((X) + 0x8000) & 0xffff) - 0x8000)
@@ -6830,23 +6833,33 @@ get_append_method (struct mips_cl_insn *ip, expressionS *address_expr,
&& gpr_read_mask (ip) != 0)
return APPEND_ADD_COMPACT;
+ if (mips_opts.micromips
+ && ((ip->insn_opcode & 0xffe0) == 0x4580
+ || (!forced_insn_length
+ && ((ip->insn_opcode & 0xfc00) == 0xcc00
+ || (ip->insn_opcode & 0xdc00) == 0x8c00))
+ || (ip->insn_opcode & 0xdfe00000) == 0x94000000
+ || (ip->insn_opcode & 0xdc1f0000) == 0x94000000))
+ return APPEND_ADD_COMPACT;
+
return APPEND_ADD_WITH_NOP;
}
return APPEND_ADD;
}
-/* IP is a MIPS16 instruction whose opcode we have just changed.
- Point IP->insn_mo to the new opcode's definition. */
+/* IP is an instruction whose opcode we have just changed, END points
+ to the end of the opcode table processed. Point IP->insn_mo to the
+ new opcode's definition. */
static void
-find_altered_mips16_opcode (struct mips_cl_insn *ip)
+find_altered_opcode (struct mips_cl_insn *ip, const struct mips_opcode *end)
{
- const struct mips_opcode *mo, *end;
+ const struct mips_opcode *mo;
- end = &mips16_opcodes[bfd_mips16_num_opcodes];
for (mo = ip->insn_mo; mo < end; mo++)
- if ((ip->insn_opcode & mo->mask) == mo->match)
+ if (mo->pinfo != INSN_MACRO
+ && (ip->insn_opcode & mo->mask) == mo->match)
{
ip->insn_mo = mo;
return;
@@ -6854,6 +6867,24 @@ find_altered_mips16_opcode (struct mips_cl_insn *ip)
abort ();
}
+/* IP is a MIPS16 instruction whose opcode we have just changed.
+ Point IP->insn_mo to the new opcode's definition. */
+
+static void
+find_altered_mips16_opcode (struct mips_cl_insn *ip)
+{
+ find_altered_opcode (ip, &mips16_opcodes[bfd_mips16_num_opcodes]);
+}
+
+/* IP is a microMIPS instruction whose opcode we have just changed.
+ Point IP->insn_mo to the new opcode's definition. */
+
+static void
+find_altered_micromips_opcode (struct mips_cl_insn *ip)
+{
+ find_altered_opcode (ip, µmips_opcodes[bfd_micromips_num_opcodes]);
+}
+
/* For microMIPS macros, we need to generate a local number label
as the target of branches. */
#define MICROMIPS_LABEL_CHAR '\037'
@@ -7042,8 +7073,14 @@ append_insn (struct mips_cl_insn *ip, expressionS *address_expr,
prev_pinfo2 = history[0].insn_mo->pinfo2;
pinfo = ip->insn_mo->pinfo;
+ /* Don't raise alarm about `nods' frags as they'll fill in the right
+ kind of nop in relaxation if required. */
if (mips_opts.micromips
&& !expansionp
+ && !(history[0].frag
+ && history[0].frag->fr_type == rs_machine_dependent
+ && RELAX_MICROMIPS_P (history[0].frag->fr_subtype)
+ && RELAX_MICROMIPS_NODS (history[0].frag->fr_subtype))
&& (((prev_pinfo2 & INSN2_BRANCH_DELAY_16BIT) != 0
&& micromips_insn_length (ip->insn_mo) != 2)
|| ((prev_pinfo2 & INSN2_BRANCH_DELAY_32BIT) != 0
@@ -7293,21 +7330,26 @@ append_insn (struct mips_cl_insn *ip, expressionS *address_expr,
16-bit/32-bit instructions. */
&& !forced_insn_length)
{
- bfd_boolean relax16 = *reloc_type > BFD_RELOC_UNUSED;
+ bfd_boolean relax16 = (method != APPEND_ADD_COMPACT
+ && *reloc_type > BFD_RELOC_UNUSED);
int type = relax16 ? *reloc_type - BFD_RELOC_UNUSED : 0;
int uncond = uncond_branch_p (ip) ? -1 : 0;
- int compact = compact_branch_p (ip);
+ int compact = compact_branch_p (ip) || method == APPEND_ADD_COMPACT;
+ int nods = method == APPEND_ADD_WITH_NOP;
int al = pinfo & INSN_WRITE_GPR_31;
- int length32;
+ int length32 = nods ? 8 : 4;
gas_assert (address_expr != NULL);
gas_assert (!mips_relax.sequence);
relaxed_branch = TRUE;
- length32 = relaxed_micromips_32bit_branch_length (NULL, NULL, uncond);
- add_relaxed_insn (ip, relax32 ? length32 : 4, relax16 ? 2 : 4,
+ if (nods)
+ method = APPEND_ADD;
+ if (relax32)
+ length32 = relaxed_micromips_32bit_branch_length (NULL, NULL, uncond);
+ add_relaxed_insn (ip, length32, relax16 ? 2 : 4,
RELAX_MICROMIPS_ENCODE (type, AT, mips_opts.insn32,
- uncond, compact, al,
+ uncond, compact, al, nods,
relax32, 0, 0),
address_expr->X_add_symbol,
address_expr->X_add_number);
@@ -7512,9 +7554,50 @@ append_insn (struct mips_cl_insn *ip, expressionS *address_expr,
case APPEND_ADD_COMPACT:
/* Convert MIPS16 jr/jalr into a "compact" jump. */
- gas_assert (mips_opts.mips16);
- ip->insn_opcode |= 0x0080;
- find_altered_mips16_opcode (ip);
+ if (mips_opts.mips16)
+ {
+ ip->insn_opcode |= 0x0080;
+ find_altered_mips16_opcode (ip);
+ }
+ /* Convert microMIPS instructions. */
+ else if (mips_opts.micromips)
+ {
+ /* jr16->jrc */
+ if ((ip->insn_opcode & 0xffe0) == 0x4580)
+ ip->insn_opcode |= 0x0020;
+ /* b16->bc */
+ else if ((ip->insn_opcode & 0xfc00) == 0xcc00)
+ ip->insn_opcode = 0x40e00000;
+ /* beqz16->beqzc, bnez16->bnezc */
+ else if ((ip->insn_opcode & 0xdc00) == 0x8c00)
+ {
+ unsigned long regno;
+
+ regno = ip->insn_opcode >> MICROMIPSOP_SH_MD;
+ regno &= MICROMIPSOP_MASK_MD;
+ regno = micromips_to_32_reg_d_map[regno];
+ ip->insn_opcode = (((ip->insn_opcode << 9) & 0x00400000)
+ | (regno << MICROMIPSOP_SH_RS)
+ | 0x40a00000) ^ 0x00400000;
+ }
+ /* beqz->beqzc, bnez->bnezc */
+ else if ((ip->insn_opcode & 0xdfe00000) == 0x94000000)
+ ip->insn_opcode = ((ip->insn_opcode & 0x001f0000)
+ | ((ip->insn_opcode >> 7) & 0x00400000)
+ | 0x40a00000) ^ 0x00400000;
+ /* beq $0->beqzc, bne $0->bnezc */
+ else if ((ip->insn_opcode & 0xdc1f0000) == 0x94000000)
+ ip->insn_opcode = (((ip->insn_opcode >>
+ (MICROMIPSOP_SH_RT - MICROMIPSOP_SH_RS))
+ & (MICROMIPSOP_MASK_RS << MICROMIPSOP_SH_RS))
+ | ((ip->insn_opcode >> 7) & 0x00400000)
+ | 0x40a00000) ^ 0x00400000;
+ else
+ abort ();
+ find_altered_micromips_opcode (ip);
+ }
+ else
+ abort ();
install_insn (ip);
insert_into_history (0, 1, ip);
break;
@@ -8274,19 +8357,25 @@ macro_start (void)
memset (&mips_macro_warning.insns, 0, sizeof (mips_macro_warning.insns));
mips_macro_warning.delay_slot_p = (mips_opts.noreorder
&& delayed_branch_p (&history[0]));
- switch (history[0].insn_mo->pinfo2
- & (INSN2_BRANCH_DELAY_32BIT | INSN2_BRANCH_DELAY_16BIT))
- {
- case INSN2_BRANCH_DELAY_32BIT:
- mips_macro_warning.delay_slot_length = 4;
- break;
- case INSN2_BRANCH_DELAY_16BIT:
- mips_macro_warning.delay_slot_length = 2;
- break;
- default:
- mips_macro_warning.delay_slot_length = 0;
- break;
- }
+ if (history[0].frag
+ && history[0].frag->fr_type == rs_machine_dependent
+ && RELAX_MICROMIPS_P (history[0].frag->fr_subtype)
+ && RELAX_MICROMIPS_NODS (history[0].frag->fr_subtype))
+ mips_macro_warning.delay_slot_length = 0;
+ else
+ switch (history[0].insn_mo->pinfo2
+ & (INSN2_BRANCH_DELAY_32BIT | INSN2_BRANCH_DELAY_16BIT))
+ {
+ case INSN2_BRANCH_DELAY_32BIT:
+ mips_macro_warning.delay_slot_length = 4;
+ break;
+ case INSN2_BRANCH_DELAY_16BIT:
+ mips_macro_warning.delay_slot_length = 2;
+ break;
+ default:
+ mips_macro_warning.delay_slot_length = 0;
+ break;
+ }
mips_macro_warning.first_frag = NULL;
}
@@ -17185,6 +17274,21 @@ relaxed_branch_length (fragS *fragp, asection *sec, int update)
return length;
}
+/* Get a FRAG's branch instruction delay slot size, either from the
+ short-delay-slot bit of a branch-and-link instruction if AL is TRUE,
+ or SHORT_INSN_SIZE otherwise. */
+
+static int
+frag_branch_delay_slot_size (fragS *fragp, bfd_boolean al, int short_insn_size)
+{
+ char *buf = fragp->fr_literal + fragp->fr_fix;
+
+ if (al)
+ return (read_compressed_insn (buf, 4) & 0x02000000) ? 2 : 4;
+ else
+ return short_insn_size;
+}
+
/* Compute the length of a branch sequence, and adjust the
RELAX_MICROMIPS_TOOFAR32 bit accordingly. If FRAGP is NULL, the
worst-case length is computed, with UPDATE being used to indicate
@@ -17194,9 +17298,21 @@ relaxed_branch_length (fragS *fragp, asection *sec, int update)
static int
relaxed_micromips_32bit_branch_length (fragS *fragp, asection *sec, int update)
{
+ bfd_boolean insn32 = TRUE;
+ bfd_boolean nods = TRUE;
+ bfd_boolean al = TRUE;
+ int short_insn_size;
bfd_boolean toofar;
int length;
+ if (fragp)
+ {
+ insn32 = RELAX_MICROMIPS_INSN32 (fragp->fr_subtype);
+ nods = RELAX_MICROMIPS_NODS (fragp->fr_subtype);
+ al = RELAX_MICROMIPS_LINK (fragp->fr_subtype);
+ }
+ short_insn_size = insn32 ? 4 : 2;
+
if (fragp
&& S_IS_DEFINED (fragp->fr_symbol)
&& !S_IS_WEAK (fragp->fr_symbol)
@@ -17233,19 +17349,15 @@ relaxed_micromips_32bit_branch_length (fragS *fragp, asection *sec, int update)
{
bfd_boolean compact_known = fragp != NULL;
bfd_boolean compact = FALSE;
- bfd_boolean insn32 = TRUE;
bfd_boolean uncond;
- int short_insn_size;
if (fragp)
{
compact = RELAX_MICROMIPS_COMPACT (fragp->fr_subtype);
uncond = RELAX_MICROMIPS_UNCOND (fragp->fr_subtype);
- insn32 = RELAX_MICROMIPS_INSN32 (fragp->fr_subtype);
}
else
uncond = update < 0;
- short_insn_size = insn32 ? 4 : 2;
/* If label is out of range, we turn branch <br>:
@@ -17275,6 +17387,13 @@ relaxed_micromips_32bit_branch_length (fragS *fragp, asection *sec, int update)
if (mips_pic != NO_PIC)
length += 4 + short_insn_size;
+ /* Add an extra nop if the jump has no compact form and we need
+ to fill the delay slot. */
+ if ((mips_pic == NO_PIC || al) && nods)
+ length += (fragp
+ ? frag_branch_delay_slot_size (fragp, al, short_insn_size)
+ : short_insn_size);
+
/* If branch <br> is conditional, we prepend negated branch <brneg>:
<brneg> 0f # 4 bytes
@@ -17283,6 +17402,12 @@ relaxed_micromips_32bit_branch_length (fragS *fragp, asection *sec, int update)
if (!uncond)
length += (compact_known && compact) ? 4 : 4 + short_insn_size;
}
+ else if (nods)
+ {
+ /* Add an extra nop to fill the delay slot. */
+ gas_assert (fragp);
+ length += frag_branch_delay_slot_size (fragp, al, short_insn_size);
+ }
return length;
}
@@ -17847,6 +17972,7 @@ md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, segT asec, fragS *fragp)
char *buf = fragp->fr_literal + fragp->fr_fix;
bfd_boolean compact = RELAX_MICROMIPS_COMPACT (fragp->fr_subtype);
bfd_boolean insn32 = RELAX_MICROMIPS_INSN32 (fragp->fr_subtype);
+ bfd_boolean nods = RELAX_MICROMIPS_NODS (fragp->fr_subtype);
bfd_boolean al = RELAX_MICROMIPS_LINK (fragp->fr_subtype);
int type = RELAX_MICROMIPS_TYPE (fragp->fr_subtype);
bfd_boolean short_ds;
@@ -17898,7 +18024,22 @@ md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, segT asec, fragS *fragp)
fixp->fx_line = fragp->fr_line;
if (type == 0)
- return;
+ {
+ insn = read_compressed_insn (buf, 4);
+ buf += 4;
+
+ if (nods)
+ {
+ /* Check the short-delay-slot bit. */
+ if (!al || (insn & 0x02000000) != 0)
+ buf = write_compressed_insn (buf, 0x0c00, 2);
+ else
+ buf = write_compressed_insn (buf, 0x00000000, 4);
+ }
+
+ gas_assert (buf == fragp->fr_literal + fragp->fr_fix);
+ return;
+ }
}
/* Relax 16-bit branches to 32-bit branches. */
@@ -17925,6 +18066,8 @@ md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, segT asec, fragS *fragp)
|| !RELAX_MICROMIPS_TOOFAR32 (fragp->fr_subtype))
{
buf = write_compressed_insn (buf, insn, 4);
+ if (nods)
+ buf = write_compressed_insn (buf, 0x0c00, 2);
gas_assert (buf == fragp->fr_literal + fragp->fr_fix);
return;
}
@@ -17937,7 +18080,7 @@ md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, segT asec, fragS *fragp)
_("relaxed out-of-range branch into a jump"));
/* Set the short-delay-slot bit. */
- short_ds = al && (insn & 0x02000000) != 0;
+ short_ds = !al || (insn & 0x02000000) != 0;
if (!RELAX_MICROMIPS_UNCOND (fragp->fr_subtype))
{
@@ -18007,7 +18150,8 @@ md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, segT asec, fragS *fragp)
if (mips_pic == NO_PIC)
{
- unsigned long jal = short_ds ? 0x74000000 : 0xf4000000; /* jal/s */
+ unsigned long jal = (short_ds || nods
+ ? 0x74000000 : 0xf4000000); /* jal/s */
/* j/jal/jals <sym> R_MICROMIPS_26_S1 */
insn = al ? jal : 0xd4000000;
@@ -18019,7 +18163,7 @@ md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, segT asec, fragS *fragp)
buf = write_compressed_insn (buf, insn, 4);
- if (compact)
+ if (compact || nods)
{
/* nop */
if (insn32)
@@ -18068,7 +18212,7 @@ md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, segT asec, fragS *fragp)
buf = write_compressed_insn (buf, insn, 4);
- if (compact)
+ if (compact || nods)
/* nop */
buf = write_compressed_insn (buf, 0x00000000, 4);
}
@@ -18076,12 +18220,20 @@ md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, segT asec, fragS *fragp)
{
/* jr/jrc/jalr/jalrs $at */
unsigned long jalr = short_ds ? 0x45e0 : 0x45c0; /* jalr/s */
- unsigned long jr = compact ? 0x45a0 : 0x4580; /* jr/c */
+ unsigned long jr = compact || nods ? 0x45a0 : 0x4580; /* jr/c */
insn = al ? jalr : jr;
insn |= at << MICROMIPSOP_SH_MJ;
buf = write_compressed_insn (buf, insn, 2);
+ if (al && nods)
+ {
+ /* nop */
+ if (short_ds)
+ buf = write_compressed_insn (buf, 0x0c00, 2);
+ else
+ buf = write_compressed_insn (buf, 0x00000000, 4);
+ }
}
}
diff --git a/gas/testsuite/gas/mips/branch-extern-2.d b/gas/testsuite/gas/mips/branch-extern-2.d
index b0bab70..4c0078f 100644
--- a/gas/testsuite/gas/mips/branch-extern-2.d
+++ b/gas/testsuite/gas/mips/branch-extern-2.d
@@ -6,7 +6,6 @@
.*: +file format .*mips.*
Disassembly of section \.text:
-[0-9a-f]+ <[^>]*> 9400 fffe b 00000000 <foo>
+[0-9a-f]+ <[^>]*> 40e0 fffe bc 00000000 <foo>
[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 bar
-[0-9a-f]+ <[^>]*> 0c00 nop
\.\.\.
diff --git a/gas/testsuite/gas/mips/branch-extern-4.d b/gas/testsuite/gas/mips/branch-extern-4.d
index 6718271..f3b1df3 100644
--- a/gas/testsuite/gas/mips/branch-extern-4.d
+++ b/gas/testsuite/gas/mips/branch-extern-4.d
@@ -11,6 +11,5 @@ Disassembly of section \.text:
[ ]*[0-9a-f]+: R_MICROMIPS_GOT16 bar
[0-9a-f]+ <[^>]*> 3021 0000 addiu at,at,0
[ ]*[0-9a-f]+: R_MICROMIPS_LO16 bar
-[0-9a-f]+ <[^>]*> 4581 jr at
-[0-9a-f]+ <[^>]*> 0c00 nop
+[0-9a-f]+ <[^>]*> 45a1 jrc at
\.\.\.
diff --git a/gas/testsuite/gas/mips/branch-section-2.d b/gas/testsuite/gas/mips/branch-section-2.d
index 5de7cec..6009fe5 100644
--- a/gas/testsuite/gas/mips/branch-section-2.d
+++ b/gas/testsuite/gas/mips/branch-section-2.d
@@ -6,12 +6,10 @@
.*: +file format .*mips.*
Disassembly of section \.text:
-[0-9a-f]+ <[^>]*> 9400 fffe b 00000000 <foo>
+[0-9a-f]+ <[^>]*> 40e0 fffe bc 00000000 <foo>
[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 bar
-[0-9a-f]+ <[^>]*> 0c00 nop
\.\.\.
Disassembly of section \.init:
-[0-9a-f]+ <[^>]*> 459f jr ra
-[0-9a-f]+ <[^>]*> 0c00 nop
+[0-9a-f]+ <[^>]*> 45bf jrc ra
\.\.\.
diff --git a/gas/testsuite/gas/mips/branch-section-4.d b/gas/testsuite/gas/mips/branch-section-4.d
index 6eb2b6d..4626da0 100644
--- a/gas/testsuite/gas/mips/branch-section-4.d
+++ b/gas/testsuite/gas/mips/branch-section-4.d
@@ -13,6 +13,5 @@ Disassembly of section \.text:
\.\.\.
Disassembly of section \.init:
-[0-9a-f]+ <[^>]*> 459f jr ra
-[0-9a-f]+ <[^>]*> 0c00 nop
+[0-9a-f]+ <[^>]*> 45bf jrc ra
\.\.\.
diff --git a/gas/testsuite/gas/mips/branch-weak-2.d b/gas/testsuite/gas/mips/branch-weak-2.d
index d97bace..61a10e0 100644
--- a/gas/testsuite/gas/mips/branch-weak-2.d
+++ b/gas/testsuite/gas/mips/branch-weak-2.d
@@ -6,9 +6,8 @@
.*: +file format .*mips.*
Disassembly of section \.text:
-[0-9a-f]+ <[^>]*> 9400 fffe b 00000000 <foo>
+[0-9a-f]+ <[^>]*> 40e0 fffe bc 00000000 <foo>
[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 bar
-[0-9a-f]+ <[^>]*> 0c00 nop
\.\.\.
[0-9a-f]+ <[^>]*> 459f jr ra
[0-9a-f]+ <[^>]*> 0c00 nop
diff --git a/gas/testsuite/gas/mips/branch-weak-5.d b/gas/testsuite/gas/mips/branch-weak-5.d
index caeee97..13d8bdf 100644
--- a/gas/testsuite/gas/mips/branch-weak-5.d
+++ b/gas/testsuite/gas/mips/branch-weak-5.d
@@ -6,9 +6,8 @@
.*: +file format .*mips.*
Disassembly of section \.text:
-[0-9a-f]+ <[^>]*> 9400 fffe b 00000000 <foo>
+[0-9a-f]+ <[^>]*> 40e0 fffe bc 00000000 <foo>
[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 bar
-[0-9a-f]+ <[^>]*> 0c00 nop
\.\.\.
[0-9a-f]+ <[^>]*> 459f jr ra
[0-9a-f]+ <[^>]*> 0c00 nop
diff --git a/gas/testsuite/gas/mips/micromips-b16.s b/gas/testsuite/gas/mips/micromips-b16.s
index ddfeaf4..780d549 100644
--- a/gas/testsuite/gas/mips/micromips-b16.s
+++ b/gas/testsuite/gas/mips/micromips-b16.s
@@ -2,16 +2,22 @@
test1:
.space 65536
test2:
+ nop
b16 1f
1:
+ nop
bnez16 $2,1f
1:
+ nop
beqz16 $2,1f
1:
+ nop
b 1f
1:
+ nop
bnez $2,1f
1:
+ nop
beqz $2,1f
1:
nop
diff --git a/gas/testsuite/gas/mips/micromips-branch-absolute-addend-n32.d b/gas/testsuite/gas/mips/micromips-branch-absolute-addend-n32.d
index 4f630f0..8406581 100644
--- a/gas/testsuite/gas/mips/micromips-branch-absolute-addend-n32.d
+++ b/gas/testsuite/gas/mips/micromips-branch-absolute-addend-n32.d
@@ -7,20 +7,17 @@
Disassembly of section \.text:
\.\.\.
-[0-9a-f]+ <[^>]*> 9400 0000 b 00001004 <foo\+0x4>
+[0-9a-f]+ <[^>]*> 40e0 0000 bc 00001004 <foo\+0x4>
[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 \*ABS\*\+0x123468a9
-[0-9a-f]+ <[^>]*> 0c00 nop
-[0-9a-f]+ <[^>]*> 4060 0000 bal 0000100a <foo\+0xa>
+[0-9a-f]+ <[^>]*> 4060 0000 bal 00001008 <foo\+0x8>
[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 \*ABS\*\+0x123468a9
[0-9a-f]+ <[^>]*> 0000 0000 nop
-[0-9a-f]+ <[^>]*> 4020 0000 bltzal zero,00001012 <foo\+0x12>
+[0-9a-f]+ <[^>]*> 4020 0000 bltzal zero,00001010 <foo\+0x10>
[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 \*ABS\*\+0x123468a9
[0-9a-f]+ <[^>]*> 0000 0000 nop
-[0-9a-f]+ <[^>]*> 9402 0000 beqz v0,0000101a <foo\+0x1a>
+[0-9a-f]+ <[^>]*> 40e2 0000 beqzc v0,00001018 <foo\+0x18>
[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 \*ABS\*\+0x123468a9
-[0-9a-f]+ <[^>]*> 0c00 nop
-[0-9a-f]+ <[^>]*> b402 0000 bnez v0,00001020 <foo\+0x20>
+[0-9a-f]+ <[^>]*> 40a2 0000 bnezc v0,0000101c <foo\+0x1c>
[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 \*ABS\*\+0x123468a9
[0-9a-f]+ <[^>]*> 0c00 nop
-[0-9a-f]+ <[^>]*> 0c00 nop
\.\.\.
diff --git a/gas/testsuite/gas/mips/micromips-branch-absolute-addend-n64.d b/gas/testsuite/gas/mips/micromips-branch-absolute-addend-n64.d
index 0e14396..0022de2 100644
--- a/gas/testsuite/gas/mips/micromips-branch-absolute-addend-n64.d
+++ b/gas/testsuite/gas/mips/micromips-branch-absolute-addend-n64.d
@@ -7,30 +7,27 @@
Disassembly of section \.text:
\.\.\.
-[0-9a-f]+ <[^>]*> 9400 0000 b 0000000000001004 <foo\+0x4>
+[0-9a-f]+ <[^>]*> 40e0 0000 bc 0000000000001004 <foo\+0x4>
[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 \*ABS\*\+0x123468a9
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x123468a9
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x123468a9
-[0-9a-f]+ <[^>]*> 0c00 nop
-[0-9a-f]+ <[^>]*> 4060 0000 bal 000000000000100a <foo\+0xa>
+[0-9a-f]+ <[^>]*> 4060 0000 bal 0000000000001008 <foo\+0x8>
[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 \*ABS\*\+0x123468a9
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x123468a9
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x123468a9
[0-9a-f]+ <[^>]*> 0000 0000 nop
-[0-9a-f]+ <[^>]*> 4020 0000 bltzal zero,0000000000001012 <foo\+0x12>
+[0-9a-f]+ <[^>]*> 4020 0000 bltzal zero,0000000000001010 <foo\+0x10>
[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 \*ABS\*\+0x123468a9
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x123468a9
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x123468a9
[0-9a-f]+ <[^>]*> 0000 0000 nop
-[0-9a-f]+ <[^>]*> 9402 0000 beqz v0,000000000000101a <foo\+0x1a>
+[0-9a-f]+ <[^>]*> 40e2 0000 beqzc v0,0000000000001018 <foo\+0x18>
[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 \*ABS\*\+0x123468a9
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x123468a9
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x123468a9
-[0-9a-f]+ <[^>]*> 0c00 nop
-[0-9a-f]+ <[^>]*> b402 0000 bnez v0,0000000000001020 <foo\+0x20>
+[0-9a-f]+ <[^>]*> 40a2 0000 bnezc v0,000000000000101c <foo\+0x1c>
[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 \*ABS\*\+0x123468a9
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x123468a9
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x123468a9
[0-9a-f]+ <[^>]*> 0c00 nop
-[0-9a-f]+ <[^>]*> 0c00 nop
\.\.\.
diff --git a/gas/testsuite/gas/mips/micromips-branch-absolute-addend.d b/gas/testsuite/gas/mips/micromips-branch-absolute-addend.d
index 316adad..fd224b5 100644
--- a/gas/testsuite/gas/mips/micromips-branch-absolute-addend.d
+++ b/gas/testsuite/gas/mips/micromips-branch-absolute-addend.d
@@ -6,20 +6,17 @@
Disassembly of section \.text:
\.\.\.
-[0-9a-f]+ <[^>]*> 9400 0918 b 00002234 <foo\+0x1234>
+[0-9a-f]+ <[^>]*> 40e0 0918 bc 00002234 <foo\+0x1234>
[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 bar
-[0-9a-f]+ <[^>]*> 0c00 nop
-[0-9a-f]+ <[^>]*> 4060 0918 bal 0000223a <foo\+0x123a>
+[0-9a-f]+ <[^>]*> 4060 0918 bal 00002238 <foo\+0x1238>
[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 bar
[0-9a-f]+ <[^>]*> 0000 0000 nop
-[0-9a-f]+ <[^>]*> 4020 0918 bltzal zero,00002242 <foo\+0x1242>
+[0-9a-f]+ <[^>]*> 4020 0918 bltzal zero,00002240 <foo\+0x1240>
[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 bar
[0-9a-f]+ <[^>]*> 0000 0000 nop
-[0-9a-f]+ <[^>]*> 9402 0918 beqz v0,0000224a <foo\+0x124a>
+[0-9a-f]+ <[^>]*> 40e2 0918 beqzc v0,00002248 <foo\+0x1248>
[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 bar
-[0-9a-f]+ <[^>]*> 0c00 nop
-[0-9a-f]+ <[^>]*> b402 0918 bnez v0,00002250 <foo\+0x1250>
+[0-9a-f]+ <[^>]*> 40a2 0918 bnezc v0,0000224c <foo\+0x124c>
[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 bar
[0-9a-f]+ <[^>]*> 0c00 nop
-[0-9a-f]+ <[^>]*> 0c00 nop
\.\.\.
diff --git a/gas/testsuite/gas/mips/micromips-branch-absolute-n32.d b/gas/testsuite/gas/mips/micromips-branch-absolute-n32.d
index 212caaa..1eec748 100644
--- a/gas/testsuite/gas/mips/micromips-branch-absolute-n32.d
+++ b/gas/testsuite/gas/mips/micromips-branch-absolute-n32.d
@@ -7,20 +7,17 @@
Disassembly of section \.text:
\.\.\.
-[0-9a-f]+ <[^>]*> 9400 0000 b 00001004 <foo\+0x4>
+[0-9a-f]+ <[^>]*> 40e0 0000 bc 00001004 <foo\+0x4>
[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 \*ABS\*\+0x1231
-[0-9a-f]+ <[^>]*> 0c00 nop
-[0-9a-f]+ <[^>]*> 4060 0000 bal 0000100a <foo\+0xa>
+[0-9a-f]+ <[^>]*> 4060 0000 bal 00001008 <foo\+0x8>
[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 \*ABS\*\+0x1231
[0-9a-f]+ <[^>]*> 0000 0000 nop
-[0-9a-f]+ <[^>]*> 4020 0000 bltzal zero,00001012 <foo\+0x12>
+[0-9a-f]+ <[^>]*> 4020 0000 bltzal zero,00001010 <foo\+0x10>
[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 \*ABS\*\+0x1231
[0-9a-f]+ <[^>]*> 0000 0000 nop
-[0-9a-f]+ <[^>]*> 9402 0000 beqz v0,0000101a <foo\+0x1a>
+[0-9a-f]+ <[^>]*> 40e2 0000 beqzc v0,00001018 <foo\+0x18>
[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 \*ABS\*\+0x1231
-[0-9a-f]+ <[^>]*> 0c00 nop
-[0-9a-f]+ <[^>]*> b402 0000 bnez v0,00001020 <foo\+0x20>
+[0-9a-f]+ <[^>]*> 40a2 0000 bnezc v0,0000101c <foo\+0x1c>
[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 \*ABS\*\+0x1231
[0-9a-f]+ <[^>]*> 0c00 nop
-[0-9a-f]+ <[^>]*> 0c00 nop
\.\.\.
diff --git a/gas/testsuite/gas/mips/micromips-branch-absolute-n64.d b/gas/testsuite/gas/mips/micromips-branch-absolute-n64.d
index 443ef50..bb4d376 100644
--- a/gas/testsuite/gas/mips/micromips-branch-absolute-n64.d
+++ b/gas/testsuite/gas/mips/micromips-branch-absolute-n64.d
@@ -7,30 +7,27 @@
Disassembly of section \.text:
\.\.\.
-[0-9a-f]+ <[^>]*> 9400 0000 b 0000000000001004 <foo\+0x4>
+[0-9a-f]+ <[^>]*> 40e0 0000 bc 0000000000001004 <foo\+0x4>
[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 \*ABS\*\+0x1231
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1231
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1231
-[0-9a-f]+ <[^>]*> 0c00 nop
-[0-9a-f]+ <[^>]*> 4060 0000 bal 000000000000100a <foo\+0xa>
+[0-9a-f]+ <[^>]*> 4060 0000 bal 0000000000001008 <foo\+0x8>
[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 \*ABS\*\+0x1231
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1231
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1231
[0-9a-f]+ <[^>]*> 0000 0000 nop
-[0-9a-f]+ <[^>]*> 4020 0000 bltzal zero,0000000000001012 <foo\+0x12>
+[0-9a-f]+ <[^>]*> 4020 0000 bltzal zero,0000000000001010 <foo\+0x10>
[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 \*ABS\*\+0x1231
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1231
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1231
[0-9a-f]+ <[^>]*> 0000 0000 nop
-[0-9a-f]+ <[^>]*> 9402 0000 beqz v0,000000000000101a <foo\+0x1a>
+[0-9a-f]+ <[^>]*> 40e2 0000 beqzc v0,0000000000001018 <foo\+0x18>
[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 \*ABS\*\+0x1231
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1231
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1231
-[0-9a-f]+ <[^>]*> 0c00 nop
-[0-9a-f]+ <[^>]*> b402 0000 bnez v0,0000000000001020 <foo\+0x20>
+[0-9a-f]+ <[^>]*> 40a2 0000 bnezc v0,000000000000101c <foo\+0x1c>
[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 \*ABS\*\+0x1231
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1231
[ ]*[0-9a-f]+: R_MIPS_NONE \*ABS\*\+0x1231
[0-9a-f]+ <[^>]*> 0c00 nop
-[0-9a-f]+ <[^>]*> 0c00 nop
\.\.\.
diff --git a/gas/testsuite/gas/mips/micromips-branch-absolute.d b/gas/testsuite/gas/mips/micromips-branch-absolute.d
index 443285f..7fc6b9a 100644
--- a/gas/testsuite/gas/mips/micromips-branch-absolute.d
+++ b/gas/testsuite/gas/mips/micromips-branch-absolute.d
@@ -6,20 +6,17 @@
Disassembly of section \.text:
\.\.\.
-[0-9a-f]+ <[^>]*> 9400 fffe b 00001000 <foo>
+[0-9a-f]+ <[^>]*> 40e0 fffe bc 00001000 <foo>
[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 bar
-[0-9a-f]+ <[^>]*> 0c00 nop
-[0-9a-f]+ <[^>]*> 4060 fffe bal 00001006 <foo\+0x6>
+[0-9a-f]+ <[^>]*> 4060 fffe bal 00001004 <foo\+0x4>
[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 bar
[0-9a-f]+ <[^>]*> 0000 0000 nop
-[0-9a-f]+ <[^>]*> 4020 fffe bltzal zero,0000100e <foo\+0xe>
+[0-9a-f]+ <[^>]*> 4020 fffe bltzal zero,0000100c <foo\+0xc>
[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 bar
[0-9a-f]+ <[^>]*> 0000 0000 nop
-[0-9a-f]+ <[^>]*> 9402 fffe beqz v0,00001016 <foo\+0x16>
+[0-9a-f]+ <[^>]*> 40e2 fffe beqzc v0,00001014 <foo\+0x14>
[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 bar
-[0-9a-f]+ <[^>]*> 0c00 nop
-[0-9a-f]+ <[^>]*> b402 fffe bnez v0,0000101c <foo\+0x1c>
+[0-9a-f]+ <[^>]*> 40a2 fffe bnezc v0,00001018 <foo\+0x18>
[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 bar
[0-9a-f]+ <[^>]*> 0c00 nop
-[0-9a-f]+ <[^>]*> 0c00 nop
\.\.\.
diff --git a/gas/testsuite/gas/mips/micromips-compact.d b/gas/testsuite/gas/mips/micromips-compact.d
new file mode 100644
index 0000000..a66c72f
--- /dev/null
+++ b/gas/testsuite/gas/mips/micromips-compact.d
@@ -0,0 +1,7710 @@
+#objdump: -dr --show-raw-insn
+#name: microMIPS for MIPS32r2 (with branch compaction)
+#as: -mips32r2 -32 -mfp64 -EB --defsym compact=1
+#stderr: micromips-warn.l
+#source: micromips.s
+
+.*: +file format .*mips.*
+
+Disassembly of section \.text:
+
+[0-9a-f]+ <test>:
+[ 0-9a-f]+: 6000 2000 pref 0x0,0\(zero\)
+[ 0-9a-f]+: 6000 27ff pref 0x0,2047\(zero\)
+[ 0-9a-f]+: 6000 2800 pref 0x0,-2048\(zero\)
+[ 0-9a-f]+: 3020 0800 li at,2048
+[ 0-9a-f]+: 6001 2000 pref 0x0,0\(at\)
+[ 0-9a-f]+: 3020 f7ff li at,-2049
+[ 0-9a-f]+: 6001 2000 pref 0x0,0\(at\)
+[ 0-9a-f]+: 6000 2000 pref 0x0,0\(zero\)
+[ 0-9a-f]+: 6000 2000 pref 0x0,0\(zero\)
+[ 0-9a-f]+: 6020 2000 pref 0x1,0\(zero\)
+[ 0-9a-f]+: 6040 2000 pref 0x2,0\(zero\)
+[ 0-9a-f]+: 6060 2000 pref 0x3,0\(zero\)
+[ 0-9a-f]+: 6080 2000 pref 0x4,0\(zero\)
+[ 0-9a-f]+: 60a0 2000 pref 0x5,0\(zero\)
+[ 0-9a-f]+: 60c0 2000 pref 0x6,0\(zero\)
+[ 0-9a-f]+: 60e0 2000 pref 0x7,0\(zero\)
+[ 0-9a-f]+: 60e0 21ff pref 0x7,511\(zero\)
+[ 0-9a-f]+: 60e0 2e00 pref 0x7,-512\(zero\)
+[ 0-9a-f]+: 63e0 27ff pref 0x1f,2047\(zero\)
+[ 0-9a-f]+: 63e0 2800 pref 0x1f,-2048\(zero\)
+[ 0-9a-f]+: 3020 0800 li at,2048
+[ 0-9a-f]+: 63e1 2000 pref 0x1f,0\(at\)
+[ 0-9a-f]+: 3020 f7ff li at,-2049
+[ 0-9a-f]+: 63e1 2000 pref 0x1f,0\(at\)
+[ 0-9a-f]+: 3020 7fff li at,32767
+[ 0-9a-f]+: 6061 2000 pref 0x3,0\(at\)
+[ 0-9a-f]+: 3020 8000 li at,-32768
+[ 0-9a-f]+: 6061 2000 pref 0x3,0\(at\)
+[ 0-9a-f]+: 63e2 27ff pref 0x1f,2047\(v0\)
+[ 0-9a-f]+: 63e2 2800 pref 0x1f,-2048\(v0\)
+[ 0-9a-f]+: 3022 0800 addiu at,v0,2048
+[ 0-9a-f]+: 63e1 2000 pref 0x1f,0\(at\)
+[ 0-9a-f]+: 3022 f7ff addiu at,v0,-2049
+[ 0-9a-f]+: 63e1 2000 pref 0x1f,0\(at\)
+[ 0-9a-f]+: 3022 7fff addiu at,v0,32767
+[ 0-9a-f]+: 6061 2000 pref 0x3,0\(at\)
+[ 0-9a-f]+: 3022 8000 addiu at,v0,-32768
+[ 0-9a-f]+: 6061 2000 pref 0x3,0\(at\)
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 0000 0800 ssnop
+[ 0-9a-f]+: 0000 1800 ehb
+[ 0-9a-f]+: 0000 2800 pause
+[ 0-9a-f]+: ed7f li v0,-1
+[ 0-9a-f]+: edff li v1,-1
+[ 0-9a-f]+: ee7f li a0,-1
+[ 0-9a-f]+: eeff li a1,-1
+[ 0-9a-f]+: ef7f li a2,-1
+[ 0-9a-f]+: efff li a3,-1
+[ 0-9a-f]+: ec7f li s0,-1
+[ 0-9a-f]+: ecff li s1,-1
+[ 0-9a-f]+: ec80 li s1,0
+[ 0-9a-f]+: ecfd li s1,125
+[ 0-9a-f]+: ecfe li s1,126
+[ 0-9a-f]+: 3220 007f li s1,127
+[ 0-9a-f]+: 3040 0000 li v0,0
+[ 0-9a-f]+: 3040 0001 li v0,1
+[ 0-9a-f]+: 3040 7fff li v0,32767
+[ 0-9a-f]+: 3040 8000 li v0,-32768
+[ 0-9a-f]+: 5040 ffff li v0,0xffff
+[ 0-9a-f]+: 41a2 0001 lui v0,0x1
+[ 0-9a-f]+: 3040 8000 li v0,-32768
+[ 0-9a-f]+: 3040 8001 li v0,-32767
+[ 0-9a-f]+: 3040 ffff li v0,-1
+[ 0-9a-f]+: 41a2 1234 lui v0,0x1234
+[ 0-9a-f]+: 5042 5678 ori v0,v0,0x5678
+[ 0-9a-f]+: 0c16 move zero,s6
+[ 0-9a-f]+: 0c56 move v0,s6
+[ 0-9a-f]+: 0c76 move v1,s6
+[ 0-9a-f]+: 0c96 move a0,s6
+[ 0-9a-f]+: 0cb6 move a1,s6
+[ 0-9a-f]+: 0cd6 move a2,s6
+[ 0-9a-f]+: 0cf6 move a3,s6
+[ 0-9a-f]+: 0d16 move t0,s6
+[ 0-9a-f]+: 0d36 move t1,s6
+[ 0-9a-f]+: 0d56 move t2,s6
+[ 0-9a-f]+: 0fd6 move s8,s6
+[ 0-9a-f]+: 0ff6 move ra,s6
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 0c02 move zero,v0
+[ 0-9a-f]+: 0c03 move zero,v1
+[ 0-9a-f]+: 0c04 move zero,a0
+[ 0-9a-f]+: 0c05 move zero,a1
+[ 0-9a-f]+: 0c06 move zero,a2
+[ 0-9a-f]+: 0c07 move zero,a3
+[ 0-9a-f]+: 0c08 move zero,t0
+[ 0-9a-f]+: 0c09 move zero,t1
+[ 0-9a-f]+: 0c0a move zero,t2
+[ 0-9a-f]+: 0c1e move zero,s8
+[ 0-9a-f]+: 0c1f move zero,ra
+[ 0-9a-f]+: 0ec2 move s6,v0
+[ 0-9a-f]+: 0c56 move v0,s6
+[ 0-9a-f]+: 0ec2 move s6,v0
+[ 0-9a-f]+: 0016 1290 move v0,s6
+[ 0-9a-f]+: cfff b [0-9a-f]+ <test\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC10_S1 test
+[ 0-9a-f]+: 0002 b290 move s6,v0
+[ 0-9a-f]+: cfff b [0-9a-f]+ <test\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC10_S1 test
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 40e0 fffe bc [0-9a-f]+ <test\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test
+[ 0-9a-f]+: 40e0 fffe bc [0-9a-f]+ <test\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
+[ 0-9a-f]+: cfff b [0-9a-f]+ <test\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC10_S1 .*
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 40e0 fffe bc [0-9a-f]+ <test\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
+
+[0-9a-f]+ <.*>:
+[ 0-9a-f]+: 40e0 fffe bc [0-9a-f]+ <.*>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
+[ 0-9a-f]+: cfff b [0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC10_S1 .*
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 40e0 fffe bc [0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
+[ 0-9a-f]+: 4043 fffe bgez v1,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
+[ 0-9a-f]+: 0c43 move v0,v1
+[ 0-9a-f]+: 0060 1190 neg v0,v1
+
+[0-9a-f]+ <.*>:
+[ 0-9a-f]+: 4044 fffe bgez a0,[0-9a-f]+ <.*>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
+[ 0-9a-f]+: 0c44 move v0,a0
+[ 0-9a-f]+: 0080 1190 neg v0,a0
+
+[0-9a-f]+ <.*>:
+[ 0-9a-f]+: 4042 fffe bgez v0,[0-9a-f]+ <.*>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 0040 1190 neg v0,v0
+
+[0-9a-f]+ <.*>:
+[ 0-9a-f]+: 4042 fffe bgez v0,[0-9a-f]+ <.*>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 0040 1190 neg v0,v0
+
+[0-9a-f]+ <.*>:
+[ 0-9a-f]+: 0083 1110 add v0,v1,a0
+[ 0-9a-f]+: 03fe e910 add sp,s8,ra
+[ 0-9a-f]+: 0082 1110 add v0,v0,a0
+[ 0-9a-f]+: 0082 1110 add v0,v0,a0
+[ 0-9a-f]+: 1042 0000 addi v0,v0,0
+[ 0-9a-f]+: 1042 0001 addi v0,v0,1
+[ 0-9a-f]+: 1042 7fff addi v0,v0,32767
+[ 0-9a-f]+: 1042 8000 addi v0,v0,-32768
+[ 0-9a-f]+: 5020 ffff li at,0xffff
+[ 0-9a-f]+: 0022 1110 add v0,v0,at
+[ 0-9a-f]+: 1064 8000 addi v1,a0,-32768
+[ 0-9a-f]+: 1064 0000 addi v1,a0,0
+[ 0-9a-f]+: 1064 7fff addi v1,a0,32767
+[ 0-9a-f]+: 1064 ffff addi v1,a0,-1
+[ 0-9a-f]+: 1063 ffff addi v1,v1,-1
+[ 0-9a-f]+: 1063 ffff addi v1,v1,-1
+[ 0-9a-f]+: 4c10 addiu zero,zero,-8
+[ 0-9a-f]+: 4c50 addiu v0,v0,-8
+[ 0-9a-f]+: 4c70 addiu v1,v1,-8
+[ 0-9a-f]+: 4c90 addiu a0,a0,-8
+[ 0-9a-f]+: 4cb0 addiu a1,a1,-8
+[ 0-9a-f]+: 4cd0 addiu a2,a2,-8
+[ 0-9a-f]+: 4cf0 addiu a3,a3,-8
+[ 0-9a-f]+: 4d10 addiu t0,t0,-8
+[ 0-9a-f]+: 4d30 addiu t1,t1,-8
+[ 0-9a-f]+: 4d50 addiu t2,t2,-8
+[ 0-9a-f]+: 4fd0 addiu s8,s8,-8
+[ 0-9a-f]+: 4ff0 addiu ra,ra,-8
+[ 0-9a-f]+: 4ff2 addiu ra,ra,-7
+[ 0-9a-f]+: 4fe0 addiu ra,ra,0
+[ 0-9a-f]+: 4fe2 addiu ra,ra,1
+[ 0-9a-f]+: 4fec addiu ra,ra,6
+[ 0-9a-f]+: 4fee addiu ra,ra,7
+[ 0-9a-f]+: 33ff 0008 addiu ra,ra,8
+[ 0-9a-f]+: 4ffd addiu sp,sp,-1032
+[ 0-9a-f]+: 4fff addiu sp,sp,-1028
+[ 0-9a-f]+: 4e01 addiu sp,sp,-1024
+[ 0-9a-f]+: 4dff addiu sp,sp,1020
+[ 0-9a-f]+: 4c01 addiu sp,sp,1024
+[ 0-9a-f]+: 4c03 addiu sp,sp,1028
+[ 0-9a-f]+: 4c03 addiu sp,sp,1028
+[ 0-9a-f]+: 33bd 0408 addiu sp,sp,1032
+[ 0-9a-f]+: 6d2e addiu v0,v0,-1
+[ 0-9a-f]+: 6d3e addiu v0,v1,-1
+[ 0-9a-f]+: 6d4e addiu v0,a0,-1
+[ 0-9a-f]+: 6d5e addiu v0,a1,-1
+[ 0-9a-f]+: 6d6e addiu v0,a2,-1
+[ 0-9a-f]+: 6d7e addiu v0,a3,-1
+[ 0-9a-f]+: 6d0e addiu v0,s0,-1
+[ 0-9a-f]+: 6d1e addiu v0,s1,-1
+[ 0-9a-f]+: 6d10 addiu v0,s1,1
+[ 0-9a-f]+: 6d12 addiu v0,s1,4
+[ 0-9a-f]+: 6d14 addiu v0,s1,8
+[ 0-9a-f]+: 6d16 addiu v0,s1,12
+[ 0-9a-f]+: 6d18 addiu v0,s1,16
+[ 0-9a-f]+: 6d1a addiu v0,s1,20
+[ 0-9a-f]+: 6d1c addiu v0,s1,24
+[ 0-9a-f]+: 6d9c addiu v1,s1,24
+[ 0-9a-f]+: 6e1c addiu a0,s1,24
+[ 0-9a-f]+: 6e9c addiu a1,s1,24
+[ 0-9a-f]+: 6f1c addiu a2,s1,24
+[ 0-9a-f]+: 6f9c addiu a3,s1,24
+[ 0-9a-f]+: 6c1c addiu s0,s1,24
+[ 0-9a-f]+: 6c9c addiu s1,s1,24
+[ 0-9a-f]+: 0c5d move v0,sp
+[ 0-9a-f]+: 6d03 addiu v0,sp,4
+[ 0-9a-f]+: 6d7d addiu v0,sp,248
+[ 0-9a-f]+: 6d7f addiu v0,sp,252
+[ 0-9a-f]+: 305d 0100 addiu v0,sp,256
+[ 0-9a-f]+: 6d7f addiu v0,sp,252
+[ 0-9a-f]+: 6dff addiu v1,sp,252
+[ 0-9a-f]+: 6e7f addiu a0,sp,252
+[ 0-9a-f]+: 6eff addiu a1,sp,252
+[ 0-9a-f]+: 6f7f addiu a2,sp,252
+[ 0-9a-f]+: 6fff addiu a3,sp,252
+[ 0-9a-f]+: 6c7f addiu s0,sp,252
+[ 0-9a-f]+: 6cff addiu s1,sp,252
+[ 0-9a-f]+: 3064 8000 addiu v1,a0,-32768
+[ 0-9a-f]+: 0c64 move v1,a0
+[ 0-9a-f]+: 3064 7fff addiu v1,a0,32767
+[ 0-9a-f]+: 3064 ffff addiu v1,a0,-1
+[ 0-9a-f]+: 3063 ffff addiu v1,v1,-1
+[ 0-9a-f]+: 3063 ffff addiu v1,v1,-1
+[ 0-9a-f]+: 0c56 move v0,s6
+[ 0-9a-f]+: 0ec2 move s6,v0
+[ 0-9a-f]+: 0c56 move v0,s6
+[ 0-9a-f]+: 0ec2 move s6,v0
+[ 0-9a-f]+: 0526 addu v0,v1,v0
+[ 0-9a-f]+: 0536 addu v0,v1,v1
+[ 0-9a-f]+: 0546 addu v0,v1,a0
+[ 0-9a-f]+: 0556 addu v0,v1,a1
+[ 0-9a-f]+: 0566 addu v0,v1,a2
+[ 0-9a-f]+: 0576 addu v0,v1,a3
+[ 0-9a-f]+: 0506 addu v0,v1,s0
+[ 0-9a-f]+: 0516 addu v0,v1,s1
+[ 0-9a-f]+: 0514 addu v0,v0,s1
+[ 0-9a-f]+: 0516 addu v0,v1,s1
+[ 0-9a-f]+: 0518 addu v0,a0,s1
+[ 0-9a-f]+: 051a addu v0,a1,s1
+[ 0-9a-f]+: 051c addu v0,a2,s1
+[ 0-9a-f]+: 051e addu v0,a3,s1
+[ 0-9a-f]+: 0510 addu v0,s0,s1
+[ 0-9a-f]+: 0512 addu v0,s1,s1
+[ 0-9a-f]+: 0514 addu v0,v0,s1
+[ 0-9a-f]+: 0594 addu v1,v0,s1
+[ 0-9a-f]+: 0614 addu a0,v0,s1
+[ 0-9a-f]+: 0694 addu a1,v0,s1
+[ 0-9a-f]+: 0714 addu a2,v0,s1
+[ 0-9a-f]+: 0794 addu a3,v0,s1
+[ 0-9a-f]+: 0414 addu s0,v0,s1
+[ 0-9a-f]+: 0494 addu s1,v0,s1
+[ 0-9a-f]+: 07ae addu a3,a3,v0
+[ 0-9a-f]+: 07ae addu a3,a3,v0
+[ 0-9a-f]+: 07f4 addu a3,v0,a3
+[ 0-9a-f]+: 03fe e950 addu sp,s8,ra
+[ 0-9a-f]+: 3042 0000 addiu v0,v0,0
+[ 0-9a-f]+: 3042 0001 addiu v0,v0,1
+[ 0-9a-f]+: 3042 7fff addiu v0,v0,32767
+[ 0-9a-f]+: 3042 8000 addiu v0,v0,-32768
+[ 0-9a-f]+: 5020 ffff li at,0xffff
+[ 0-9a-f]+: 0022 1150 addu v0,v0,at
+[ 0-9a-f]+: 4492 and v0,v0,v0
+[ 0-9a-f]+: 4493 and v0,v0,v1
+[ 0-9a-f]+: 4494 and v0,v0,a0
+[ 0-9a-f]+: 4495 and v0,v0,a1
+[ 0-9a-f]+: 4496 and v0,v0,a2
+[ 0-9a-f]+: 4497 and v0,v0,a3
+[ 0-9a-f]+: 4490 and v0,v0,s0
+[ 0-9a-f]+: 4491 and v0,v0,s1
+[ 0-9a-f]+: 449a and v1,v1,v0
+[ 0-9a-f]+: 44a2 and a0,a0,v0
+[ 0-9a-f]+: 44aa and a1,a1,v0
+[ 0-9a-f]+: 44b2 and a2,a2,v0
+[ 0-9a-f]+: 44ba and a3,a3,v0
+[ 0-9a-f]+: 4482 and s0,s0,v0
+[ 0-9a-f]+: 448a and s1,s1,v0
+[ 0-9a-f]+: 4493 and v0,v0,v1
+[ 0-9a-f]+: 4493 and v0,v0,v1
+[ 0-9a-f]+: 4493 and v0,v0,v1
+[ 0-9a-f]+: 4493 and v0,v0,v1
+[ 0-9a-f]+: 0062 1250 and v0,v0,v1
+[ 0-9a-f]+: 2d21 andi v0,v0,0x1
+[ 0-9a-f]+: 2d22 andi v0,v0,0x2
+[ 0-9a-f]+: 2d23 andi v0,v0,0x3
+[ 0-9a-f]+: 2d24 andi v0,v0,0x4
+[ 0-9a-f]+: 2d25 andi v0,v0,0x7
+[ 0-9a-f]+: 2d26 andi v0,v0,0x8
+[ 0-9a-f]+: 2d27 andi v0,v0,0xf
+[ 0-9a-f]+: 2d28 andi v0,v0,0x10
+[ 0-9a-f]+: 2d29 andi v0,v0,0x1f
+[ 0-9a-f]+: 2d2a andi v0,v0,0x20
+[ 0-9a-f]+: 2d2b andi v0,v0,0x3f
+[ 0-9a-f]+: 2d2c andi v0,v0,0x40
+[ 0-9a-f]+: 2d20 andi v0,v0,0x80
+[ 0-9a-f]+: 2d2d andi v0,v0,0xff
+[ 0-9a-f]+: 2d2e andi v0,v0,0x8000
+[ 0-9a-f]+: 2d2f andi v0,v0,0xffff
+[ 0-9a-f]+: 2d3f andi v0,v1,0xffff
+[ 0-9a-f]+: 2d4f andi v0,a0,0xffff
+[ 0-9a-f]+: 2d5f andi v0,a1,0xffff
+[ 0-9a-f]+: 2d6f andi v0,a2,0xffff
+[ 0-9a-f]+: 2d7f andi v0,a3,0xffff
+[ 0-9a-f]+: 2d0f andi v0,s0,0xffff
+[ 0-9a-f]+: 2d1f andi v0,s1,0xffff
+[ 0-9a-f]+: 2d9f andi v1,s1,0xffff
+[ 0-9a-f]+: 2e1f andi a0,s1,0xffff
+[ 0-9a-f]+: 2e9f andi a1,s1,0xffff
+[ 0-9a-f]+: 2f1f andi a2,s1,0xffff
+[ 0-9a-f]+: 2f9f andi a3,s1,0xffff
+[ 0-9a-f]+: 2c1f andi s0,s1,0xffff
+[ 0-9a-f]+: 2c9f andi s1,s1,0xffff
+[ 0-9a-f]+: 2fff andi a3,a3,0xffff
+[ 0-9a-f]+: 2fff andi a3,a3,0xffff
+[ 0-9a-f]+: 2fff andi a3,a3,0xffff
+[ 0-9a-f]+: d0e7 ffff andi a3,a3,0xffff
+[ 0-9a-f]+: 0083 1250 and v0,v1,a0
+[ 0-9a-f]+: 0082 1250 and v0,v0,a0
+[ 0-9a-f]+: 0082 1250 and v0,v0,a0
+[ 0-9a-f]+: d043 0000 andi v0,v1,0x0
+[ 0-9a-f]+: d043 ffff andi v0,v1,0xffff
+[ 0-9a-f]+: 41a1 0001 lui at,0x1
+[ 0-9a-f]+: 0023 1250 and v0,v1,at
+[ 0-9a-f]+: 41a1 ffff lui at,0xffff
+[ 0-9a-f]+: 5021 0001 ori at,at,0x1
+[ 0-9a-f]+: 4280 fffe bc2f [0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test
+[ 0-9a-f]+: 0023 1250 and v0,v1,at
+[ 0-9a-f]+: 4280 fffe bc2f [0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 4284 fffe bc2f \$cc1,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 4288 fffe bc2f \$cc2,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 428c fffe bc2f \$cc3,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 4290 fffe bc2f \$cc4,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 4294 fffe bc2f \$cc5,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 4298 fffe bc2f \$cc6,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 429c fffe bc2f \$cc7,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 42a0 fffe bc2t [0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 42a0 fffe bc2t [0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 42a4 fffe bc2t \$cc1,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 42a8 fffe bc2t \$cc2,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 42ac fffe bc2t \$cc3,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 42b0 fffe bc2t \$cc4,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 42b4 fffe bc2t \$cc5,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 42b8 fffe bc2t \$cc6,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 42bc fffe bc2t \$cc7,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 42a4 fffe bc2t \$cc1,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test
+[ 0-9a-f]+: 05d8 addu v1,a0,a1
+
+[0-9a-f]+ <.*>:
+[ 0-9a-f]+: 4288 fffe bc2f \$cc2,[0-9a-f]+ <.*>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test
+[ 0-9a-f]+: 0107 3150 addu a2,a3,t0
+
+[0-9a-f]+ <.*>:
+[ 0-9a-f]+: 428c fffe bc2f \$cc3,[0-9a-f]+ <.*>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 05d8 addu v1,a0,a1
+[ 0-9a-f]+: 42b0 fffe bc2t \$cc4,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 0107 3150 addu a2,a3,t0
+
+[0-9a-f]+ <test2>:
+[ 0-9a-f]+: 40e2 fffe beqzc v0,[0-9a-f]+ <test2>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2
+[ 0-9a-f]+: 40e3 fffe beqzc v1,[0-9a-f]+ <test2\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2
+[ 0-9a-f]+: 40e4 fffe beqzc a0,[0-9a-f]+ <test2\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2
+[ 0-9a-f]+: 40e5 fffe beqzc a1,[0-9a-f]+ <test2\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2
+[ 0-9a-f]+: 40e6 fffe beqzc a2,[0-9a-f]+ <test2\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2
+[ 0-9a-f]+: 40e7 fffe beqzc a3,[0-9a-f]+ <test2\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2
+[ 0-9a-f]+: 40f0 fffe beqzc s0,[0-9a-f]+ <test2\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2
+[ 0-9a-f]+: 40f1 fffe beqzc s1,[0-9a-f]+ <test2\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2
+[ 0-9a-f]+: 40e2 fffe beqzc v0,[0-9a-f]+ <test2\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2
+[ 0-9a-f]+: 40e3 fffe beqzc v1,[0-9a-f]+ <test2\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2
+[ 0-9a-f]+: 40e4 fffe beqzc a0,[0-9a-f]+ <test2\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2
+[ 0-9a-f]+: 40e5 fffe beqzc a1,[0-9a-f]+ <test2\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2
+[ 0-9a-f]+: 40e6 fffe beqzc a2,[0-9a-f]+ <test2\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2
+[ 0-9a-f]+: 40e7 fffe beqzc a3,[0-9a-f]+ <test2\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2
+[ 0-9a-f]+: 40f0 fffe beqzc s0,[0-9a-f]+ <test2\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2
+[ 0-9a-f]+: 40f1 fffe beqzc s1,[0-9a-f]+ <test2\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2
+[ 0-9a-f]+: 40e2 fffe beqzc v0,[0-9a-f]+ <test2\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2
+[ 0-9a-f]+: 40e3 fffe beqzc v1,[0-9a-f]+ <test2\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2
+[ 0-9a-f]+: 40e4 fffe beqzc a0,[0-9a-f]+ <test2\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2
+[ 0-9a-f]+: 40e5 fffe beqzc a1,[0-9a-f]+ <test2\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2
+[ 0-9a-f]+: 40e6 fffe beqzc a2,[0-9a-f]+ <test2\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2
+[ 0-9a-f]+: 40e7 fffe beqzc a3,[0-9a-f]+ <test2\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2
+[ 0-9a-f]+: 40f0 fffe beqzc s0,[0-9a-f]+ <test2\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2
+[ 0-9a-f]+: 40f1 fffe beqzc s1,[0-9a-f]+ <test2\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2
+[ 0-9a-f]+: 8c7f beqz s0,[0-9a-f]+ <test2\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test2
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 40f0 fffe beqzc s0,[0-9a-f]+ <test2\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2
+[ 0-9a-f]+: 40f1 fffe beqzc s1,[0-9a-f]+ <test2\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2
+[ 0-9a-f]+: 40f1 fffe beqzc s1,[0-9a-f]+ <test2\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2
+[ 0-9a-f]+: 40f1 fffe beqzc s1,[0-9a-f]+ <test2\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2
+[ 0-9a-f]+: 40f0 fffe beqzc s0,[0-9a-f]+ <test2\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2
+[ 0-9a-f]+: 3020 000a li at,10
+[ 0-9a-f]+: 9430 fffe beq s0,at,[0-9a-f]+ <test2\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 3020 7fff li at,32767
+[ 0-9a-f]+: 9430 fffe beq s0,at,[0-9a-f]+ <test2\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 41a1 0001 lui at,0x1
+[ 0-9a-f]+: 9430 fffe beq s0,at,[0-9a-f]+ <test2\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: b630 fffe bne s0,s1,[0-9a-f]+ <test2\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <test2\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2
+[ 0-9a-f]+: 05d8 addu v1,a0,a1
+
+[0-9a-f]+ <.*>:
+[ 0-9a-f]+: b630 fffe bne s0,s1,[0-9a-f]+ <.*>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
+[ 0-9a-f]+: 05d8 addu v1,a0,a1
+
+[0-9a-f]+ <.*>:
+[ 0-9a-f]+: b410 fffe bnez s0,[0-9a-f]+ <.*>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2
+[ 0-9a-f]+: 05d8 addu v1,a0,a1
+
+[0-9a-f]+ <.*>:
+[ 0-9a-f]+: b410 fffe bnez s0,[0-9a-f]+ <.*>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
+[ 0-9a-f]+: 05d8 addu v1,a0,a1
+
+[0-9a-f]+ <.*>:
+[ 0-9a-f]+: 3020 000a li at,10
+[ 0-9a-f]+: b430 fffe bne s0,at,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2
+[ 0-9a-f]+: 05d8 addu v1,a0,a1
+
+[0-9a-f]+ <.*>:
+[ 0-9a-f]+: 3020 000a li at,10
+[ 0-9a-f]+: b430 fffe bne s0,at,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
+[ 0-9a-f]+: 05d8 addu v1,a0,a1
+
+[0-9a-f]+ <.*>:
+[ 0-9a-f]+: 3020 7fff li at,32767
+[ 0-9a-f]+: b430 fffe bne s0,at,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2
+[ 0-9a-f]+: 05d8 addu v1,a0,a1
+
+[0-9a-f]+ <.*>:
+[ 0-9a-f]+: 3020 7fff li at,32767
+[ 0-9a-f]+: b430 fffe bne s0,at,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
+[ 0-9a-f]+: 05d8 addu v1,a0,a1
+
+[0-9a-f]+ <.*>:
+[ 0-9a-f]+: 5020 ffff li at,0xffff
+[ 0-9a-f]+: b430 fffe bne s0,at,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2
+[ 0-9a-f]+: 05d8 addu v1,a0,a1
+
+[0-9a-f]+ <.*>:
+[ 0-9a-f]+: 5020 ffff li at,0xffff
+[ 0-9a-f]+: b430 fffe bne s0,at,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
+[ 0-9a-f]+: 05d8 addu v1,a0,a1
+
+[0-9a-f]+ <.*>:
+[ 0-9a-f]+: b630 fffe bne s0,s1,[0-9a-f]+ <.*>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2
+[ 0-9a-f]+: 03a4 1950 addu v1,a0,sp
+
+[0-9a-f]+ <.*>:
+[ 0-9a-f]+: b630 fffe bne s0,s1,[0-9a-f]+ <.*>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
+[ 0-9a-f]+: 03a4 1950 addu v1,a0,sp
+
+[0-9a-f]+ <.*>:
+[ 0-9a-f]+: b410 fffe bnez s0,[0-9a-f]+ <.*>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2
+[ 0-9a-f]+: 03a4 1950 addu v1,a0,sp
+
+[0-9a-f]+ <.*>:
+[ 0-9a-f]+: b410 fffe bnez s0,[0-9a-f]+ <.*>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
+[ 0-9a-f]+: 03a4 1950 addu v1,a0,sp
+
+[0-9a-f]+ <.*>:
+[ 0-9a-f]+: 3020 000a li at,10
+[ 0-9a-f]+: b430 fffe bne s0,at,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2
+[ 0-9a-f]+: 03a4 1950 addu v1,a0,sp
+
+[0-9a-f]+ <.*>:
+[ 0-9a-f]+: 3020 000a li at,10
+[ 0-9a-f]+: b430 fffe bne s0,at,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
+[ 0-9a-f]+: 03a4 1950 addu v1,a0,sp
+
+[0-9a-f]+ <.*>:
+[ 0-9a-f]+: 3020 7fff li at,32767
+[ 0-9a-f]+: b430 fffe bne s0,at,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2
+[ 0-9a-f]+: 03a4 1950 addu v1,a0,sp
+
+[0-9a-f]+ <.*>:
+[ 0-9a-f]+: 3020 7fff li at,32767
+[ 0-9a-f]+: b430 fffe bne s0,at,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
+[ 0-9a-f]+: 03a4 1950 addu v1,a0,sp
+
+[0-9a-f]+ <.*>:
+[ 0-9a-f]+: 5020 ffff li at,0xffff
+[ 0-9a-f]+: b430 fffe bne s0,at,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2
+[ 0-9a-f]+: 03a4 1950 addu v1,a0,sp
+
+[0-9a-f]+ <.*>:
+[ 0-9a-f]+: 5020 ffff li at,0xffff
+[ 0-9a-f]+: b430 fffe bne s0,at,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 9400 fffe b [0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
+[ 0-9a-f]+: 03a4 1950 addu v1,a0,sp
+
+[0-9a-f]+ <.*>:
+[ 0-9a-f]+: 9630 fffe beq s0,s1,[0-9a-f]+ <.*>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 9411 fffe beqz s1,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 40a2 fffe bnezc v0,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test3
+[ 0-9a-f]+: 40a3 fffe bnezc v1,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test3
+[ 0-9a-f]+: 40a4 fffe bnezc a0,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test3
+[ 0-9a-f]+: 40a5 fffe bnezc a1,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test3
+[ 0-9a-f]+: 40a6 fffe bnezc a2,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test3
+[ 0-9a-f]+: 40a7 fffe bnezc a3,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test3
+[ 0-9a-f]+: 40b0 fffe bnezc s0,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test3
+[ 0-9a-f]+: 40b1 fffe bnezc s1,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test3
+[ 0-9a-f]+: 40a2 fffe bnezc v0,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test3
+[ 0-9a-f]+: 40a3 fffe bnezc v1,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test3
+[ 0-9a-f]+: 40a4 fffe bnezc a0,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test3
+[ 0-9a-f]+: 40a5 fffe bnezc a1,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test3
+[ 0-9a-f]+: 40a6 fffe bnezc a2,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test3
+[ 0-9a-f]+: 40a7 fffe bnezc a3,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test3
+[ 0-9a-f]+: 40b0 fffe bnezc s0,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test3
+[ 0-9a-f]+: 40b1 fffe bnezc s1,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test3
+[ 0-9a-f]+: 40a2 fffe bnezc v0,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test3
+[ 0-9a-f]+: 40a3 fffe bnezc v1,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test3
+[ 0-9a-f]+: 40a4 fffe bnezc a0,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test3
+[ 0-9a-f]+: 40a5 fffe bnezc a1,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test3
+[ 0-9a-f]+: 40a6 fffe bnezc a2,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test3
+[ 0-9a-f]+: 40a7 fffe bnezc a3,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test3
+[ 0-9a-f]+: 40b0 fffe bnezc s0,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test3
+[ 0-9a-f]+: 40b1 fffe bnezc s1,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test3
+[ 0-9a-f]+: ac7f bnez s0,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC7_S1 test3
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 40b0 fffe bnezc s0,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test3
+[ 0-9a-f]+: 40b1 fffe bnezc s1,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2
+[ 0-9a-f]+: 40b1 fffe bnezc s1,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2
+
+[0-9a-f]+ <test3>:
+[ 0-9a-f]+: 40b1 fffe bnezc s1,[0-9a-f]+ <test3>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 test2
+[ 0-9a-f]+: 4680 break
+[ 0-9a-f]+: 4680 break
+[ 0-9a-f]+: 4681 break 0x1
+[ 0-9a-f]+: 4682 break 0x2
+[ 0-9a-f]+: 4683 break 0x3
+[ 0-9a-f]+: 4684 break 0x4
+[ 0-9a-f]+: 4685 break 0x5
+[ 0-9a-f]+: 4686 break 0x6
+[ 0-9a-f]+: 4687 break 0x7
+[ 0-9a-f]+: 4688 break 0x8
+[ 0-9a-f]+: 4689 break 0x9
+[ 0-9a-f]+: 468a break 0xa
+[ 0-9a-f]+: 468b break 0xb
+[ 0-9a-f]+: 468c break 0xc
+[ 0-9a-f]+: 468d break 0xd
+[ 0-9a-f]+: 468e break 0xe
+[ 0-9a-f]+: 468f break 0xf
+[ 0-9a-f]+: 003f 0007 break 0x3f
+[ 0-9a-f]+: 0040 0007 break 0x40
+[ 0-9a-f]+: 03ff 0007 break 0x3ff
+[ 0-9a-f]+: 03ff ffc7 break 0x3ff,0x3ff
+[ 0-9a-f]+: 0000 0007 break
+[ 0-9a-f]+: 0000 0007 break
+[ 0-9a-f]+: 0001 0007 break 0x1
+[ 0-9a-f]+: 0002 0007 break 0x2
+[ 0-9a-f]+: 000f 0007 break 0xf
+[ 0-9a-f]+: 003f 0007 break 0x3f
+[ 0-9a-f]+: 0040 0007 break 0x40
+[ 0-9a-f]+: 03ff 0007 break 0x3ff
+[ 0-9a-f]+: 03ff ffc7 break 0x3ff,0x3ff
+[ 0-9a-f]+: 2000 6000 cache 0x0,0\(zero\)
+[ 0-9a-f]+: 2000 6800 cache 0x0,-2048\(zero\)
+[ 0-9a-f]+: 2000 67ff cache 0x0,2047\(zero\)
+[ 0-9a-f]+: 3020 f7ff li at,-2049
+[ 0-9a-f]+: 2001 6000 cache 0x0,0\(at\)
+[ 0-9a-f]+: 3020 0800 li at,2048
+[ 0-9a-f]+: 2001 6000 cache 0x0,0\(at\)
+[ 0-9a-f]+: 2002 6000 cache 0x0,0\(v0\)
+[ 0-9a-f]+: 2002 6800 cache 0x0,-2048\(v0\)
+[ 0-9a-f]+: 2002 67ff cache 0x0,2047\(v0\)
+[ 0-9a-f]+: 3022 f7ff addiu at,v0,-2049
+[ 0-9a-f]+: 2001 6000 cache 0x0,0\(at\)
+[ 0-9a-f]+: 3022 0800 addiu at,v0,2048
+[ 0-9a-f]+: 2001 6000 cache 0x0,0\(at\)
+[ 0-9a-f]+: 2000 6000 cache 0x0,0\(zero\)
+[ 0-9a-f]+: 2000 6000 cache 0x0,0\(zero\)
+[ 0-9a-f]+: 2020 6000 cache 0x1,0\(zero\)
+[ 0-9a-f]+: 2040 6000 cache 0x2,0\(zero\)
+[ 0-9a-f]+: 2060 6000 cache 0x3,0\(zero\)
+[ 0-9a-f]+: 2080 6000 cache 0x4,0\(zero\)
+[ 0-9a-f]+: 20a0 6000 cache 0x5,0\(zero\)
+[ 0-9a-f]+: 20c0 6000 cache 0x6,0\(zero\)
+[ 0-9a-f]+: 23e0 6000 cache 0x1f,0\(zero\)
+[ 0-9a-f]+: 23e0 67ff cache 0x1f,2047\(zero\)
+[ 0-9a-f]+: 23e0 6800 cache 0x1f,-2048\(zero\)
+[ 0-9a-f]+: 2000 67ff cache 0x0,2047\(zero\)
+[ 0-9a-f]+: 2000 6800 cache 0x0,-2048\(zero\)
+[ 0-9a-f]+: 41a1 0001 lui at,0x1
+[ 0-9a-f]+: 0061 0950 addu at,at,v1
+[ 0-9a-f]+: 23e1 6000 cache 0x1f,0\(at\)
+[ 0-9a-f]+: 3023 0800 addiu at,v1,2048
+[ 0-9a-f]+: 23e1 6000 cache 0x1f,0\(at\)
+[ 0-9a-f]+: 3023 f7ff addiu at,v1,-2049
+[ 0-9a-f]+: 23e1 6000 cache 0x1f,0\(at\)
+[ 0-9a-f]+: 41a1 0001 lui at,0x1
+[ 0-9a-f]+: 0061 0950 addu at,at,v1
+[ 0-9a-f]+: 23e1 6001 cache 0x1f,1\(at\)
+[ 0-9a-f]+: 23e3 6fff cache 0x1f,-1\(v1\)
+[ 0-9a-f]+: 41a1 ffff lui at,0xffff
+[ 0-9a-f]+: 0061 0950 addu at,at,v1
+[ 0-9a-f]+: 23e1 6000 cache 0x1f,0\(at\)
+[ 0-9a-f]+: 41a1 ffff lui at,0xffff
+[ 0-9a-f]+: 0061 0950 addu at,at,v1
+[ 0-9a-f]+: 23e1 6001 cache 0x1f,1\(at\)
+[ 0-9a-f]+: 41a1 0001 lui at,0x1
+[ 0-9a-f]+: 0061 0950 addu at,at,v1
+[ 0-9a-f]+: 23e1 6fff cache 0x1f,-1\(at\)
+[ 0-9a-f]+: 41a1 0001 lui at,0x1
+[ 0-9a-f]+: 23e1 6000 cache 0x1f,0\(at\)
+[ 0-9a-f]+: 3020 0800 li at,2048
+[ 0-9a-f]+: 23e1 6000 cache 0x1f,0\(at\)
+[ 0-9a-f]+: 3020 f7ff li at,-2049
+[ 0-9a-f]+: 23e1 6000 cache 0x1f,0\(at\)
+[ 0-9a-f]+: 41a1 0001 lui at,0x1
+[ 0-9a-f]+: 23e1 6001 cache 0x1f,1\(at\)
+[ 0-9a-f]+: 23e0 6fff cache 0x1f,-1\(zero\)
+[ 0-9a-f]+: 41a1 ffff lui at,0xffff
+[ 0-9a-f]+: 23e1 6000 cache 0x1f,0\(at\)
+[ 0-9a-f]+: 41a1 ffff lui at,0xffff
+[ 0-9a-f]+: 23e1 6001 cache 0x1f,1\(at\)
+[ 0-9a-f]+: 41a1 0001 lui at,0x1
+[ 0-9a-f]+: 23e1 6fff cache 0x1f,-1\(at\)
+[ 0-9a-f]+: 0043 4b3c clo v0,v1
+[ 0-9a-f]+: 0062 4b3c clo v1,v0
+[ 0-9a-f]+: 0043 5b3c clz v0,v1
+[ 0-9a-f]+: 0062 5b3c clz v1,v0
+[ 0-9a-f]+: 0000 e37c deret
+[ 0-9a-f]+: 0000 477c di
+[ 0-9a-f]+: 0000 477c di
+[ 0-9a-f]+: 0002 477c di v0
+[ 0-9a-f]+: 0003 477c di v1
+[ 0-9a-f]+: 001e 477c di s8
+[ 0-9a-f]+: 001f 477c di ra
+[ 0-9a-f]+: 0062 ab3c div zero,v0,v1
+[ 0-9a-f]+: 03fe ab3c div zero,s8,ra
+[ 0-9a-f]+: 0060 ab3c div zero,zero,v1
+[ 0-9a-f]+: 03e0 ab3c div zero,zero,ra
+[ 0-9a-f]+: 4687 break 0x7
+[ 0-9a-f]+: b404 fffe bnez a0,[0-9a-f]+ <test3\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
+[ 0-9a-f]+: 0083 ab3c div zero,v1,a0
+[ 0-9a-f]+: 4687 break 0x7
+
+[0-9a-f]+ <.*>:
+[ 0-9a-f]+: 3020 ffff li at,-1
+[ 0-9a-f]+: b424 fffe bne a0,at,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
+[ 0-9a-f]+: 41a1 8000 lui at,0x8000
+[ 0-9a-f]+: b423 fffe bne v1,at,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
+[ 0-9a-f]+: 0c00 nop
+[ 0-9a-f]+: 4686 break 0x6
+
+[0-9a-f]+ <.*>:
+[ 0-9a-f]+: 4642 mflo v0
+[ 0-9a-f]+: 4687 break 0x7
+[ 0-9a-f]+: 0c64 move v1,a0
+[ 0-9a-f]+: 0080 1990 neg v1,a0
+[ 0-9a-f]+: 3020 0002 li at,2
+[ 0-9a-f]+: 0024 ab3c div zero,a0,at
+[ 0-9a-f]+: 4643 mflo v1
+[ 0-9a-f]+: 0062 bb3c divu zero,v0,v1
+[ 0-9a-f]+: 03fe bb3c divu zero,s8,ra
+[ 0-9a-f]+: 0060 bb3c divu zero,zero,v1
+[ 0-9a-f]+: 03e0 bb3c divu zero,zero,ra
+[ 0-9a-f]+: b400 fffe bnez zero,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
+[ 0-9a-f]+: 0003 bb3c divu zero,v1,zero
+[ 0-9a-f]+: 4687 break 0x7
+
+[0-9a-f]+ <.*>:
+[ 0-9a-f]+: 4642 mflo v0
+[ 0-9a-f]+: b404 fffe bnez a0,[0-9a-f]+ <.*\+0x[0-9a-f]+>
+[ ]*[0-9a-f]+: R_MICROMIPS_PC16_S1 .*
+[ 0-9a-f]+: 0083 bb3c divu zero,v1,a0
+[ 0-9a-f]+: 4687 break 0x7
+
+[0-9a-f]+ <.*>:
+[ 0-9a-f]+: 4642 mflo v0
+[ 0-9a-f]+: 4687 break 0x7
+[ 0-9a-f]+: 0c64 move v1,a0
+[ 0-9a-f]+: 3020 ffff li at,-1
+[ 0-9a-f]+: 0024 bb3c divu zero,a0,at
+[ 0-9a-f]+: 4643 mflo v1
+[ 0-9a-f]+: 3020 0002 li at,2
+[ 0-9a-f]+: 0024 bb3c divu zero,a0,at
+[ 0-9a-f]+: 4643 mflo v1
+[ 0-9a-f]+: 0000 577c ei
+[ 0-9a-f]+: 0000 577c ei
+[ 0-9a-f]+: 0002 577c ei v0
+[ 0-9a-f]+: 0003 577c ei v1
+[ 0-9a-f]+: 001e 577c ei s8
+[ 0-9a-f]+: 001f 577c ei ra
+[ 0-9a-f]+: 0000 f37c eret
+[ 0-9a-f]+: 0043 716c ext v0,v1,0x5,0xf
+[ 0-9a-f]+: 0043 f82c ext v0,v1,0x0,0x20
+[ 0-9a-f]+: 0043 07ec ext v0,v1,0x1f,0x1
+[ 0-9a-f]+: 03fe 07ec ext ra,s8,0x1f,0x1
+[ 0-9a-f]+: 0043 994c ins v0,v1,0x5,0xf
+[ 0-9a-f]+: 0043 f80c ins v0,v1,0x0,0x20
+[ 0-9a-f]+: 0043 ffcc ins v0,v1,0x1f,0x1
+[ 0-9a-f]+: 4580 jr zero
+[ 0-9a-f]+: 03fe ffcc ins ra,s8,0x1f,0x1
+[ 0-9a-f]+: 45a2 jrc v0
+[ 0-9a-f]+: 45a3 jrc v1
+[ 0-9a-f]+: 45a4 jrc a0
+[ 0-9a-f]+: 45a5 jrc a1
+[ 0-9a-f]+: 45a6 jrc a2
+[ 0-9a-f]+: 45a7 jrc a3
+[ 0-9a-f]+: 45a8 jrc t0
+[ 0-9a-f]+: 45be jrc s8
+[ 0-9a-f]+: 45bf jrc ra
+[ 0-9a-f]+: 0000 0f3c jr zero
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 0002 0f3c jr v0
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 0003 0f3c jr v1
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 0004 0f3c jr a0
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 0005 0f3c jr a1
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 0006 0f3c jr a2
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 0007 0f3c jr a3
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 0008 0f3c jr t0
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 001e 0f3c jr s8
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 001f 0f3c jr ra
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 45a0 jrc zero
+[ 0-9a-f]+: 45a2 jrc v0
+[ 0-9a-f]+: 45a3 jrc v1
+[ 0-9a-f]+: 45a4 jrc a0
+[ 0-9a-f]+: 45a5 jrc a1
+[ 0-9a-f]+: 45a6 jrc a2
+[ 0-9a-f]+: 45a7 jrc a3
+[ 0-9a-f]+: 45a8 jrc t0
+[ 0-9a-f]+: 45be jrc s8
+[ 0-9a-f]+: 45bf jrc ra
+[ 0-9a-f]+: 0000 1f3c jr\.hb zero
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 0002 1f3c jr\.hb v0
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 0003 1f3c jr\.hb v1
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 0004 1f3c jr\.hb a0
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 0005 1f3c jr\.hb a1
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 0006 1f3c jr\.hb a2
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 0007 1f3c jr\.hb a3
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 0008 1f3c jr\.hb t0
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 001e 1f3c jr\.hb s8
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 001f 1f3c jr\.hb ra
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 45a0 jrc zero
+[ 0-9a-f]+: 45a2 jrc v0
+[ 0-9a-f]+: 45a3 jrc v1
+[ 0-9a-f]+: 45a4 jrc a0
+[ 0-9a-f]+: 45a5 jrc a1
+[ 0-9a-f]+: 45a6 jrc a2
+[ 0-9a-f]+: 45a7 jrc a3
+[ 0-9a-f]+: 45a8 jrc t0
+[ 0-9a-f]+: 45be jrc s8
+[ 0-9a-f]+: 45bf jrc ra
+[ 0-9a-f]+: 45c0 jalr zero
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 45c2 jalr v0
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 45c3 jalr v1
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 45c4 jalr a0
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 45c5 jalr a1
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 45c6 jalr a2
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 45c7 jalr a3
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 45c8 jalr t0
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 45de jalr s8
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 03e0 0f3c jalr zero
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 03e2 0f3c jalr v0
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 03e3 0f3c jalr v1
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 03e4 0f3c jalr a0
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 03e5 0f3c jalr a1
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 03e6 0f3c jalr a2
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 03e7 0f3c jalr a3
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 03e8 0f3c jalr t0
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 03fe 0f3c jalr s8
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 45c0 jalr zero
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 45c2 jalr v0
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 45c3 jalr v1
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 45c4 jalr a0
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 45c5 jalr a1
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 45c6 jalr a2
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 45c7 jalr a3
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 45c8 jalr t0
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 45de jalr s8
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 03df 0f3c jalr s8,ra
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 0040 0f3c jalr v0,zero
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 0062 0f3c jalr v1,v0
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 0043 0f3c jalr v0,v1
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 0044 0f3c jalr v0,a0
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 0045 0f3c jalr v0,a1
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 0046 0f3c jalr v0,a2
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 0047 0f3c jalr v0,a3
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 0048 0f3c jalr v0,t0
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 005e 0f3c jalr v0,s8
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 005f 0f3c jalr v0,ra
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 03e0 1f3c jalr\.hb zero
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 03e2 1f3c jalr\.hb v0
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 03e3 1f3c jalr\.hb v1
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 03e4 1f3c jalr\.hb a0
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 03e5 1f3c jalr\.hb a1
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 03e6 1f3c jalr\.hb a2
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 03e7 1f3c jalr\.hb a3
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 03e8 1f3c jalr\.hb t0
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 03fe 1f3c jalr\.hb s8
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 03e0 1f3c jalr\.hb zero
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 03e2 1f3c jalr\.hb v0
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 03e3 1f3c jalr\.hb v1
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 03e4 1f3c jalr\.hb a0
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 03e5 1f3c jalr\.hb a1
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 03e6 1f3c jalr\.hb a2
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 03e7 1f3c jalr\.hb a3
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 03e8 1f3c jalr\.hb t0
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 03fe 1f3c jalr\.hb s8
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 03df 1f3c jalr\.hb s8,ra
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 0040 1f3c jalr\.hb v0,zero
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 0062 1f3c jalr\.hb v1,v0
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 0043 1f3c jalr\.hb v0,v1
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 0044 1f3c jalr\.hb v0,a0
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 0045 1f3c jalr\.hb v0,a1
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 0046 1f3c jalr\.hb v0,a2
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 0047 1f3c jalr\.hb v0,a3
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 0048 1f3c jalr\.hb v0,t0
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 005e 1f3c jalr\.hb v0,s8
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 005f 1f3c jalr\.hb v0,ra
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 0043 0f3c jalr v0,v1
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 03df 0f3c jalr s8,ra
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 45c3 jalr v1
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 45df jalr ra
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: f400 0000 jal [0-9a-f]+ <test>
+[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: f400 0000 jal [0-9a-f]+ <test>
+[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test2
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: f000 0000 jalx [0-9a-f]+ <test>
+[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: f000 0000 jalx [0-9a-f]+ <test>
+[ ]*[0-9a-f]+: R_MICROMIPS_26_S1 test4
+[ 0-9a-f]+: 0000 0000 nop
+[ 0-9a-f]+: 41a2 0000 lui v0,0x0
+[ ]*[0-9a-f]+: R_MICROMIPS_HI16 test
+[ 0-9a-f]+: 3042 0000 addiu v0,v0,0
+[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test
+[ 0-9a-f]+: 41a2 0000 lui v0,0x0
+[ ]*[0-9a-f]+: R_MICROMIPS_HI16 test
+[ 0-9a-f]+: 3042 0000 addiu v0,v0,0
+[ ]*[0-9a-f]+: R_MICROMIPS_LO16 test
+[ 0-9a-f]+: 1c60 0000 lb v1,0\(zero\)
+[ 0-9a-f]+: 1c60 0004 lb v1,4\(zero\)
+[ 0-9a-f]+: 1c60 0000 lb v1,0\(zero\)
+[ 0-9a-f]+: 1c60 0004 lb v1,4\(zero\)
+[ 0-9a-f]+: 1c60 7fff lb v1,32767\(zero\)
+[ 0-9a-f]+: 1c60 8000 lb v1,-32768\(zero\)
+[ 0-9a-f]+: 41a3 0001 lui v1,0x1
+[ 0-9a-f]+: 1c63 ffff lb v1,-1\(v1\)
+[ 0-9a-f]+: 41a3 ffff lui v1,0xffff
+[ 0-9a-f]+: 1c63 0000 lb v1,0\(v1\)
+[ 0-9a-f]+: 1c60 8000 lb v1,-32768\(zero\)
+[ 0-9a-f]+: 41a3 ffff lui v1,0xffff
+[ 0-9a-f]+: 1c63 0001 lb v1,1\(v1\)
+[ 0-9a-f]+: 1c60 8001 lb v1,-32767\(zero\)
+[ 0-9a-f]+: 41a3 f000 lui v1,0xf000
+[ 0-9a-f]+: 1c63 0000 lb v1,0\(v1\)
+[ 0-9a-f]+: 1c60 ffff lb v1,-1\(zero\)
+[ 0-9a-f]+: 41a3 1234 lui v1,0x1234
+[ 0-9a-f]+: 1c63 5678 lb v1,22136\(v1\)
+[ 0-9a-f]+: 1c64 0000 lb v1,0\(a0\)
+[ 0-9a-f]+: 1c64 0000 lb v1,0\(a0\)
+[ 0-9a-f]+: 1c64 0004 lb v1,4\(a0\)
+[ 0-9a-f]+: 1c64 7fff lb v1,32767\(a0\)
+[ 0-9a-f]+: 1c64 8000 lb v1,-32768\(a0\)
+[ 0-9a-f]+: 41a3 0001 lui v1,0x1
+[ 0-9a-f]+: 0083 1950 addu v1,v1,a0
+[ 0-9a-f]+: 1c63 ffff lb v1,-1\(v1\)
+[ 0-9a-f]+: 41a3 ffff lui v1,0xffff
+[ 0-9a-f]+: 0083 1950 addu v1,v1,a0
+[ 0-9a-f]+: 1c63 0000 lb v1,0\(v1\)
+[ 0-9a-f]+: 1c64 8000 lb v1,-32768\(a0\)
+[ 0-9a-f]+: 41a3 ffff lui v1,0xffff
+[ 0-9a-f]+: 0083 1950 addu v1,v1,a0
+[ 0-9a-f]+: 1c63 0001 lb v1,1\(v1\)
+[ 0-9a-f]+: 1c64 8001 lb v1,-32767\(a0\)
+[ 0-9a-f]+: 41a3 f000 lui v1,0xf000
+[ 0-9a-f]+: 0083 1950 addu v1,v1,a0
+[ 0-9a-f]+: 1c63 0000 lb v1,0\(v1\)
+[ 0-9a-f]+: 1c64 ffff lb v1,-1\(a0\)
+[ 0-9a-f]+: 41a3 1234 lui v1,0x1234
+[ 0-9a-f]+: 0083 1950 addu v1,v1,a0
+[ 0-9a-f]+: 1c63 5678 lb v1,22136\(v1\)
+[ 0-9a-f]+: 093f lbu v0,-1\(v1\)
+[ 0-9a-f]+: 0930 lbu v0,0\(v1\)
+[ 0-9a-f]+: 0930 lbu v0,0\(v1\)
+[ 0-9a-f]+: 0931 lbu v0,1\(v1\)
+[ 0-9a-f]+: 0932 lbu v0,2\(v1\)
+[ 0-9a-f]+: 0933 lbu v0,3\(v1\)
+[ 0-9a-f]+: 0934 lbu v0,4\(v1\)
+[ 0-9a-f]+: 0935 lbu v0,5\(v1\)
+[ 0-9a-f]+: 0936 lbu v0,6\(v1\)
+[ 0-9a-f]+: 0937 lbu v0,7\(v1\)
+[ 0-9a-f]+: 0938 lbu v0,8\(v1\)
+[ 0-9a-f]+: 0939 lbu v0,9\(v1\)
+[ 0-9a-f]+: 093a lbu v0,10\(v1\)
+[ 0-9a-f]+: 093b lbu v0,11\(v1\)
+[ 0-9a-f]+: 093c lbu v0,12\(v1\)
+[ 0-9a-f]+: 093d lbu v0,13\(v1\)
+[ 0-9a-f]+: 093e lbu v0,14\(v1\)
+[ 0-9a-f]+: 092e lbu v0,14\(v0\)
+[ 0-9a-f]+: 094e lbu v0,14\(a0\)
+[ 0-9a-f]+: 095e lbu v0,14\(a1\)
+[ 0-9a-f]+: 096e lbu v0,14\(a2\)
+[ 0-9a-f]+: 097e lbu v0,14\(a3\)
+[ 0-9a-f]+: 090e lbu v0,14\(s0\)
+[ 0-9a-f]+: 091e lbu v0,14\(s1\)
+[ 0-9a-f]+: 099e lbu v1,14\(s1\)
+[ 0-9a-f]+: 0a1e lbu a0,14\(s1\)
+[ 0-9a-f]+: 0a9e lbu a1,14\(s1\)
+[ 0-9a-f]+: 0b1e lbu a2,14\(s1\)
+[ 0-9a-f]+: 0b9e lbu a3,14\(s1\)
+[ 0-9a-f]+: 081e lbu s0,14\(s1\)
+[ 0-9a-f]+: 089e lbu s1,14\(s1\)
+[ 0-9a-f]+: 1460 0000 lbu v1,0\(zero\)
+[ 0-9a-f]+: 1460 0004 lbu v1,4\(zero\)
+[ 0-9a-f]+: 1460 0000 lbu v1,0\(zero\)
+[ 0-9a-f]+: 1460 0004 lbu v1,4\(zero\)
+[ 0-9a-f]+: 1460 7fff lbu v1,32767\(zero\)
+[ 0-9a-f]+: 1460 8000 lbu v1,-32768\(zero\)
+[ 0-9a-f]+: 41a3 0001 lui v1,0x1
+[ 0-9a-f]+: 1463 ffff lbu v1,-1\(v1\)
+[ 0-9a-f]+: 41a3 ffff lui v1,0xffff
+[ 0-9a-f]+: 1463 0000 lbu v1,0\(v1\)
+[ 0-9a-f]+: 1460 8000 lbu v1,-32768\(zero\)
+[ 0-9a-f]+: 41a3 ffff lui v1,0xffff
+[ 0-9a-f]+: 1463 0001 lbu v1,1\(v1\)
+[ 0-9a-f]+: 1460 8001 lbu v1,-32767\(zero\)
+[ 0-9a-f]+: 41a3 f000 lui v1,0xf000
+[ 0-9a-f]+: 1463 0000 lbu v1,0\(v1\)
+[ 0-9a-f]+: 1460 ffff lbu v1,-1\(zero\)
+[ 0-9a-f]+: 41a3 1234 lui v1,0x1234
+[ 0-9a-f]+: 1463 5678 lbu v1,22136\(v1\)
+[ 0-9a-f]+: 09c0 lbu v1,0\(a0\)
+[ 0-9a-f]+: 09c0 lbu v1,0\(a0\)
+[ 0-9a-f]+: 09c4 lbu v1,4\(a0\)
+[ 0-9a-f]+: 1464 7fff lbu v1,32767\(a0\)
+[ 0-9a-f]+: 1464 8000 lbu v1,-32768\(a0\)
+[ 0-9a-f]+: 41a3 0001 lui v1,0x1
+[ 0-9a-f]+: 0083 1950 addu v1,v1,a0
+[ 0-9a-f]+: 1463 ffff lbu v1,-1\(v1\)
+[ 0-9a-f]+: 41a3 ffff lui v1,0xffff
+[ 0-9a-f]+: 0083 1950 addu v1,v1,a0
+[ 0-9a-f]+: 1463 0000 lbu v1,0\(v1\)
+[ 0-9a-f]+: 1464 8000 lbu v1,-32768\(a0\)
+[ 0-9a-f]+: 41a3 ffff lui v1,0xffff
+[ 0-9a-f]+: 0083 1950 addu v1,v1,a0
+[ 0-9a-f]+: 1463 0001 lbu v1,1\(v1\)
+[ 0-9a-f]+: 1464 8001 lbu v1,-32767\(a0\)
+[ 0-9a-f]+: 41a3 f000 lui v1,0xf000
+[ 0-9a-f]+: 0083 1950 addu v1,v1,a0
+[ 0-9a-f]+: 1463 0000 lbu v1,0\(v1\)
+[ 0-9a-f]+: 1464 ffff lbu v1,-1\(a0\)
+[ 0-9a-f]+: 41a3 1234 lui v1,0x1234
+[ 0-9a-f]+: 0083 1950 addu v1,v1,a0
+[ 0-9a-f]+: 1463 5678 lbu v1,22136\(v1\)
+[ 0-9a-f]+: 3c60 0000 lh v1,0\(zero\)
+[ 0-9a-f]+: 3c60 0004 lh v1,4\(zero\)
+[ 0-9a-f]+: 3c60 0000 lh v1,0\(zero\)
+[ 0-9a-f]+: 3c60 0004 lh v1,4\(zero\)
+[ 0-9a-f]+: 3c60 7fff lh v1,32767\(zero\)
+[ 0-9a-f]+: 3c60 8000 lh v1,-32768\(zero\)
+[ 0-9a-f]+: 41a3 0001 lui v1,0x1
+[ 0-9a-f]+: 3c63 ffff lh v1,-1\(v1\)
+[ 0-9a-f]+: 41a3 ffff lui v1,0xffff
+[ 0-9a-f]+: 3c63 0000 lh v1,0\(v1\)
+[ 0-9a-f]+: 3c60 8000 lh v1,-32768\(zero\)
+[ 0-9a-f]+: 41a3 ffff lui v1,0xffff
+[ 0-9a-f]+: 3c63 0001 lh v1,1\(v1\)
+[ 0-9a-f]+: 3c60 8001 lh v1,-32767\(zero\)
+[ 0-9a-f]+: 41a3 f000 lui v1,0xf000
+[ 0-9a-f]+: 3c63 0000 lh v1,0\(v1\)
+[ 0-9a-f]+: 3c60 ffff lh v1,-1\(zero\)
+[ 0-9a-f]+: 41a3 1234 lui v1,0x1234
+[ 0-9a-f]+: 3c63 5678 lh v1,22136\(v1\)
+[ 0-9a-f]+: 3c64 0000 lh v1,0\(a0\)
+[ 0-9a-f]+: 3c64 0000 lh v1,0\(a0\)
+[ 0-9a-f]+: 3c64 0004 lh v1,4\(a0\)
+[ 0-9a-f]+: 3c64 7fff lh v1,32767\(a0\)
+[ 0-9a-f]+: 3c64 8000 lh v1,-32768\(a0\)
+[ 0-9a-f]+: 41a3 0001 lui v1,0x1
+[ 0-9a-f]+: 0083 1950 addu v1,v1,a0
+[ 0-9a-f]+: 3c63 ffff lh v1,-1\(v1\)
+[ 0-9a-f]+: 41a3 ffff lui v1,0xffff
+[ 0-9a-f]+: 0083 1950 addu v1,v1,a0
+[ 0-9a-f]+: 3c63 0000 lh v1,0\(v1\)
+[ 0-9a-f]+: 3c64 8000 lh v1,-32768\(a0\)
+[ 0-9a-f]+: 41a3 ffff lui v1,0xffff
+[ 0-9a-f]+: 0083 1950 addu v1,v1,a0
+[ 0-9a-f]+: 3c63 0001 lh v1,1\(v1\)
+[ 0-9a-f]+: 3c64 8001 lh v1,-32767\(a0\)
+[ 0-9a-f]+: 41a3 f000 lui v1,0xf000
+[ 0-9a-f]+: 0083 1950 addu v1,v1,a0
+[ 0-9a-f]+: 3c63 0000 lh v1,0\(v1\)
+[ 0-9a-f]+: 3c64 ffff lh v1,-1\(a0\)
+[ 0-9a-f]+: 41a3 1234 lui v1,0x1234
+[ 0-9a-f]+: 0083 1950 addu v1,v1,a0
+[ 0-9a-f]+: 3c63 5678 lh v1,22136\(v1\)
+[ 0-9a-f]+: 2930 lhu v0,0\(v1\)
+[ 0-9a-f]+: 2930 lhu v0,0\(v1\)
+[ 0-9a-f]+: 2931 lhu v0,2\(v1\)
+[ 0-9a-f]+: 2932 lhu v0,4\(v1\)
+[ 0-9a-f]+: 2933 lhu v0,6\(v1\)
+[ 0-9a-f]+: 2934 lhu v0,8\(v1\)
+[ 0-9a-f]+: 2935 lhu v0,10\(v1\)
+[ 0-9a-f]+: 2936 lhu v0,12\(v1\)
+[ 0-9a-f]+: 2937 lhu v0,14\(v1\)
+[ 0-9a-f]+: 2938 lhu v0,16\(v1\)
+[ 0-9a-f]+: 2939 lhu v0,18\(v1\)
+[ 0-9a-f]+: 293a lhu v0,20\(v1\)
+[ 0-9a-f]+: 293b lhu v0,22\(v1\)
+[ 0-9a-f]+: 293c lhu v0,24\(v1\)
+[ 0-9a-f]+: 293d lhu v0,26\(v1\)
+[ 0-9a-f]+: 293e lhu v0,28\(v1\)
+[ 0-9a-f]+: 293f lhu v0,30\(v1\)
+[ 0-9a-f]+: 294f lhu v0,30\(a0\)
+[ 0-9a-f]+: 295f lhu v0,30\(a1\)
+[ 0-9a-f]+: 296f lhu v0,30\(a2\)
+[ 0-9a-f]+: 297f lhu v0,30\(a3\)
+[ 0-9a-f]+: 292f lhu v0,30\(v0\)
+[ 0-9a-f]+: 290f lhu v0,30\(s0\)
+[ 0-9a-f]+: 291f lhu v0,30\(s1\)
+[ 0-9a-f]+: 299f lhu v1,30\(s1\)
+[ 0-9a-f]+: 2a1f lhu a0,30\(s1\)
+[ 0-9a-f]+: 2a9f lhu a1,30\(s1\)
+[ 0-9a-f]+: 2b1f lhu a2,30\(s1\)
+[ 0-9a-f]+: 2b9f lhu a3,30\(s1\)
+[ 0-9a-f]+: 281f lhu s0,30\(s1\)
+[ 0-9a-f]+: 289f lhu s1,30\(s1\)
+[ 0-9a-f]+: 3460 0000 lhu v1,0\(zero\)
+[ 0-9a-f]+: 3460 0004 lhu v1,4\(zero\)
+[ 0-9a-f]+: 3460 0000 lhu v1,0\(zero\)
+[ 0-9a-f]+: 3460 0004 lhu v1,4\(zero\)
+[ 0-9a-f]+: 3460 7fff lhu v1,32767\(zero\)
+[ 0-9a-f]+: 3460 8000 lhu v1,-32768\(zero\)
+[ 0-9a-f]+: 41a3 0001 lui v1,0x1
+[ 0-9a-f]+: 3463 ffff lhu v1,-1\(v1\)
+[ 0-9a-f]+: 41a3 ffff lui v1,0xffff
+[ 0-9a-f]+: 3463 0000 lhu v1,0\(v1\)
+[ 0-9a-f]+: 3460 8000 lhu v1,-32768\(zero\)
+[ 0-9a-f]+: 41a3 ffff lui v1,0xffff
+[ 0-9a-f]+: 3463 0001 lhu v1,1\(v1\)
+[ 0-9a-f]+: 3460 8001 lhu v1,-32767\(zero\)
+[ 0-9a-f]+: 41a3 f000 lui v1,0xf000
+[ 0-9a-f]+: 3463 0000 lhu v1,0\(v1\)
+[ 0-9a-f]+: 3460 ffff lhu v1,-1\(zero\)
+[ 0-9a-f]+: 41a3 1234 lui v1,0x1234
+[ 0-9a-f]+: 3463 5678 lhu v1,22136\(v1\)
+[ 0-9a-f]+: 29c0 lhu v1,0\(a0\)
+[ 0-9a-f]+: 29c0 lhu v1,0\(a0\)
+[ 0-9a-f]+: 29c2 lhu v1,4\(a0\)
+[ 0-9a-f]+: 3464 7fff lhu v1,32767\(a0\)
+[ 0-9a-f]+: 3464 8000 lhu v1,-32768\(a0\)
+[ 0-9a-f]+: 41a3 0001 lui v1,0x1
+[ 0-9a-f]+: 0083 1950 addu v1,v1,a0
+[ 0-9a-f]+: 3463 ffff lhu v1,-1\(v1\)
+[ 0-9a-f]+: 41a3 ffff lui v1,0xffff
+[ 0-9a-f]+: 0083 1950 addu v1,v1,a0
+[ 0-9a-f]+: 3463 0000 lhu v1,0\(v1\)
+[ 0-9a-f]+: 3464 8000 lhu v1,-32768\(a0\)
+[ 0-9a-f]+: 41a3 ffff lui v1,0xffff
+[ 0-9a-f]+: 0083 1950 addu v1,v1,a0
+[ 0-9a-f]+: 3463 0001 lhu v1,1\(v1\)
+[ 0-9a-f]+: 3464 8001 lhu v1,-32767\(a0\)
+[ 0-9a-f]+: 41a3 f000 lui v1,0xf000
+[ 0-9a-f]+: 0083 1950 addu v1,v1,a0
+[ 0-9a-f]+: 3463 0000 lhu v1,0\(v1\)
+[ 0-9a-f]+: 3464 ffff lhu v1,-1\(a0\)
+[ 0-9a-f]+: 41a3 1234 lui v1,0x1234
+[ 0-9a-f]+: 0083 1950 addu v1,v1,a0
+[ 0-9a-f]+: 3463 5678 lhu v1,22136\(v1\)
+[ 0-9a-f]+: 6060 3000 ll v1,0\(zero\)
+[ 0-9a-f]+: 6060 3000 ll v1,0\(zero\)
+[ 0-9a-f]+: 6060 3004 ll v1,4\(zero\)
+[ 0-9a-f]+: 6060 3004 ll v1,4\(zero\)
+[ 0-9a-f]+: 3060 7fff li v1,32767
+[ 0-9a-f]+: 6063 3000 ll v1,0\(v1\)
+[ 0-9a-f]+: 3060 8000 li v1,-32768
+[ 0-9a-f]+: 6063 3000 ll v1,0\(v1\)
+[ 0-9a-f]+: 41a3 0001 lui v1,0x1
+[ 0-9a-f]+: 6063 3fff ll v1,-1\(v1\)
+[ 0-9a-f]+: 41a3 ffff lui v1,0xffff
+[ 0-9a-f]+: 6063 3000 ll v1,0\(v1\)
+[ 0-9a-f]+: 3060 8000 li v1,-32768
+[ 0-9a-f]+: 6063 3000 ll v1,0\(v1\)
+[ 0-9a-f]+: 41a3 ffff lui v1,0xffff
+[ 0-9a-f]+: 6063 3001 ll v1,1\(v1\)
+[ 0-9a-f]+: 3060 8001 li v1,-32767
+[ 0-9a-f]+: 6063 3000 ll v1,0\(v1\)
+[ 0-9a-f]+: 41a3 f000 lui v1,0xf000
+[ 0-9a-f]+: 6063 3000 ll v1,0\(v1\)
+[ 0-9a-f]+: 6060 3fff ll v1,-1\(zero\)
+[ 0-9a-f]+: 41a3 1234 lui v1,0x1234
+[ 0-9a-f]+: 5063 5000 ori v1,v1,0x5000
+[ 0-9a-f]+: 6063 3678 ll v1,1656\(v1\)
+[ 0-9a-f]+: 6064 3000 ll v1,0\(a0\)
+[ 0-9a-f]+: 6064 3000 ll v1,0\(a0\)
+[ 0-9a-f]+: 6064 3004 ll v1,4\(a0\)
+[ 0-9a-f]+: 3064 7fff addiu v1,a0,32767
+[ 0-9a-f]+: 6063 3000 ll v1,0\(v1\)
+[ 0-9a-f]+: 3064 8000 addiu v1,a0,-32768
+[ 0-9a-f]+: 6063 3000 ll v1,0\(v1\)
+[ 0-9a-f]+: 41a3 0001 lui v1,0x1
+[ 0-9a-f]+: 0083 1950 addu v1,v1,a0
+[ 0-9a-f]+: 6063 3fff ll v1,-1\(v1\)
+[ 0-9a-f]+: 41a3 ffff lui v1,0xffff
+[ 0-9a-f]+: 0083 1950 addu v1,v1,a0
+[ 0-9a-f]+: 6063 3000 ll v1,0\(v1\)
+[ 0-9a-f]+: 3064 8000 addiu v1,a0,-32768
+[ 0-9a-f]+: 6063 3000 ll v1,0\(v1\)
+[ 0-9a-f]+: 41a3 ffff lui v1,0xffff
+[ 0-9a-f]+: 0083 1950 addu v1,v1,a0
+[ 0-9a-f]+: 6063 3001 ll v1,1\(v1\)
+[ 0-9a-f]+: 3064 8001 addiu v1,a0,-32767
+[ 0-9a-f]+: 6063 3000 ll v1,0\(v1\)
+[ 0-9a-f]+: 41a3 f000 lui v1,0xf000
+[ 0-9a-f]+: 0083 1950 addu v1,v1,a0
+[ 0-9a-f]+: 6063 3000 ll v1,0\(v1\)
+[ 0-9a-f]+: 6064 3fff ll v1,-1\(a0\)
+[ 0-9a-f]+: 41a3 1234 lui v1,0x1234
+[ 0-9a-f]+: 5063 5000 ori v1,v1,0x5000
+[ 0-9a-f]+: 0083 1950 addu v1,v1,a0
+[ 0-9a-f]+: 6063 3678 ll v1,1656\(v1\)
+[ 0-9a-f]+: 41a3 0000 lui v1,0x0
+[ 0-9a-f]+: 41a3 7fff lui v1,0x7fff
+[ 0-9a-f]+: 41a3 ffff lui v1,0xffff
+[ 0-9a-f]+: 6940 lw v0,0\(a0\)
+[ 0-9a-f]+: 6940 lw v0,0\(a0\)
+[ 0-9a-f]+: 6941 lw v0,4\(a0\)
+[ 0-9a-f]+: 6942 lw v0,8\(a0\)
+[ 0-9a-f]+: 6943 lw v0,12\(a0\)
+[ 0-9a-f]+: 6944 lw v0,16\(a0\)
+[ 0-9a-f]+: 6945 lw v0,20\(a0\)
+[ 0-9a-f]+: 6946 lw v0,24\(a0\)
+[ 0-9a-f]+: 6947 lw v0,28\(a0\)
+[ 0-9a-f]+: 6948 lw v0,32\(a0\)
+[ 0-9a-f]+: 6949 lw v0,36\(a0\)
+[ 0-9a-f]+: 694a lw v0,40\(a0\)
+[ 0-9a-f]+: 694b lw v0,44\(a0\)
+[ 0-9a-f]+: 694c lw v0,48\(a0\)
+[ 0-9a-f]+: 694d lw v0,52\(a0\)
+[ 0-9a-f]+: 694e lw v0,56\(a0\)
+[ 0-9a-f]+: 694f lw v0,60\(a0\)
+[ 0-9a-f]+: 695f lw v0,60\(a1\)
+[ 0-9a-f]+: 696f lw v0,60\(a2\)
+[ 0-9a-f]+: 697f lw v0,60\(a3\)
+[ 0-9a-f]+: 692f lw v0,60\(v0\)
+[ 0-9a-f]+: 693f lw v0,60\(v1\)
+[ 0-9a-f]+: 690f lw v0,60\(s0\)
+[ 0-9a-f]+: 691f lw v0,60\(s1\)
+[ 0-9a-f]+: 699f lw v1,60\(s1\)
+[ 0-9a-f]+: 6a1f lw a0,60\(s1\)
+[ 0-9a-f]+: 6a9f lw a1,60\(s1\)
+[ 0-9a-f]+: 6b1f lw a2,60\(s1\)
+[ 0-9a-f]+: 6b9f lw a3,60\(s1\)
+[ 0-9a-f]+: 681f lw s0,60\(s1\)
+[ 0-9a-f]+: 689f lw s1,60\(s1\)
+[ 0-9a-f]+: 4880 lw a0,0\(sp\)
+[ 0-9a-f]+: 4880 lw a0,0\(sp\)
+[ 0-9a-f]+: 4881 lw a0,4\(sp\)
+[ 0-9a-f]+: 4882 lw a0,8\(sp\)
+[ 0-9a-f]+: 4883 lw a0,12\(sp\)
+[ 0-9a-f]+: 4884 lw a0,16\(sp\)
+[ 0-9a-f]+: 4885 lw a0,20\(sp\)
+[ 0-9a-f]+: 489f lw a0,124\(sp\)
+[ 0-9a-f]+: 485f lw v0,124\(sp\)
+[ 0-9a-f]+: 485f lw v0,124\(sp\)
+[ 0-9a-f]+: 487f lw v1,124\(sp\)
+[ 0-9a-f]+: 489f lw a0,124\(sp\)
+[ 0-9a-f]+: 48bf lw a1,124\(sp\)
+[ 0-9a-f]+: 48df lw a2,124\(sp\)
+[ 0-9a-f]+: 48ff lw a3,124\(sp\)
+[ 0-9a-f]+: 491f lw t0,124\(sp\)
+[ 0-9a-f]+: 493f lw t1,124\(sp\)
+[ 0-9a-f]+: 495f lw t2,124\(sp\)
+[ 0-9a-f]+: 4bdf lw s8,124\(sp\)
+[ 0-9a-f]+: 4bff lw ra,124\(sp\)
+[ 0-9a-f]+: fc9d 01f8 lw a0,504\(sp\)
+[ 0-9a-f]+: fc9d 01fc lw a0,508\(sp\)
+[ 0-9a-f]+: fe1d 01fc lw s0,508\(sp\)
+[ 0-9a-f]+: fe3d 01fc lw s1,508\(sp\)
+[ 0-9a-f]+: fe5d 01fc lw s2,508\(sp\)
+[ 0-9a-f]+: fe7d 01fc lw s3,508\(sp\)
+[ 0-9a-f]+: fe9d 01fc lw s4,508\(sp\)
+[ 0-9a-f]+: febd 01fc lw s5,508\(sp\)
+[ 0-9a-f]+: fffd 01fc lw ra,508\(sp\)
+[ 0-9a-f]+: fc60 0000 lw v1,0\(zero\)
+[ 0-9a-f]+: fc60 0004 lw v1,4\(zero\)
+[ 0-9a-f]+: fc60 0000 lw v1,0\(zero\)
+[ 0-9a-f]+: fc60 0000 lw v1,0\(zero\)
+[ 0-9a-f]+: fc60 0000 lw v1,0\(zero\)
+[ 0-9a-f]+: fc60 0004 lw v1,4\(zero\)
+[ 0-9a-f]+: fc60 7fff lw v1,32767\(zero\)
+[ 0-9a-f]+: fc60 8000 lw v1,-32768\(zero\)
+[ 0-9a-f]+: 41a3 0001 lui v1,0x1
+[ 0-9a-f]+: fc63 ffff lw v1,-1\(v1\)
+[ 0-9a-f]+: 41a3 ffff lui v1,0xffff
+[ 0-9a-f]+: fc63 0000 lw v1,0\(v1\)
+[ 0-9a-f]+: fc60 8000 lw v1,-32768\(zero\)
+[ 0-9a-f]+: 41a3 ffff lui v1,0xffff
+[ 0-9a-f]+: fc63 0001 lw v1,1\(v1\)
+[ 0-9a-f]+: fc60 8001 lw v1,-32767\(zero\)
+[ 0-9a-f]+: 41a3 f000 lui v1,0xf000
+[ 0-9a-f]+: fc63 0000 lw v1,0\(v1\)
+[ 0-9a-f]+: fc60 ffff lw v1,-1\(zero\)
+[ 0-9a-f]+: 41a3 1234 lui v1,0x1234
+[ 0-9a-f]+: fc63 5678 lw v1,22136\(v1\)
+[ 0-9a-f]+: 69c0 lw v1,0\(a0\)
+[ 0-9a-f]+: 69c0 lw v1,0\(a0\)
+[ 0-9a-f]+: 69c1 lw v1,4\(a0\)
+[ 0-9a-f]+: fc64 7fff lw v1,32767\(a0\)
+[ 0-9a-f]+: fc64 8000 lw v1,-32768\(a0\)
+[ 0-9a-f]+: 41a3 0001 lui v1,0x1
+[ 0-9a-f]+: 0083 1950 addu v1,v1,a0
+[ 0-9a-f]+: fc63 ffff lw v1,-1\(v1\)
+[ 0-9a-f]+: 41a3 ffff lui v1,0xffff
+[ 0-9a-f]+: 0083 1950 addu v1,v1,a0
+[ 0-9a-f]+: fc63 0000 lw v1,0\(v1\)
+[ 0-9a-f]+: fc64 8000 lw v1,-32768\(a0\)
+[ 0-9a-f]+: 41a3 ffff lui v1,0xffff
+[ 0-9a-f]+: 0083 1950 addu v1,v1,a0
+[ 0-9a-f]+: fc63 0001 lw v1,1\(v1\)
+[ 0-9a-f]+: fc64 8001 lw v1,-32767\(a0\)
+[ 0-9a-f]+: 41a3 f000 lui v1,0xf000
+[ 0-9a-f]+: 0083 1950 addu v1,v1,a0
+[ 0-9a-f]+: fc63 0000 lw v1,0\(v1\)
+[ 0-9a-f]+: fc64 ffff lw v1,-1\(a0\)
+[ 0-9a-f]+: 41a3 1234 lui v1,0x1234
+[ 0-9a-f]+: 0083 1950 addu v1,v1,a0
+[ 0-9a-f]+: fc63 5678 lw v1,22136\(v1\)
+[ 0-9a-f]+: 450c lwm s0,ra,48\(sp\)
+[ 0-9a-f]+: 451c lwm s0-s1,ra,48\(sp\)
+[ 0-9a-f]+: 451c lwm s0-s1,ra,48\(sp\)
+[ 0-9a-f]+: 452c lwm s0-s2,ra,48\(sp\)
+[ 0-9a-f]+: 452c lwm s0-s2,ra,48\(sp\)
+[ 0-9a-f]+: 453c lwm s0-s3,ra,48\(sp\)
+[ 0-9a-f]+: 453c lwm s0-s3,ra,48\(sp\)
+[ 0-9a-f]+: 4500 lwm s0,ra,0\(sp\)
+[ 0-9a-f]+: 4500 lwm s0,ra,0\(sp\)
+[ 0-9a-f]+: 4501 lwm s0,ra,4\(sp\)
+[ 0-9a-f]+: 4502 lwm s0,ra,8\(sp\)
+[ 0-9a-f]+: 4503 lwm s0,ra,12\(sp\)
+[ 0-9a-f]+: 4504 lwm s0,ra,16\(sp\)
+[ 0-9a-f]+: 4505 lwm s0,ra,20\(sp\)
+[ 0-9a-f]+: 4506 lwm s0,ra,24\(sp\)
+[ 0-9a-f]+: 4507 lwm s0,ra,28\(sp\)
+[ 0-9a-f]+: 4508 lwm s0,ra,32\(sp\)
+[ 0-9a-f]+: 4509 lwm s0,ra,36\(sp\)
+[ 0-9a-f]+: 450a lwm s0,ra,40\(sp\)
+[ 0-9a-f]+: 450b lwm s0,ra,44\(sp\)
+[ 0-9a-f]+: 450c lwm s0,ra,48\(sp\)
+[ 0-9a-f]+: 450d lwm s0,ra,52\(sp\)
+[ 0-9a-f]+: 450e lwm s0,ra,56\(sp\)
+[ 0-9a-f]+: 450f lwm s0,ra,60\(sp\)
+[ 0-9a-f]+: 2020 5000 lwm s0,0\(zero\)
+[ 0-9a-f]+: 2020 5004 lwm s0,4\(zero\)
+[ 0-9a-f]+: 2025 5000 lwm s0,0\(a1\)
+[ 0-9a-f]+: 2025 57ff lwm s0,2047\(a1\)
+[ 0-9a-f]+: 2045 57ff lwm s0-s1,2047\(a1\)
+[ 0-9a-f]+: 2065 57ff lwm s0-s2,2047\(a1\)
+[ 0-9a-f]+: 2085 57ff lwm s0-s3,2047\(a1\)
+[ 0-9a-f]+: 20a5 57ff lwm s0-s4,2047\(a1\)
+[ 0-9a-f]+: 20c5 57ff lwm s0-s5,2047\(a1\)
+[ 0-9a-f]+: 20e5 57ff lwm s0-s6,2047\(a1\)
+[ 0-9a-f]+: 2105 57ff lwm s0-s7,2047\(a1\)
+[ 0-9a-f]+: 2125 57ff lwm s0-s7,s8,2047\(a1\)
+[ 0-9a-f]+: 2205 57ff lwm ra,2047\(a1\)
+[ 0-9a-f]+: 2225 5000 lwm s0,ra,0\(a1\)
+[ 0-9a-f]+: 2245 5000 lwm s0-s1,ra,0\(a1\)
+[ 0-9a-f]+: 2265 5000 lwm s0-s2,ra,0\(a1\)
+[ 0-9a-f]+: 2285 5000 lwm s0-s3,ra,0\(a1\)
+[ 0-9a-f]+: 22a5 5000 lwm s0-s4,ra,0\(a1\)
+[ 0-9a-f]+: 22c5 5000 lwm s0-s5,ra,0\(a1\)
+[ 0-9a-f]+: 22e5 5000 lwm s0-s6,ra,0\(a1\)
+[ 0-9a-f]+: 2305 5000 lwm s0-s7,ra,0\(a1\)
+[ 0-9a-f]+: 2325 5000 lwm s0-s7,s8,ra,0\(a1\)
+[ 0-9a-f]+: 3020 8000 li at,-32768
+[ 0-9a-f]+: 2021 5000 lwm s0,0\(at\)
+[ 0-9a-f]+: 3020 7fff li at,32767
+[ 0-9a-f]+: 2021 5000 lwm s0,0\(at\)
+[ 0-9a-f]+: 2020 5000 lwm s0,0\(zero\)
+[ 0-9a-f]+: 41a1 0001 lui at,0x1
+[ 0-9a-f]+: 2021 5fff lwm s0,-1\(at\)
+[ 0-9a-f]+: 303d 8000 addiu at,sp,-32768
+[ 0-9a-f]+: 2021 5000 lwm s0,0\(at\)
+[ 0-9a-f]+: 303d 7fff addiu at,sp,32767
+[ 0-9a-f]+: 2021 5000 lwm s0,0\(at\)
+[ 0-9a-f]+: 203d 5000 lwm s0,0\(sp\)
+[ 0-9a-f]+: 41a1 0001 lui at,0x1
+[ 0-9a-f]+: 03a1 0950 addu at,at,sp
+[ 0-9a-f]+: 2021 5fff lwm s0,-1\(at\)
+[ 0-9a-f]+: 2040 1000 lwp v0,0\(zero\)
+[ 0-9a-f]+: 2040 1004 lwp v0,4\(zero\)
+[ 0-9a-f]+: 205d 1000 lwp v0,0\(sp\)
+[ 0-9a-f]+: 205d 1000 lwp v0,0\(sp\)
+[ 0-9a-f]+: 2043 1800 lwp v0,-2048\(v1\)
+[ 0-9a-f]+: 2043 17ff lwp v0,2047\(v1\)
+[ 0-9a-f]+: 3023 8000 addiu at,v1,-32768
+[ 0-9a-f]+: 2041 1000 lwp v0,0\(at\)
+[ 0-9a-f]+: 3023 7fff addiu at,v1,32767
+[ 0-9a-f]+: 2041 1000 lwp v0,0\(at\)
+[ 0-9a-f]+: 2043 1000 lwp v0,0\(v1\)
+[ 0-9a-f]+: 41a1 0001 lui at,0x1
+[ 0-9a-f]+: 0061 0950 addu at,at,v1
+[ 0-9a-f]+: 2041 1fff lwp v0,-1\(at\)
+[ 0-9a-f]+: 3060 8000 li v1,-32768
+[ 0-9a-f]+: 2043 1000 lwp v0,0\(v1\)
+[ 0-9a-f]+: 3060 7fff li v1,32767
+[ 0-9a-f]+: 2043 1000 lwp v0,0\(v1\)
+[ 0-9a-f]+: 41a3 0001 lui v1,0x1
+[ 0-9a-f]+: 2043 1fff lwp v0,-1\(v1\)
+[ 0-9a-f]+: 6060 0004 lwl v1,4\(zero\)
+[ 0-9a-f]+: 6060 0004 lwl v1,4\(zero\)
+[ 0-9a-f]+: 6060 0000 lwl v1,0\(zero\)
+[ 0-9a-f]+: 6060 0000 lwl v1,0\(zero\)
+[ 0-9a-f]+: 6060 07ff lwl v1,2047\(zero\)
+[ 0-9a-f]+: 6060 0800 lwl v1,-2048\(zero\)
+[ 0-9a-f]+: 3020 7fff li at,32767
+[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\)
+[ 0-9a-f]+: 3020 8000 li at,-32768
+[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\)
+[ 0-9a-f]+: 41a1 0001 lui at,0x1
+[ 0-9a-f]+: 6061 0fff lwl v1,-1\(at\)
+[ 0-9a-f]+: 41a1 ffff lui at,0xffff
+[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\)
+[ 0-9a-f]+: 3020 8000 li at,-32768
+[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\)
+[ 0-9a-f]+: 41a1 ffff lui at,0xffff
+[ 0-9a-f]+: 6061 0001 lwl v1,1\(at\)
+[ 0-9a-f]+: 3020 8001 li at,-32767
+[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\)
+[ 0-9a-f]+: 41a1 f000 lui at,0xf000
+[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\)
+[ 0-9a-f]+: 6060 0fff lwl v1,-1\(zero\)
+[ 0-9a-f]+: 41a1 1234 lui at,0x1234
+[ 0-9a-f]+: 5021 5000 ori at,at,0x5000
+[ 0-9a-f]+: 6061 0678 lwl v1,1656\(at\)
+[ 0-9a-f]+: 6064 0000 lwl v1,0\(a0\)
+[ 0-9a-f]+: 6064 0000 lwl v1,0\(a0\)
+[ 0-9a-f]+: 6064 07ff lwl v1,2047\(a0\)
+[ 0-9a-f]+: 6064 0800 lwl v1,-2048\(a0\)
+[ 0-9a-f]+: 3024 7fff addiu at,a0,32767
+[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\)
+[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768
+[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\)
+[ 0-9a-f]+: 41a1 0001 lui at,0x1
+[ 0-9a-f]+: 0081 0950 addu at,at,a0
+[ 0-9a-f]+: 6061 0fff lwl v1,-1\(at\)
+[ 0-9a-f]+: 41a1 ffff lui at,0xffff
+[ 0-9a-f]+: 0081 0950 addu at,at,a0
+[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\)
+[ 0-9a-f]+: 3024 8000 addiu at,a0,-32768
+[ 0-9a-f]+: 6061 0000 lwl v1,0\(at\)
+[ 0-9a-f]+: 41a1 ffff lui at,0xffff
+[ 0-9a-f]+: 0081 0950 addu at,at,a0
+[ 0-9a-f]+: 606[...]
[diff truncated at 100000 bytes]