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[binutils-gdb] Update ARC instruction data-base.
- From: Claudiu Zissulescu <claziss at sourceware dot org>
- To: bfd-cvs at sourceware dot org
- Date: 12 Apr 2016 08:28:26 -0000
- Subject: [binutils-gdb] Update ARC instruction data-base.
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=1c2e355e4830814e18329a53d01cfa634d576211
commit 1c2e355e4830814e18329a53d01cfa634d576211
Author: Claudiu Zissulescu <claziss@synopsys.com>
Date: Wed Apr 6 16:47:56 2016 +0200
Update ARC instruction data-base.
gas/
2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
* testsuite/gas/arc/noargs_a7.d: New file.
* testsuite/gas/arc/noargs_a7.s: Likewise.
* testsuite/gas/arc/noargs_hs.d: Likewise.
* testsuite/gas/arc/noargs_hs.s: Likewise.
opcode/
2016-04-05 Claudiu Zissulescu <claziss@synopsys.com>
* arc-tbl.h: Add rtsc, sleep with no arguments.
Signed-off-by: Claudiu Zissulescu <claziss@synopsys.com>
Diff:
---
gas/ChangeLog | 7 +++++++
gas/testsuite/gas/arc/noargs_a7.d | 17 +++++++++++++++++
gas/testsuite/gas/arc/noargs_a7.s | 10 ++++++++++
gas/testsuite/gas/arc/noargs_hs.d | 22 ++++++++++++++++++++++
gas/testsuite/gas/arc/noargs_hs.s | 14 ++++++++++++++
opcodes/ChangeLog | 4 ++++
opcodes/arc-tbl.h | 6 ++++++
7 files changed, 80 insertions(+)
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 688ffde..5f93283 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,12 @@
2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
+ * testsuite/gas/arc/noargs_a7.d: New file.
+ * testsuite/gas/arc/noargs_a7.s: Likewise.
+ * testsuite/gas/arc/noargs_hs.d: Likewise.
+ * testsuite/gas/arc/noargs_hs.s: Likewise.
+
+2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
+
* testsuite/gas/arc/textinsn-errors.d: New File.
* testsuite/gas/arc/textinsn-errors.err: Likewise.
* testsuite/gas/arc/textinsn-errors.s: Likewise.
diff --git a/gas/testsuite/gas/arc/noargs_a7.d b/gas/testsuite/gas/arc/noargs_a7.d
new file mode 100644
index 0000000..1780c7a
--- /dev/null
+++ b/gas/testsuite/gas/arc/noargs_a7.d
@@ -0,0 +1,17 @@
+#objdump: -d
+
+.*: +file format .*arc.*
+
+
+Disassembly of section .text:
+
+00000000 <.text>:
+ 0: 246f 003f rtie
+ 4: 216f 003f sleep 0
+ 8: 78e0 nop_s
+ a: 256f 003f brk
+ e: 236f 003f sync
+ 12: 226f 003f trap0
+ 16: 7fff brk_s
+ 18: 79e0 unimp_s
+ 1a: 366f 701a rtsc 0,0
diff --git a/gas/testsuite/gas/arc/noargs_a7.s b/gas/testsuite/gas/arc/noargs_a7.s
new file mode 100644
index 0000000..3158a05
--- /dev/null
+++ b/gas/testsuite/gas/arc/noargs_a7.s
@@ -0,0 +1,10 @@
+#Test if the following mnemonics are recognized for ARC700
+ rtie
+ sleep
+ nop_s
+ brk
+ sync
+ trap0
+ brk_s
+ unimp_s
+ rtsc
diff --git a/gas/testsuite/gas/arc/noargs_hs.d b/gas/testsuite/gas/arc/noargs_hs.d
new file mode 100644
index 0000000..14f97aa
--- /dev/null
+++ b/gas/testsuite/gas/arc/noargs_hs.d
@@ -0,0 +1,22 @@
+#as: -mcpu=archs
+#objdump: -d
+
+.*: +file format .*arc.*
+
+
+Disassembly of section .text:
+
+00000000 <.text>:
+ 0: 226f 003f swi
+ 4: 7ae0 swi_s
+ 6: 276f 003f clri 0
+ a: 266f 003f seti 0
+ e: 246f 003f rtie
+ 12: 216f 003f sleep 0
+ 16: 226f 103f dsync
+ 1a: 264a 7000 mov 0,0
+ 1e: 78e0 nop_s
+ 20: 256f 003f brk
+ 24: 236f 003f sync
+ 28: 7fff brk_s
+ 2a: 79e0 unimp_s
diff --git a/gas/testsuite/gas/arc/noargs_hs.s b/gas/testsuite/gas/arc/noargs_hs.s
new file mode 100644
index 0000000..a7390c8
--- /dev/null
+++ b/gas/testsuite/gas/arc/noargs_hs.s
@@ -0,0 +1,14 @@
+#Test if the following mnemonics are recognized for ARC HS
+ swi
+ swi_s
+ clri
+ seti
+ rtie
+ sleep
+ dsync
+ nop
+ nop_s
+ brk
+ sync
+ brk_s
+ unimp_s
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 4eec5ee..bc59c8f 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,5 +1,9 @@
2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
+ * arc-tbl.h: Add rtsc, sleep with no arguments.
+
+2016-04-12 Claudiu Zissulescu <claziss@synopsys.com>
+
* arc-opc.c (flags_none, flags_f, flags_cc, flags_ccf):
Initialize.
(arg_none, arg_32bit_rarbrc, arg_32bit_zarbrc, arg_32bit_rbrbrc)
diff --git a/opcodes/arc-tbl.h b/opcodes/arc-tbl.h
index 30dd3a6..8751bdb 100644
--- a/opcodes/arc-tbl.h
+++ b/opcodes/arc-tbl.h
@@ -13794,6 +13794,9 @@
/* rtsc 0,limm 0011011000101111R111111110011010. */
{ "rtsc", 0x362F7F9A, 0xFFFF7FFF, ARC_OPCODE_ARC700, CONTROL, NONE, { ZA, LIMM }, { 0 }},
+/* rtsc 0011011001101111R111000000011010. */
+{ "rtsc", 0x366F701A, 0xFFFF7FFF, ARC_OPCODE_ARC700, CONTROL, NONE, { 0 }, { 0 }},
+
/* sat16<.f> b,c 00101bbb00101111FBBBCCCCCC000010. */
{ "sat16", 0x282F0002, 0xF8FF003F, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700, ARITH, NONE, { RB, RC }, { C_F }},
@@ -14625,6 +14628,9 @@
/* sleep limm 00100001001011110000111110111111. */
{ "sleep", 0x212F0FBF, 0xFFFFFFFF, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, KERNEL, NONE, { LIMM }, { 0 }},
+/* sleep 00100001011011110000uuuuuu111111. */
+{ "sleep", 0x216F003F, 0xFFFFFFFF, ARC_OPCODE_ARC600 | ARC_OPCODE_ARC700 | ARC_OPCODE_ARCv2EM | ARC_OPCODE_ARCv2HS, KERNEL, NONE, { 0 }, { 0 }},
+
/* sqrtacc c 00101010001011110000CCCCCC111111. */
{ "sqrtacc", 0x2A2F003F, 0xFFFFF03F, ARC_OPCODE_ARCv2EM, DSP, NONE, { RC }, { 0 }},