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[binutils-gdb] Fix unexpected failures in GAS testsuite for ARM VxWorks target.

From: Nick Clifton <nickc at sourceware dot org>
To: bfd-cvs at sourceware dot org
Date: 20 Jan 2016 17:03:16 -0000
Subject: [binutils-gdb] Fix unexpected failures in GAS testsuite for ARM VxWorks target.
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=74b92a5c75901b103fb58f5e645c86a1c4ccb618

commit 74b92a5c75901b103fb58f5e645c86a1c4ccb618
Author: Nick Clifton <nickc@redhat.com>
Date:   Wed Jan 20 17:02:42 2016 +0000

    Fix unexpected failures in GAS testsuite for ARM VxWorks target.
    
    	PR 19456
    	* testsuite/gas/arm/weakdef-1.d: Skip for VxWorks.
    	* testsuite/gas/arm/blx-bl-convert.d
    	* testsuite/gas/arm/plt-1.d: Likewise.
    	* testsuite/gas/arm/reloc-bad.d: Likewise.
    	* testsuite/gas/arm/thumb-w-good.d: Likewise.
    	* testsuite/gas/arm/thumb2_pool.d: Likewise.
    	* testsuite/gas/arm/ldconst.d: Adjust so that it works with VxWorks
    	* testsuite/gas/arm/tls_vxworks.d: Update expected output.

Diff:
---
 gas/ChangeLog                          | 10 ++++++++++
 gas/testsuite/gas/arm/blx-bl-convert.d |  2 +-
 gas/testsuite/gas/arm/ldconst.d        |  6 ++----
 gas/testsuite/gas/arm/plt-1.d          |  2 +-
 gas/testsuite/gas/arm/reloc-bad.d      |  1 +
 gas/testsuite/gas/arm/thumb-w-good.d   |  2 +-
 gas/testsuite/gas/arm/thumb2_pool.d    |  2 +-
 gas/testsuite/gas/arm/tls_vxworks.d    | 26 ++++++++++++++------------
 gas/testsuite/gas/arm/weakdef-1.d      |  2 +-
 9 files changed, 32 insertions(+), 21 deletions(-)

diff --git a/gas/ChangeLog b/gas/ChangeLog
index b5c8884..7c59774 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,15 @@
 2016-01-20  Nick Clifton  <nickc@redhat.com>
 
+	PR 19456
+	* testsuite/gas/arm/weakdef-1.d: Skip for VxWorks.
+	* testsuite/gas/arm/blx-bl-convert.d
+	* testsuite/gas/arm/plt-1.d: Likewise.
+	* testsuite/gas/arm/reloc-bad.d: Likewise.
+	* testsuite/gas/arm/thumb-w-good.d: Likewise.
+	* testsuite/gas/arm/thumb2_pool.d: Likewise.
+	* testsuite/gas/arm/ldconst.d: Adjust so that it works with VxWorks
+	* testsuite/gas/arm/tls_vxworks.d: Update expected output.
+
 	PR 19499
 	* doc/as.texinfo (Errors): Correct documentation describing the
 	interaction of .file and .line with warning and error messages.
diff --git a/gas/testsuite/gas/arm/blx-bl-convert.d b/gas/testsuite/gas/arm/blx-bl-convert.d
index 1005d0f..37f0b67 100644
--- a/gas/testsuite/gas/arm/blx-bl-convert.d
+++ b/gas/testsuite/gas/arm/blx-bl-convert.d
@@ -1,7 +1,7 @@
 #name: blx->bl convert under no -march/cpu
 #error-output: blx-bl-convert.l
 #objdump: -d
-#skip: *-*-pe *-wince-* *-*-coff
+#skip: *-*-pe *-wince-* *-*-coff *-*-vxworks
 
 .*:     file format .*
 
diff --git a/gas/testsuite/gas/arm/ldconst.d b/gas/testsuite/gas/arm/ldconst.d
index f8c273d..e29acf3 100644
--- a/gas/testsuite/gas/arm/ldconst.d
+++ b/gas/testsuite/gas/arm/ldconst.d
@@ -36,7 +36,5 @@ Disassembly of section .text:
 0+6c <[^>]*> e59f8008 ?	ldr	r8, \[pc, #8\]	; 0+7c <[^>]*>
 0+70 <[^>]*> e59fb004 ?	ldr	fp, \[pc, #4\]	; 0+7c <[^>]*>
 0+74 <[^>]*> e51fe000 ?	ldr	lr, \[pc, #-0\]	; 0+7c <[^>]*>
-0+78 <[^>]*> 00000000 	.word	0x00000000
-			78: R_ARM_ABS32	ext_symbol
-0+7c <[^>]*> 00001000 	.word	0x00001000
-			7c: R_ARM_ABS32	ext_symbol
+#pass
+
diff --git a/gas/testsuite/gas/arm/plt-1.d b/gas/testsuite/gas/arm/plt-1.d
index d2a64f7..8912706 100644
--- a/gas/testsuite/gas/arm/plt-1.d
+++ b/gas/testsuite/gas/arm/plt-1.d
@@ -2,7 +2,7 @@
 # as:
 # objdump: -dr
 # This test is only valid on ELF based ports.
-#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
+#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* *-*-vxworks
 
 .*: +file format .*arm.*
 
diff --git a/gas/testsuite/gas/arm/reloc-bad.d b/gas/testsuite/gas/arm/reloc-bad.d
index 4866871..1c40a6f 100644
--- a/gas/testsuite/gas/arm/reloc-bad.d
+++ b/gas/testsuite/gas/arm/reloc-bad.d
@@ -1,2 +1,3 @@
 #name: Invalid relocations
 #error-output: reloc-bad.l
+#not-target: *-*-vxworks
diff --git a/gas/testsuite/gas/arm/thumb-w-good.d b/gas/testsuite/gas/arm/thumb-w-good.d
index da25e64..4fd7da4 100644
--- a/gas/testsuite/gas/arm/thumb-w-good.d
+++ b/gas/testsuite/gas/arm/thumb-w-good.d
@@ -1,6 +1,6 @@
 #name: Wide instruction acceptance in Thumb-2 cores
 #objdump: -d --prefix-addresses --show-raw-insn
-#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
+#skip: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* *-*-vxworks
 
 .*: +file format .*arm.*
 
diff --git a/gas/testsuite/gas/arm/thumb2_pool.d b/gas/testsuite/gas/arm/thumb2_pool.d
index 8f8d881..fdf63ba 100644
--- a/gas/testsuite/gas/arm/thumb2_pool.d
+++ b/gas/testsuite/gas/arm/thumb2_pool.d
@@ -1,7 +1,7 @@
 # as: -march=armv6t2
 # objdump: -dr --prefix-addresses --show-raw-insn
 # This test is only valid on ELF based ports.
-#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
+#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* *-*-vxworks
 
 .*: +file format .*arm.*
 
diff --git a/gas/testsuite/gas/arm/tls_vxworks.d b/gas/testsuite/gas/arm/tls_vxworks.d
index 6303a54..62b16b8 100644
--- a/gas/testsuite/gas/arm/tls_vxworks.d
+++ b/gas/testsuite/gas/arm/tls_vxworks.d
@@ -12,19 +12,21 @@
 
 Disassembly of section .text:
 
-00+0 <main>:
-   0:	e1a00000 	nop			\(mov r0,r0\)
-   4:	e1a00000 	nop			\(mov r0,r0\)
-   8:	e1a0f00e 	mov	pc, lr
-   c:	00000000 	.word	0x00000000
-			c: R_ARM_TLS_GD32	a
+00+0 <arm_fn>:
+   0:	e1a00000 	nop			\; \(mov r0, r0\)
+			0: R_ARM_TLS_DESCSEQ	af
+   4:	e59f0014 	ldr	r0, \[pc, \#20\]	; 20 <\.arm_pool\+0x10>
+   8:	fa000000 	blx	8 <ae\+0x8>
+			8: R_ARM_TLS_CALL	ae
 # ??? The addend is appearing in both the RELA field and the
 # contents.  Shouldn't it be just one?  bfd_install_relocation
 # appears to write the addend into the contents unconditionally,
 # yet somehow this does not happen for the majority of relocations.
-  10:	00000004 	.word	0x00000004
-			10: R_ARM_TLS_LDM32	b\+0x4
-  14:	00000008 	.word	0x00000008
-			14: R_ARM_TLS_IE32	c\+0x8
-  18:	00000000 	.word	0x00000000
-			18: R_ARM_TLS_LE32	d
+   c:	e1a00000 	nop			\; \(mov r0, r0\)
+00000010 <.arm_pool>:
+  10:	00000008 	.word	0x00000008
+			10: R_ARM_TLS_GD32	aa\+0x8
+  14:	0000000c 	.word	0x0000000c
+			14: R_ARM_TLS_LDM32	ab\+0xc
+  18:	00000010 	.word	0x00000010
+#pass
diff --git a/gas/testsuite/gas/arm/weakdef-1.d b/gas/testsuite/gas/arm/weakdef-1.d
index 3ba6f9a..80535f8 100644
--- a/gas/testsuite/gas/arm/weakdef-1.d
+++ b/gas/testsuite/gas/arm/weakdef-1.d
@@ -2,7 +2,7 @@
 # as:
 # objdump: -dr
 # This test is only valid on ELF based ports.
-#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix*
+#not-target: *-*-*coff *-*-pe *-*-wince *-*-*aout* *-*-netbsd *-*-riscix* *-*-vxworks
 
 .*: +file format .*arm.*
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