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[binutils-gdb/binutils-2_25-branch] Fix ppc32 synthetic symbols when __tls_get_addr_opt stub is generated
- From: Alan Modra <amodra at sourceware dot org>
- To: bfd-cvs at sourceware dot org
- Date: 18 Mar 2015 13:23:56 -0000
- Subject: [binutils-gdb/binutils-2_25-branch] Fix ppc32 synthetic symbols when __tls_get_addr_opt stub is generated
https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=846daac2a1f80d44f0595994157fddc083e2cd0b
commit 846daac2a1f80d44f0595994157fddc083e2cd0b
Author: Alan Modra <amodra@gmail.com>
Date: Wed Mar 11 17:45:37 2015 +1030
Fix ppc32 synthetic symbols when __tls_get_addr_opt stub is generated
Also update the 32-bit tls testcases to be secure plt.
bfd/
* elf32-ppc.c (ppc_elf_get_synthetic_symtab): Examine stubs in
reverse order. Account for larger size of __tls_get_addr_opt stub.
ld/testsuite/
* ld-powerpc/tls32.s: Add GOT pointer setup.
* ld-powerpc/tls32.d: Update.
* ld-powerpc/tls32.g: Update.
* ld-powerpc/tls32.t: Update.
* ld-powerpc/tlsexe.d: Update.
* ld-powerpc/tlsexe32.d: Update.
* ld-powerpc/tlsexe32.g: Update.
* ld-powerpc/tlsexe32.r: Update.
* ld-powerpc/tlsexetoc.d: Update.
* ld-powerpc/tlsso32.d: Update.
* ld-powerpc/tlsso32.g: Update.
* ld-powerpc/tlsso32.r: Update.
Diff:
---
bfd/ChangeLog | 4 +++
bfd/elf32-ppc.c | 11 +++++---
ld/testsuite/ChangeLog | 17 ++++++++++++
ld/testsuite/ld-powerpc/tls32.d | 15 +++++------
ld/testsuite/ld-powerpc/tls32.g | 2 +-
ld/testsuite/ld-powerpc/tls32.s | 9 +++++++
ld/testsuite/ld-powerpc/tls32.t | 4 +--
ld/testsuite/ld-powerpc/tlsexe.d | 2 +-
ld/testsuite/ld-powerpc/tlsexe32.d | 52 ++++++++++++++++++++++++++++-------
ld/testsuite/ld-powerpc/tlsexe32.g | 4 +--
ld/testsuite/ld-powerpc/tlsexe32.r | 12 ++++-----
ld/testsuite/ld-powerpc/tlsexetoc.d | 2 +-
ld/testsuite/ld-powerpc/tlsso32.d | 54 +++++++++++++++++++++++++------------
ld/testsuite/ld-powerpc/tlsso32.g | 3 +--
ld/testsuite/ld-powerpc/tlsso32.r | 21 ++++++++-------
15 files changed, 149 insertions(+), 63 deletions(-)
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index b8558b0..ef3042e 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,6 +1,10 @@
2015-03-18 Alan Modra <amodra@gmail.com>
Apply from master
+ 2015-03-11 Alan Modra <amodra@gmail.com>
+ * elf32-ppc.c (ppc_elf_get_synthetic_symtab): Examine stubs in
+ reverse order. Account for larger size of __tls_get_addr_opt stub.
+
2015-02-28 Alan Modra <amodra@gmail.com>
* elf32-ppc.c (ppc_elf_tls_setup): Set no_tls_get_addr_opt if
not PLT_NEW.
diff --git a/bfd/elf32-ppc.c b/bfd/elf32-ppc.c
index e7aa4e4..ea690a7 100644
--- a/bfd/elf32-ppc.c
+++ b/bfd/elf32-ppc.c
@@ -2919,7 +2919,6 @@ ppc_elf_get_synthetic_symtab (bfd *abfd, long symcount, asymbol **syms,
}
count = relplt->size / sizeof (Elf32_External_Rela);
- stub_vma = glink_vma - (bfd_vma) count * 16;
/* If the stubs are those for -shared/-pie then we might have
multiple stubs for each plt entry. If that is the case then
there is no way to associate stubs with their plt entries short
@@ -2950,9 +2949,10 @@ ppc_elf_get_synthetic_symtab (bfd *abfd, long symcount, asymbol **syms,
if (s == NULL)
return -1;
+ stub_vma = glink_vma;
names = (char *) (s + count + 1 + (resolv_vma != 0));
- p = relplt->relocation;
- for (i = 0; i < count; i++, p++)
+ p = relplt->relocation + count - 1;
+ for (i = 0; i < count; i++)
{
size_t len;
@@ -2963,6 +2963,9 @@ ppc_elf_get_synthetic_symtab (bfd *abfd, long symcount, asymbol **syms,
s->flags |= BSF_GLOBAL;
s->flags |= BSF_SYNTHETIC;
s->section = glink;
+ stub_vma -= 16;
+ if (strcmp ((*p->sym_ptr_ptr)->name, "__tls_get_addr_opt") == 0)
+ stub_vma -= 32;
s->value = stub_vma - glink->vma;
s->name = names;
s->udata.p = NULL;
@@ -2979,7 +2982,7 @@ ppc_elf_get_synthetic_symtab (bfd *abfd, long symcount, asymbol **syms,
memcpy (names, "@plt", sizeof ("@plt"));
names += sizeof ("@plt");
++s;
- stub_vma += 16;
+ --p;
}
/* Add a symbol at the start of the glink branch table. */
diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog
index 120ece6..c7cfe59 100644
--- a/ld/testsuite/ChangeLog
+++ b/ld/testsuite/ChangeLog
@@ -1,3 +1,20 @@
+2015-03-18 Alan Modra <amodra@gmail.com>
+
+ Apply from master
+ 2015-03-11 Alan Modra <amodra@gmail.com>
+ * ld-powerpc/tls32.s: Add GOT pointer setup.
+ * ld-powerpc/tls32.d: Update.
+ * ld-powerpc/tls32.g: Update.
+ * ld-powerpc/tls32.t: Update.
+ * ld-powerpc/tlsexe.d: Update.
+ * ld-powerpc/tlsexe32.d: Update.
+ * ld-powerpc/tlsexe32.g: Update.
+ * ld-powerpc/tlsexe32.r: Update.
+ * ld-powerpc/tlsexetoc.d: Update.
+ * ld-powerpc/tlsso32.d: Update.
+ * ld-powerpc/tlsso32.g: Update.
+ * ld-powerpc/tlsso32.r: Update.
+
2015-03-06 H.J. Lu <hongjiu.lu@intel.com>
Backport from master
diff --git a/ld/testsuite/ld-powerpc/tls32.d b/ld/testsuite/ld-powerpc/tls32.d
index 2b7d0a0..664f9cd 100644
--- a/ld/testsuite/ld-powerpc/tls32.d
+++ b/ld/testsuite/ld-powerpc/tls32.d
@@ -9,7 +9,11 @@
Disassembly of section \.text:
-0+1800094 <_start>:
+0+18000a0 <_start>:
+.*: (42 9f 00 05|05 00 9f 42) bcl 20,4\*cr7\+so,.* <_start\+0x4>
+.*: (7f c8 02 a6|a6 02 c8 7f) mflr r30
+.*: (3f de 00 02|02 00 de 3f) addis r30,r30,2
+.*: (3b de 80 a0|a0 80 de 3b) addi r30,r30,-32608
.*: (3c 62 00 00|00 00 62 3c) addis r3,r2,0
.*: (38 63 90 3c|3c 90 63 38) addi r3,r3,-28612
.*: (3c 62 00 00|00 00 62 3c) addis r3,r2,0
@@ -39,12 +43,5 @@ Disassembly of section \.text:
.*: (3d 22 00 00|00 00 22 3d) addis r9,r2,0
.*: (a9 49 90 18|18 90 49 a9) lha r10,-28648\(r9\)
-0+1800104 <__tls_get_addr>:
+0+1800120 <__tls_get_addr>:
.*: (4e 80 00 20|20 00 80 4e) blr
-Disassembly of section \.got:
-
-0+1810128 <_GLOBAL_OFFSET_TABLE_-0x4>:
-.*: (4e 80 00 21|21 00 80 4e) blrl
-
-0+181012c <_GLOBAL_OFFSET_TABLE_>:
- \.\.\.
diff --git a/ld/testsuite/ld-powerpc/tls32.g b/ld/testsuite/ld-powerpc/tls32.g
index cbf93cc..24735bd 100644
--- a/ld/testsuite/ld-powerpc/tls32.g
+++ b/ld/testsuite/ld-powerpc/tls32.g
@@ -8,4 +8,4 @@
.*
Contents of section \.got:
- 1810128 (4e800021|2100804e) 00000000 00000000 00000000 .*
+ 1810144 00000000 00000000 00000000 .*
diff --git a/ld/testsuite/ld-powerpc/tls32.s b/ld/testsuite/ld-powerpc/tls32.s
index 1c3092d..b9b8468 100644
--- a/ld/testsuite/ld-powerpc/tls32.s
+++ b/ld/testsuite/ld-powerpc/tls32.s
@@ -19,8 +19,17 @@ ie4: .long 0x56789abc
le4: .long 0x6789abcd
le5: .long 0x789abcde
+ .section ".got2","aw"
+.LCTOC1 = .+32768
+
.text
_start:
+ bcl 20,31,0f
+0:
+ mflr 30
+ addis 30,30,.LCTOC1-0b@ha
+ addi 30,30,.LCTOC1-0b@l
+
#extern syms
#GD
addi 3,31,gd@got@tlsgd #R_PPC_GOT_TLSGD16 gd
diff --git a/ld/testsuite/ld-powerpc/tls32.t b/ld/testsuite/ld-powerpc/tls32.t
index c8b6cb4..5be66ac 100644
--- a/ld/testsuite/ld-powerpc/tls32.t
+++ b/ld/testsuite/ld-powerpc/tls32.t
@@ -8,5 +8,5 @@
.*
Contents of section \.tdata:
- 1810108 (12345678|78563412) (23456789|89674523) (3456789a|9a785634) (456789ab|ab896745) .*
- 1810118 (56789abc|bc9a7856) (6789abcd|cdab8967) (789abcde|debc9a78) (00c0ffee|eeffc000) .*
+ 1810124 (12345678|78563412) (23456789|89674523) (3456789a|9a785634) (456789ab|ab896745) .*
+ 1810134 (56789abc|bc9a7856) (6789abcd|cdab8967) (789abcde|debc9a78) (00c0ffee|eeffc000) .*
diff --git a/ld/testsuite/ld-powerpc/tlsexe.d b/ld/testsuite/ld-powerpc/tlsexe.d
index 747b5e1..7aa1c6d 100644
--- a/ld/testsuite/ld-powerpc/tlsexe.d
+++ b/ld/testsuite/ld-powerpc/tlsexe.d
@@ -23,8 +23,8 @@ Disassembly of section \.text:
.* (7d 89 03 a6|a6 03 89 7d) mtctr r12
.* (e8 42 80 50|50 80 42 e8) ld r2,-32688\(r2\)
.* (4e 80 04 21|21 04 80 4e) bctrl
-.* (e9 61 00 20|20 00 61 e9) ld r11,32\(r1\)
.* (e8 41 00 28|28 00 41 e8) ld r2,40\(r1\)
+.* (e9 61 00 20|20 00 61 e9) ld r11,32\(r1\)
.* (7d 68 03 a6|a6 03 68 7d) mtlr r11
.* (4e 80 00 20|20 00 80 4e) blr
diff --git a/ld/testsuite/ld-powerpc/tlsexe32.d b/ld/testsuite/ld-powerpc/tlsexe32.d
index d0579ce..e7bc0d6 100644
--- a/ld/testsuite/ld-powerpc/tlsexe32.d
+++ b/ld/testsuite/ld-powerpc/tlsexe32.d
@@ -9,10 +9,14 @@
Disassembly of section \.text:
.* <_start>:
-.*: (80 7f ff f0|f0 ff 7f 80) lwz r3,-16\(r31\)
+.*: (42 9f 00 05|05 00 9f 42) bcl 20,4\*cr7\+so,.* <_start\+0x4>
+.*: (7f c8 02 a6|a6 02 c8 7f) mflr r30
+.*: (3f de 00 02|02 00 de 3f) addis r30,r30,2
+.*: (3b de 81 18|18 81 de 3b) addi r30,r30,-32488
+.*: (80 7f ff f4|f4 ff 7f 80) lwz r3,-12\(r31\)
.*: (7c 63 12 14|14 12 63 7c) add r3,r3,r2
-.*: (38 7f ff f4|f4 ff 7f 38) addi r3,r31,-12
-.*: (48 01 01 85|85 01 01 48) bl .*<__tls_get_addr_opt@plt>
+.*: (38 7f ff f8|f8 ff 7f 38) addi r3,r31,-8
+.*: (48 00 00 65|65 00 00 48) bl .* <__tls_get_addr_opt@plt>
.*: (3c 62 00 00|00 00 62 3c) addis r3,r2,0
.*: (38 63 90 1c|1c 90 63 38) addi r3,r3,-28644
.*: (3c 62 00 00|00 00 62 3c) addis r3,r2,0
@@ -37,11 +41,41 @@ Disassembly of section \.text:
.*: (a1 42 90 14|14 90 42 a1) lhz r10,-28652\(r2\)
.*: (3d 22 00 00|00 00 22 3d) addis r9,r2,0
.*: (a9 49 90 18|18 90 49 a9) lha r10,-28648\(r9\)
-Disassembly of section \.got:
-.* <_GLOBAL_OFFSET_TABLE_-0x10>:
- \.\.\.
-.*: (4e 80 00 21|21 00 80 4e) blrl
+.* <__tls_get_addr_opt@plt>:
+.*: (81 63 00 00|00 00 63 81) lwz r11,0\(r3\)
+.*: (81 83 00 04|04 00 83 81) lwz r12,4\(r3\)
+.*: (7c 60 1b 78|78 1b 60 7c) mr r0,r3
+.*: (2c 0b 00 00|00 00 0b 2c) cmpwi r11,0
+.*: (7c 6c 12 14|14 12 6c 7c) add r3,r12,r2
+.*: (4d 82 00 20|20 00 82 4d) beqlr
+.*: (7c 03 03 78|78 03 03 7c) mr r3,r0
+.*: (60 00 00 00|00 00 00 60) nop
+.*: (3d 60 01 81|81 01 60 3d) lis r11,385
+.*: (81 6b 04 14|14 04 6b 81) lwz r11,1044\(r11\)
+.*: (7d 69 03 a6|a6 03 69 7d) mtctr r11
+.*: (4e 80 04 20|20 04 80 4e) bctr
-.* <_GLOBAL_OFFSET_TABLE_>:
-.*: (01 81 02 b8|b8 02 81 01) 00 00 00 00 00 00 00 00 .*
+.* <__glink>:
+.*: (60 00 00 00|00 00 00 60) nop
+.*: (60 00 00 00|00 00 00 60) nop
+.*: (60 00 00 00|00 00 00 60) nop
+.*: (60 00 00 00|00 00 00 60) nop
+
+.* <__glink_PLTresolve>:
+.*: (3d 80 01 81|81 01 80 3d) lis r12,385
+.*: (3d 6b fe 80|80 fe 6b 3d) addis r11,r11,-384
+.*: (80 0c 04 0c|0c 04 0c 80) lwz r0,1036\(r12\)
+.*: (39 6b fd 20|20 fd 6b 39) addi r11,r11,-736
+.*: (7c 09 03 a6|a6 03 09 7c) mtctr r0
+.*: (7c 0b 5a 14|14 5a 0b 7c) add r0,r11,r11
+.*: (81 8c 04 10|10 04 8c 81) lwz r12,1040\(r12\)
+.*: (7d 60 5a 14|14 5a 60 7d) add r11,r0,r11
+.*: (4e 80 04 20|20 04 80 4e) bctr
+.*: (60 00 00 00|00 00 00 60) nop
+.*: (60 00 00 00|00 00 00 60) nop
+.*: (60 00 00 00|00 00 00 60) nop
+.*: (60 00 00 00|00 00 00 60) nop
+.*: (60 00 00 00|00 00 00 60) nop
+.*: (60 00 00 00|00 00 00 60) nop
+.*: (60 00 00 00|00 00 00 60) nop
diff --git a/ld/testsuite/ld-powerpc/tlsexe32.g b/ld/testsuite/ld-powerpc/tlsexe32.g
index 917ca4d..e402f6b 100644
--- a/ld/testsuite/ld-powerpc/tlsexe32.g
+++ b/ld/testsuite/ld-powerpc/tlsexe32.g
@@ -7,5 +7,5 @@
.*
Contents of section \.got:
-.* 00000000 00000000 00000000 (4e800021|2100804e) .*
-.* (018102b8|b8028101) 00000000 00000000 .*
+.* 00000000 00000000 00000000 (0181034c|4c038101) .*
+.* 00000000 00000000 .*
diff --git a/ld/testsuite/ld-powerpc/tlsexe32.r b/ld/testsuite/ld-powerpc/tlsexe32.r
index dea4a0d..a3304ec 100644
--- a/ld/testsuite/ld-powerpc/tlsexe32.r
+++ b/ld/testsuite/ld-powerpc/tlsexe32.r
@@ -16,12 +16,12 @@ Section Headers:
+\[[ 0-9]+\] \.dynstr +.*
+\[[ 0-9]+\] \.rela\.dyn +.*
+\[[ 0-9]+\] \.rela\.plt +.*
- +\[[ 0-9]+\] \.text +PROGBITS +[0-9a-f]+ [0-9a-f]+ 000070 00 +AX +0 +0 +1
+ +\[[ 0-9]+\] \.text +PROGBITS +[0-9a-f]+ [0-9a-f]+ 000100 00 +AX +0 +0 +16
+\[[ 0-9]+\] \.tdata +PROGBITS +[0-9a-f]+ [0-9a-f]+ 00001c 00 WAT +0 +0 +4
+\[[ 0-9]+\] \.tbss +NOBITS +[0-9a-f]+ [0-9a-f]+ 00001c 00 WAT +0 +0 +4
+\[[ 0-9]+\] \.dynamic +DYNAMIC +[0-9a-f]+ [0-9a-f]+ [0-9a-f]+ 08 +WA +4 +0 +4
- +\[[ 0-9]+\] \.got +PROGBITS +[0-9a-f]+ [0-9a-f]+ 00001c 04 WAX +0 +0 +4
- +\[[ 0-9]+\] \.plt +NOBITS +.*
+ +\[[ 0-9]+\] \.got +PROGBITS +[0-9a-f]+ [0-9a-f]+ 000018 04 +WA +0 +0 +4
+ +\[[ 0-9]+\] \.plt +PROGBITS +[0-9a-f]+ [0-9a-f]+ 000004 00 +WA +0 +0 +4
+\[[ 0-9]+\] \.shstrtab +STRTAB +.*
+\[[ 0-9]+\] \.symtab +SYMTAB +.*
+\[[ 0-9]+\] \.strtab +STRTAB +.*
@@ -37,7 +37,7 @@ Program Headers:
+INTERP +0x0000f4 0x018000f4 0x018000f4 0x00011 0x00011 R +0x1
+\[Requesting program interpreter: .*\]
+LOAD .* R E 0x10000
- +LOAD .* RWE 0x10000
+ +LOAD .* RW +0x10000
+DYNAMIC .* RW +0x4
+TLS .* 0x0001c 0x00038 R +0x4
@@ -67,7 +67,7 @@ Symbol table '\.dynsym' contains [0-9]+ entries:
.* NOTYPE +GLOBAL +DEFAULT +12 __end
.* NOTYPE +GLOBAL +DEFAULT +12 __bss_start
.* FUNC +GLOBAL +DEFAULT +UND __tls_get_addr_opt
-.* NOTYPE +GLOBAL +DEFAULT +11 _edata
+.* NOTYPE +GLOBAL +DEFAULT +12 _edata
.* NOTYPE +GLOBAL +DEFAULT +12 _end
Symbol table '\.symtab' contains [0-9]+ entries:
@@ -107,7 +107,7 @@ Symbol table '\.symtab' contains [0-9]+ entries:
.* TLS +GLOBAL +DEFAULT +9 ld1
.* NOTYPE +GLOBAL +DEFAULT +12 __bss_start
.* FUNC +GLOBAL +DEFAULT +UND __tls_get_addr_opt
-.* NOTYPE +GLOBAL +DEFAULT +11 _edata
+.* NOTYPE +GLOBAL +DEFAULT +12 _edata
.* NOTYPE +GLOBAL +DEFAULT +12 _end
.* TLS +GLOBAL +DEFAULT +9 gd0
.* TLS +GLOBAL +DEFAULT +9 ie0
diff --git a/ld/testsuite/ld-powerpc/tlsexetoc.d b/ld/testsuite/ld-powerpc/tlsexetoc.d
index f38ca9c..d478167 100644
--- a/ld/testsuite/ld-powerpc/tlsexetoc.d
+++ b/ld/testsuite/ld-powerpc/tlsexetoc.d
@@ -23,8 +23,8 @@ Disassembly of section \.text:
.* (7d 89 03 a6|a6 03 89 7d) mtctr r12
.* (e8 42 80 78|78 80 42 e8) ld r2,-32648\(r2\)
.* (4e 80 04 21|21 04 80 4e) bctrl
-.* (e9 61 00 20|20 00 61 e9) ld r11,32\(r1\)
.* (e8 41 00 28|28 00 41 e8) ld r2,40\(r1\)
+.* (e9 61 00 20|20 00 61 e9) ld r11,32\(r1\)
.* (7d 68 03 a6|a6 03 68 7d) mtlr r11
.* (4e 80 00 20|20 00 80 4e) blr
diff --git a/ld/testsuite/ld-powerpc/tlsso32.d b/ld/testsuite/ld-powerpc/tlsso32.d
index 39c9970..3365eb3 100644
--- a/ld/testsuite/ld-powerpc/tlsso32.d
+++ b/ld/testsuite/ld-powerpc/tlsso32.d
@@ -9,39 +9,59 @@
Disassembly of section \.text:
.* <_start>:
-.*: (38 7f ff e0|e0 ff 7f 38) addi r3,r31,-32
+.*: (42 9f 00 05|05 00 9f 42) bcl 20,4\*cr7\+so,.* <_start\+0x4>
+.*: (7f c8 02 a6|a6 02 c8 7f) mflr r30
+.*: (3f de 00 02|02 00 de 3f) addis r30,r30,2
+.*: (3b de 80 e8|e8 80 de 3b) addi r30,r30,-32536
+.*: (38 7f ff e4|e4 ff 7f 38) addi r3,r31,-28
.*: (48 00 00 01|01 00 00 48) bl .*
-.*: (38 7f ff f4|f4 ff 7f 38) addi r3,r31,-12
+.*: (38 7f ff f8|f8 ff 7f 38) addi r3,r31,-8
.*: (48 00 00 01|01 00 00 48) bl .*
-.*: (38 7f ff e8|e8 ff 7f 38) addi r3,r31,-24
-.*: (48 01 01 95|95 01 01 48) bl .*<__tls_get_addr@plt>
-.*: (38 7f ff f4|f4 ff 7f 38) addi r3,r31,-12
-.*: (48 01 01 8d|8d 01 01 48) bl .*<__tls_get_addr@plt>
+.*: (38 7f ff ec|ec ff 7f 38) addi r3,r31,-20
+.*: (48 00 00 5d|5d 00 00 48) bl .*<0+8000\.got2\.plt_pic32\.__tls_get_addr>
+.*: (38 7f ff f8|f8 ff 7f 38) addi r3,r31,-8
+.*: (48 00 00 55|55 00 00 48) bl .*<0+8000\.got2\.plt_pic32\.__tls_get_addr>
.*: (39 23 80 20|20 80 23 39) addi r9,r3,-32736
.*: (3d 23 00 00|00 00 23 3d) addis r9,r3,0
.*: (81 49 80 24|24 80 49 81) lwz r10,-32732\(r9\)
-.*: (81 3f ff f0|f0 ff 3f 81) lwz r9,-16\(r31\)
+.*: (81 3f ff f4|f4 ff 3f 81) lwz r9,-12\(r31\)
.*: (7d 49 12 2e|2e 12 49 7d) lhzx r10,r9,r2
.*: (89 42 00 00|00 00 42 89) lbz r10,0\(r2\)
.*: (3d 22 00 00|00 00 22 3d) addis r9,r2,0
.*: (99 49 00 00|00 00 49 99) stb r10,0\(r9\)
-.*: (38 7e ff d8|d8 ff 7e 38) addi r3,r30,-40
+.*: (38 7e ff dc|dc ff 7e 38) addi r3,r30,-36
.*: (48 00 00 01|01 00 00 48) bl .*
-.*: (38 7e ff f4|f4 ff 7e 38) addi r3,r30,-12
+.*: (38 7e ff f8|f8 ff 7e 38) addi r3,r30,-8
.*: (48 00 00 01|01 00 00 48) bl .*
.*: (91 43 80 04|04 80 43 91) stw r10,-32764\(r3\)
.*: (3d 23 00 00|00 00 23 3d) addis r9,r3,0
.*: (91 49 80 08|08 80 49 91) stw r10,-32760\(r9\)
-.*: (81 3e ff f0|f0 ff 3e 81) lwz r9,-16\(r30\)
+.*: (81 3e ff f4|f4 ff 3e 81) lwz r9,-12\(r30\)
.*: (7d 49 13 2e|2e 13 49 7d) sthx r10,r9,r2
.*: (a1 42 00 00|00 00 42 a1) lhz r10,0\(r2\)
.*: (3d 22 00 00|00 00 22 3d) addis r9,r2,0
.*: (a9 49 00 00|00 00 49 a9) lha r10,0\(r9\)
-Disassembly of section \.got:
-.* <_GLOBAL_OFFSET_TABLE_-0x28>:
-#...
-.*: (4e 80 00 21|21 00 80 4e) blrl
-.* <_GLOBAL_OFFSET_TABLE_>:
-.*: (00 01 03 ec|ec 03 01 00) .*
-#pass
+.* <00008000.got2.plt_pic32.__tls_get_addr>:
+.*: (81 7e 80 d8|d8 80 7e 81) lwz r11,-32552\(r30\)
+.*: (7d 69 03 a6|a6 03 69 7d) mtctr r11
+.*: (4e 80 04 20|20 04 80 4e) bctr
+.*: (60 00 00 00|00 00 00 60) nop
+
+.* <__glink>:
+.*: (3d 6b 00 00|00 00 6b 3d) addis r11,r11,0
+.*: (7c 08 02 a6|a6 02 08 7c) mflr r0
+.*: (42 9f 00 05|05 00 9f 42) bcl .* <__glink\+0xc>
+.*: (39 6b 00 0c|0c 00 6b 39) addi r11,r11,12
+.*: (7d 88 02 a6|a6 02 88 7d) mflr r12
+.*: (7c 08 03 a6|a6 03 08 7c) mtlr r0
+.*: (7d 6c 58 50|50 58 6c 7d) subf r11,r12,r11
+.*: (3d 8c 00 01|01 00 8c 3d) addis r12,r12,1
+.*: (80 0c 01 20|20 01 0c 80) lwz r0,288\(r12\)
+.*: (81 8c 01 24|24 01 8c 81) lwz r12,292\(r12\)
+.*: (7c 09 03 a6|a6 03 09 7c) mtctr r0
+.*: (7c 0b 5a 14|14 5a 0b 7c) add r0,r11,r11
+.*: (7d 60 5a 14|14 5a 60 7d) add r11,r0,r11
+.*: (4e 80 04 20|20 04 80 4e) bctr
+.*: (60 00 00 00|00 00 00 60) nop
+.*: (60 00 00 00|00 00 00 60) nop
diff --git a/ld/testsuite/ld-powerpc/tlsso32.g b/ld/testsuite/ld-powerpc/tlsso32.g
index ac2c4bb..9909063 100644
--- a/ld/testsuite/ld-powerpc/tlsso32.g
+++ b/ld/testsuite/ld-powerpc/tlsso32.g
@@ -9,5 +9,4 @@
Contents of section \.got:
.* 00000000 00000000 00000000 00000000 .*
.* 00000000 00000000 00000000 00000000 .*
-.* 00000000 (4e800021|2100804e) (000103ec|ec030100) 00000000 .*
-.* 00000000 .*
+.* 00000000 (0001044c|4c040100) 00000000 00000000 .*
diff --git a/ld/testsuite/ld-powerpc/tlsso32.r b/ld/testsuite/ld-powerpc/tlsso32.r
index 9563b0b..4d12c48 100644
--- a/ld/testsuite/ld-powerpc/tlsso32.r
+++ b/ld/testsuite/ld-powerpc/tlsso32.r
@@ -14,12 +14,12 @@ Section Headers:
+\[[ 0-9]+\] \.dynstr +.*
+\[[ 0-9]+\] \.rela\.dyn +.*
+\[[ 0-9]+\] \.rela\.plt +.*
- +\[[ 0-9]+\] \.text +PROGBITS .* 0+70 0+ +AX +0 +0 +1
+ +\[[ 0-9]+\] \.text +PROGBITS .* 0+d0 0+ +AX +0 +0 +16
+\[[ 0-9]+\] \.tdata +PROGBITS .* 0+1c 0+ WAT +0 +0 +4
+\[[ 0-9]+\] \.tbss +NOBITS .* 0+1c 0+ WAT +0 +0 +4
+\[[ 0-9]+\] \.dynamic +DYNAMIC .* 08 +WA +3 +0 +4
- +\[[ 0-9]+\] \.got +PROGBITS .* 0+34 04 WAX +0 +0 +4
- +\[[ 0-9]+\] \.plt +.*
+ +\[[ 0-9]+\] \.got +PROGBITS .* 0+30 04 +WA +0 +0 +4
+ +\[[ 0-9]+\] \.plt +PROGBITS .* 0+4 00 +WA +0 +0 +4
+\[[ 0-9]+\] \.shstrtab +.*
+\[[ 0-9]+\] \.symtab +.*
+\[[ 0-9]+\] \.strtab +.*
@@ -32,7 +32,7 @@ There are [0-9]+ program headers, starting at offset [0-9]+
Program Headers:
+Type +Offset +VirtAddr +PhysAddr +FileSiz MemSiz +Flg Align
+LOAD .* R E 0x10000
- +LOAD .* RWE 0x10000
+ +LOAD .* RW +0x10000
+DYNAMIC .* RW +0x4
+TLS .* 0x0+1c 0x0+38 R +0x4
@@ -52,9 +52,9 @@ Relocation section '\.rela\.dyn' at offset 0x[0-9a-f]+ contains 18 entries:
[0-9a-f ]+R_PPC_TPREL16 +0+30 +le0 \+ 0
[0-9a-f ]+R_PPC_TPREL16_HA +0+34 +le1 \+ 0
[0-9a-f ]+R_PPC_TPREL16_LO +0+34 +le1 \+ 0
-[0-9a-f ]+R_PPC_TPREL16 +0+103d0 +\.tdata \+ 103e4
-[0-9a-f ]+R_PPC_TPREL16_HA +0+103d0 +\.tdata \+ 103e8
-[0-9a-f ]+R_PPC_TPREL16_LO +0+103d0 +\.tdata \+ 103e8
+[0-9a-f ]+R_PPC_TPREL16 +0+10430 +\.tdata \+ 10444
+[0-9a-f ]+R_PPC_TPREL16_HA +0+10430 +\.tdata \+ 10448
+[0-9a-f ]+R_PPC_TPREL16_LO +0+10430 +\.tdata \+ 10448
[0-9a-f ]+R_PPC_DTPMOD32 +0
[0-9a-f ]+R_PPC_DTPREL32 +0
[0-9a-f ]+R_PPC_DTPMOD32 +0
@@ -84,7 +84,7 @@ Symbol table '\.dynsym' contains [0-9]+ entries:
.* TLS +GLOBAL +DEFAULT +8 ld2
.* TLS +GLOBAL +DEFAULT +8 ld1
.* NOTYPE +GLOBAL +DEFAULT +11 __bss_start
-.* NOTYPE +GLOBAL +DEFAULT +10 _edata
+.* NOTYPE +GLOBAL +DEFAULT +11 _edata
.* NOTYPE +GLOBAL +DEFAULT +11 _end
.* TLS +GLOBAL +DEFAULT +8 gd0
.* TLS +GLOBAL +DEFAULT +8 ie0
@@ -113,6 +113,9 @@ Symbol table '\.symtab' contains [0-9]+ entries:
.* TLS +LOCAL +DEFAULT +7 le5
.* FILE +LOCAL +DEFAULT +ABS .*
.* OBJECT +LOCAL +DEFAULT +9 _DYNAMIC
+.* NOTYPE +LOCAL +DEFAULT +6 0+8000\.got2\.plt_pic32\.__tls_get_addr
+.* NOTYPE +LOCAL +DEFAULT +6 __glink_PLTresolve
+.* NOTYPE +LOCAL +DEFAULT +6 __glink
.* OBJECT +LOCAL +DEFAULT +10 _GLOBAL_OFFSET_TABLE_
.* TLS +GLOBAL +DEFAULT +UND gd
.* TLS +GLOBAL +DEFAULT +8 le0
@@ -125,7 +128,7 @@ Symbol table '\.symtab' contains [0-9]+ entries:
.* TLS +GLOBAL +DEFAULT +8 ld2
.* TLS +GLOBAL +DEFAULT +8 ld1
.* NOTYPE +GLOBAL +DEFAULT +11 __bss_start
-.* NOTYPE +GLOBAL +DEFAULT +10 _edata
+.* NOTYPE +GLOBAL +DEFAULT +11 _edata
.* NOTYPE +GLOBAL +DEFAULT +11 _end
.* TLS +GLOBAL +DEFAULT +8 gd0
.* TLS +GLOBAL +DEFAULT +8 ie0