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src bfd/ChangeLog bfd/cpu-i386.c bfd/cpu-k1om. ...
- From: hjl at sourceware dot org
- To: binutils-cvs at sourceware dot org
- Date: 9 Feb 2012 22:51:58 -0000
- Subject: src bfd/ChangeLog bfd/cpu-i386.c bfd/cpu-k1om. ...
CVSROOT: /cvs/src
Module name: src
Changes by: hjl@sourceware.org 2012-02-09 22:51:58
Modified files:
bfd : ChangeLog cpu-i386.c cpu-k1om.c cpu-l1om.c
ld/testsuite : ChangeLog
ld/testsuite/ld-i386: tlsnopic.dd tlspic.dd
Log message:
Don't use multi byte nop instructions for i386
bfd/
2012-02-09 H.J. Lu <hongjiu.lu@intel.com>
PR ld/13675
* cpu-i386.c (bfd_arch_i386_fill): Updated to support multi byte
nop instructions.
(bfd_arch_i386_short_nop_fill): New.
(bfd_arch_i386_long_nop_fill): Likewise.
Use bfd_arch_i386_short_nop_fill in 32bit bfd_arch_info
initializers. Use bfd_arch_i386_long_nop_fill on 64bit
bfd_arch_info initializers.
* cpu-k1om.c (bfd_arch_i386_fill): Renamed to ...
(bfd_arch_i386_short_nop_fill): This.
Update bfd_arch_info initializers.
* cpu-l1om.c: Likewise.
ld/testsuite/
2012-02-09 H.J. Lu <hongjiu.lu@intel.com>
PR ld/13675
* ld-i386/tlsnopic.dd: Update no-op padding.
* ld-i386/tlspic.dd: Likewise.
Patches:
http://sourceware.org/cgi-bin/cvsweb.cgi/src/bfd/ChangeLog.diff?cvsroot=src&r1=1.5601&r2=1.5602
http://sourceware.org/cgi-bin/cvsweb.cgi/src/bfd/cpu-i386.c.diff?cvsroot=src&r1=1.22&r2=1.23
http://sourceware.org/cgi-bin/cvsweb.cgi/src/bfd/cpu-k1om.c.diff?cvsroot=src&r1=1.2&r2=1.3
http://sourceware.org/cgi-bin/cvsweb.cgi/src/bfd/cpu-l1om.c.diff?cvsroot=src&r1=1.3&r2=1.4
http://sourceware.org/cgi-bin/cvsweb.cgi/src/ld/testsuite/ChangeLog.diff?cvsroot=src&r1=1.1488&r2=1.1489
http://sourceware.org/cgi-bin/cvsweb.cgi/src/ld/testsuite/ld-i386/tlsnopic.dd.diff?cvsroot=src&r1=1.6&r2=1.7
http://sourceware.org/cgi-bin/cvsweb.cgi/src/ld/testsuite/ld-i386/tlspic.dd.diff?cvsroot=src&r1=1.6&r2=1.7