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src bfd/ChangeLog bfd/archures.c bfd/bfd-in2.h ...


CVSROOT:	/cvs/src
Module name:	src
Changes by:	pinskia@sourceware.org	2011-12-08 20:47:27

Modified files:
	bfd            : ChangeLog archures.c bfd-in2.h cpu-mips.c 
	                 elfxx-mips.c 
	gas            : ChangeLog 
	gas/config     : tc-mips.c 
	gas/doc        : c-mips.texi 
	gas/testsuite  : ChangeLog 
	gas/testsuite/gas/mips: mips.exp 
	include/opcode : ChangeLog mips.h 
	opcodes        : ChangeLog mips-dis.c mips-opc.c 
Added files:
	gas/testsuite/gas/mips: octeon2.d octeon2.s 

Log message:
	bfd:
	2011-12-08  Andrew Pinski  <apinski@cavium.com>
	Adam Nemet  <anemet@caviumnetworks.com>
	
	* archures.c (bfd_mach_mips_octeon2): New macro
	* bfd-in2.h: Regenerate.
	* cpu-mips.c (I_mipsocteon2): New enum value.
	(arch_info_struct): Add bfd_mach_mips_octeon2.
	* elfxx-mips.c (_bfd_elf_mips_mach): Support E_MIPS_MACH_OCTEON2.
	(mips_set_isa_flags): Add bfd_mach_mips_octeon2.
	(mips_mach_extensions): Add bfd_mach_mips_octeon2.
	
	gas:
	2011-12-08  Andrew Pinski  <apinski@cavium.com>
	Adam Nemet  <anemet@caviumnetworks.com>
	
	* tc-mips.c (CPU_IS_OCTEON): Add Octeon2.
	(mips_cpu_info_table): Add Octeon2.
	* doc/c-mips.texi: Document octeon2 as an acceptable value for -march=.
	
	gas/testsuite:
	2011-12-08  Andrew Pinski  <apinski@cavium.com>
	Adam Nemet  <anemet@caviumnetworks.com>
	
	* gas/mips/mips.exp: Add Octeon2 for an architecture.
	Run octeon2 test.
	* gas/mips/octeon2.d: New file.
	* gas/mips/octeon2.s: New file.
	
	include/opcode:
	2011-12-08  Andrew Pinski  <apinski@cavium.com>
	Adam Nemet  <anemet@caviumnetworks.com>
	
	* mips.h (INSN_CHIP_MASK): Update according to INSN_OCTEON2.
	(INSN_OCTEON2): New macro.
	(CPU_OCTEON2): New macro.
	(OPCODE_IS_MEMBER): Add Octeon2.
	
	opcodes:
	2011-12-08  Andrew Pinski  <apinski@cavium.com>
	Adam Nemet  <anemet@caviumnetworks.com>
	
	* mips-dis.c (mips_arch_choices): Add Octeon2.
	For "octeon+", just include OcteonP for the insn.
	* mips-opc.c (IOCT): Include Octeon2.
	(IOCTP): Include Octeon2.
	(IOCT2): New macro.
	(mips_builtin_opcodes): Add "laa", "laad", "lac", "lacd", "lad",
	"ladd", "lai", "laid", "las", "lasd", "law", "lawd".
	Move "lbux", "ldx", "lhx", "lwx", and "lwux" up to where the standard
	loads are, and add IOCT2 to them.
	Add "lbx" and "lhux".
	Add "qmac.00", "qmac.01", "qmac.02", "qmac.03", "qmacs.00",
	"qmacs.01", "qmacs.01", "qmacs.02" and "qmacs.03".
	Add "zcb" and "zcbt".

Patches:
http://sourceware.org/cgi-bin/cvsweb.cgi/src/bfd/ChangeLog.diff?cvsroot=src&r1=1.5534&r2=1.5535
http://sourceware.org/cgi-bin/cvsweb.cgi/src/bfd/archures.c.diff?cvsroot=src&r1=1.161&r2=1.162
http://sourceware.org/cgi-bin/cvsweb.cgi/src/bfd/bfd-in2.h.diff?cvsroot=src&r1=1.553&r2=1.554
http://sourceware.org/cgi-bin/cvsweb.cgi/src/bfd/cpu-mips.c.diff?cvsroot=src&r1=1.37&r2=1.38
http://sourceware.org/cgi-bin/cvsweb.cgi/src/bfd/elfxx-mips.c.diff?cvsroot=src&r1=1.296&r2=1.297
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/ChangeLog.diff?cvsroot=src&r1=1.4628&r2=1.4629
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/config/tc-mips.c.diff?cvsroot=src&r1=1.499&r2=1.500
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/doc/c-mips.texi.diff?cvsroot=src&r1=1.63&r2=1.64
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/ChangeLog.diff?cvsroot=src&r1=1.1978&r2=1.1979
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/mips/octeon2.d.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/mips/octeon2.s.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/mips/mips.exp.diff?cvsroot=src&r1=1.196&r2=1.197
http://sourceware.org/cgi-bin/cvsweb.cgi/src/include/opcode/ChangeLog.diff?cvsroot=src&r1=1.454&r2=1.455
http://sourceware.org/cgi-bin/cvsweb.cgi/src/include/opcode/mips.h.diff?cvsroot=src&r1=1.81&r2=1.82
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/ChangeLog.diff?cvsroot=src&r1=1.1777&r2=1.1778
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/mips-dis.c.diff?cvsroot=src&r1=1.88&r2=1.89
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/mips-opc.c.diff?cvsroot=src&r1=1.89&r2=1.90


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