src bfd/ChangeLog bfd/archures.c bfd/cpu-avr.c ...

[eweddington at sourceware dot org]

CVSROOT:	/cvs/src
Module name:	src
Changes by:	eweddington@sourceware.org	2011-03-22 18:10:48

Modified files:
	bfd            : ChangeLog archures.c cpu-avr.c elf32-avr.c 
	gas            : ChangeLog 
	gas/config     : tc-avr.c 
	gas/doc        : c-avr.texi 
	include/elf    : avr.h 
	include/opcode : ChangeLog avr.h 
	ld             : ChangeLog Makefile.am configure.tgt 
	ld/emultempl   : avrelf.em 
	opcodes        : ChangeLog avr-dis.c 
Added files:
	ld/emulparams  : avrxmega1.sh avrxmega2.sh avrxmega3.sh 
	                 avrxmega4.sh avrxmega5.sh avrxmega6.sh 
	                 avrxmega7.sh 

Log message:
	/bfd:
	2011-03-22  Eric B. Weddington  <eric.weddington@atmel.com>
	
	* archures.c: Add AVR XMEGA architecture information.
	* cpu-avr.c (arch_info_struct): Likewise.
	* elf32-avr.c (bfd_elf_avr_final_write_processing): Likewise.
	(elf32_avr_object_p): Likewise.
	
	/gas:
	2011-03-22  Eric B. Weddington  <eric.weddington@atmel.com>
	
	* config/tc-avr.c (struct avr_opcodes_s): Add opcode field.
	(AVR_INSN): Change definition to match.
	(avr_opcodes): Likewise, change to match.
	(mcu_types): Add XMEGA architecture names and new XMEGA device names.
	(md_show_usage): Add XMEGA architecture names.
	(avr_operand): Add 'E' constraint for DES instruction of XMEGA devices.
	Add support for SPM Z+ instruction.
	* doc/c-avr.texi: Add documentation for XMEGA architectures and
	devices.
	
	/include/opcode:
	2011-03-22  Eric B. Weddington  <eric.weddington@atmel.com>
	
	* avr.h (AVR_ISA_SPMX,AVR_ISA_DES,AVR_ISA_M256,AVR_ISA_XMEGA):
	New instruction set flags.
	(AVR_INSN): Add new instructions for SPM Z+, DES for XMEGA.
	
	/ld:
	2011-03-22  Eric B. Weddington  <eric.weddington@atmel.com>
	
	* Makefile.am (ALL_EMULATION_SOURCES): Add AVR XMEGA architectures.
	(eavrxmega?.c): Likewise.
	* configure.tgt (targ_extra_emuls): Likewise.
	* emulparams/avrxmega1.sh: New file.
	* emulparams/avrxmega2.sh: Likewise.
	* emulparams/avrxmega3.sh: Likewise.
	* emulparams/avrxmega4.sh: Likewise.
	* emulparams/avrxmega5.sh: Likewise.
	* emulparams/avrxmega6.sh: Likewise.
	* emulparams/avrxmega7.sh: Likewise.
	* emultempl/avrelf.em (avr_elf_${EMULATION_NAME}_before_allocation):
	Add avrxmega6, avrxmega7 to list of architectures for no stubs.
	
	/opcodes:
	2011-03-22  Eric B. Weddington  <eric.weddington@atmel.com>
	
	* avr-dis.c (avr_operand): Add opcode_str parameter. Check for
	post-increment to support LPM Z+ instruction. Add support for 'E'
	constraint for DES instruction.
	(print_insn_avr): Adjust calls to avr_operand. Rename variable.

Patches:
http://sourceware.org/cgi-bin/cvsweb.cgi/src/bfd/ChangeLog.diff?cvsroot=src&r1=1.5273&r2=1.5274
http://sourceware.org/cgi-bin/cvsweb.cgi/src/bfd/archures.c.diff?cvsroot=src&r1=1.152&r2=1.153
http://sourceware.org/cgi-bin/cvsweb.cgi/src/bfd/cpu-avr.c.diff?cvsroot=src&r1=1.15&r2=1.16
http://sourceware.org/cgi-bin/cvsweb.cgi/src/bfd/elf32-avr.c.diff?cvsroot=src&r1=1.49&r2=1.50
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/ChangeLog.diff?cvsroot=src&r1=1.4438&r2=1.4439
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/config/tc-avr.c.diff?cvsroot=src&r1=1.75&r2=1.76
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/doc/c-avr.texi.diff?cvsroot=src&r1=1.30&r2=1.31
http://sourceware.org/cgi-bin/cvsweb.cgi/src/include/elf/avr.h.diff?cvsroot=src&r1=1.11&r2=1.12
http://sourceware.org/cgi-bin/cvsweb.cgi/src/include/opcode/ChangeLog.diff?cvsroot=src&r1=1.434&r2=1.435
http://sourceware.org/cgi-bin/cvsweb.cgi/src/include/opcode/avr.h.diff?cvsroot=src&r1=1.15&r2=1.16
http://sourceware.org/cgi-bin/cvsweb.cgi/src/ld/ChangeLog.diff?cvsroot=src&r1=1.2297&r2=1.2298
http://sourceware.org/cgi-bin/cvsweb.cgi/src/ld/Makefile.am.diff?cvsroot=src&r1=1.299&r2=1.300
http://sourceware.org/cgi-bin/cvsweb.cgi/src/ld/configure.tgt.diff?cvsroot=src&r1=1.239&r2=1.240
http://sourceware.org/cgi-bin/cvsweb.cgi/src/ld/emulparams/avrxmega1.sh.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/ld/emulparams/avrxmega2.sh.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/ld/emulparams/avrxmega3.sh.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/ld/emulparams/avrxmega4.sh.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/ld/emulparams/avrxmega5.sh.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/ld/emulparams/avrxmega6.sh.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/ld/emulparams/avrxmega7.sh.diff?cvsroot=src&r1=NONE&r2=1.1
http://sourceware.org/cgi-bin/cvsweb.cgi/src/ld/emultempl/avrelf.em.diff?cvsroot=src&r1=1.10&r2=1.11
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/ChangeLog.diff?cvsroot=src&r1=1.1710&r2=1.1711
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/avr-dis.c.diff?cvsroot=src&r1=1.22&r2=1.23