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src gas/ChangeLog gas/config/tc-arm.c gas/test ...
- From: pbrook at sourceware dot org
- To: binutils-cvs at sourceware dot org
- Date: 24 Mar 2007 01:29:01 -0000
- Subject: src gas/ChangeLog gas/config/tc-arm.c gas/test ...
CVSROOT: /cvs/src
Module name: src
Changes by: pbrook@sourceware.org 2007-03-24 01:29:01
Modified files:
gas : ChangeLog
gas/config : tc-arm.c
gas/testsuite : ChangeLog
gas/testsuite/gas/arm: archv6.d archv6.s thumb32.d thumb32.s
opcodes : ChangeLog arm-dis.c
Log message:
2007-03-24 Paul Brook <paul@codesourcery.com>
Mark Shinwell <shinwell@codesourcery.com>
gas/
* config/tc-arm.c (operand_parse_code): Add OP_oRRw.
(parse_operands): Don't expect comma if first operand missing.
Handle OP_oRRw.
(do_srs): Encode register number, checking it is r13. Update comment.
(insns): Update SRS entries to take a register.
gas/testsuite/
* gas/arm/archv6.s: Add new SRS tests.
* gas/arm/archv6.d: Update expected output.
* gas/arm/thumb32.s: Add new SRS tests.
* gas/arm/thumb32.d: Update expected output.
* gas/arm/srs-t2.d: New.
* gas/arm/srs-t2.l: New.
* gas/arm/srs-t2.s: New.
* gas/arm/srs-arm.d: New.
* gas/arm/srs-arm.l: New.
* gas/arm/srs-arm.s: New.
opcodes/
* arm-dis.c (arm_opcodes): Print SRS base register.
Patches:
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/ChangeLog.diff?cvsroot=src&r1=1.3186&r2=1.3187
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/config/tc-arm.c.diff?cvsroot=src&r1=1.316&r2=1.317
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/ChangeLog.diff?cvsroot=src&r1=1.1146&r2=1.1147
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/arm/archv6.d.diff?cvsroot=src&r1=1.4&r2=1.5
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/arm/archv6.s.diff?cvsroot=src&r1=1.2&r2=1.3
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/arm/thumb32.d.diff?cvsroot=src&r1=1.19&r2=1.20
http://sourceware.org/cgi-bin/cvsweb.cgi/src/gas/testsuite/gas/arm/thumb32.s.diff?cvsroot=src&r1=1.10&r2=1.11
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/ChangeLog.diff?cvsroot=src&r1=1.1041&r2=1.1042
http://sourceware.org/cgi-bin/cvsweb.cgi/src/opcodes/arm-dis.c.diff?cvsroot=src&r1=1.77&r2=1.78