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src/opcodes ChangeLog cgen-dis.in cgen-opc.c d ...
- From: brolley at sourceware dot org
- To: binutils-cvs at sources dot redhat dot com
- Date: 28 Oct 2005 19:49:22 -0000
- Subject: src/opcodes ChangeLog cgen-dis.in cgen-opc.c d ...
CVSROOT: /cvs/src
Module name: src
Changes by: brolley@sourceware.org 2005-10-28 19:49:22
Modified files:
opcodes : ChangeLog cgen-dis.in cgen-opc.c disassemble.c
fr30-desc.c fr30-desc.h fr30-dis.c fr30-opc.c
frv-desc.c frv-desc.h frv-dis.c frv-opc.c
frv-opc.h ip2k-desc.c ip2k-desc.h ip2k-dis.c
ip2k-opc.c m32c-asm.c m32c-desc.c m32c-desc.h
m32c-dis.c m32c-opc.c m32r-desc.c m32r-desc.h
m32r-dis.c m32r-opc.c ms1-desc.c ms1-desc.h
ms1-dis.c openrisc-desc.c openrisc-desc.h
openrisc-dis.c openrisc-opc.c xstormy16-desc.c
xstormy16-desc.h xstormy16-dis.c
xstormy16-opc.c
Log message:
2005-10-28 Dave Brolley <brolley@redhat.com>
* All CGEN-generated sources: Regenerate.
Contribute the following changes:
2005-09-19 Dave Brolley <brolley@redhat.com>
* disassemble.c (disassemble_init_for_target): Add 'break' to case for
bfd_arch_tic4x. Use cgen_bitset_create and cgen_bitset_set for
bfd_arch_m32c case.
2005-02-16 Dave Brolley <brolley@redhat.com>
* cgen-dis.in: Rename CGEN_ISA_MASK to CGEN_BITSET. Rename
cgen_isa_mask_* to cgen_bitset_*.
* cgen-opc.c: Likewise.
2003-11-28 Richard Sandiford <rsandifo@redhat.com>
* cgen-dis.in (print_insn_@arch@): Fix comparison with cached isas.
* *-dis.c: Regenerate.
2003-06-05 DJ Delorie <dj@redhat.com>
* cgen-dis.in (print_insn_@arch@): Copy prev_isas, don't assign
it, as it may point to a reused buffer. Set prev_isas when we
change cpus.
2002-12-13 Dave Brolley <brolley@redhat.com>
* cgen-opc.c (cgen_isa_mask_create): New support function for
CGEN_ISA_MASK.
(cgen_isa_mask_init): Ditto.
(cgen_isa_mask_clear): Ditto.
(cgen_isa_mask_add): Ditto.
(cgen_isa_mask_set): Ditto.
(cgen_isa_supported): Ditto.
(cgen_isa_mask_compare): Ditto.
(cgen_isa_mask_intersection): Ditto.
(cgen_isa_mask_copy): Ditto.
(cgen_isa_mask_combine): Ditto.
* cgen-dis.in (libiberty.h): #include it.
(isas): Renamed from 'isa' and now (CGEN_ISA_MASK *).
(print_insn_@arch@): Use CGEN_ISA_MASK and support functions.
* Makefile.am (CGENDEPS): Add utils-cgen.scm and attrs.scm.
* Makefile.in: Regenerated.
Patches:
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/ChangeLog.diff?cvsroot=src&r1=1.862&r2=1.863
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/cgen-dis.in.diff?cvsroot=src&r1=1.21&r2=1.22
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/cgen-opc.c.diff?cvsroot=src&r1=1.15&r2=1.16
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/disassemble.c.diff?cvsroot=src&r1=1.58&r2=1.59
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/fr30-desc.c.diff?cvsroot=src&r1=1.21&r2=1.22
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/fr30-desc.h.diff?cvsroot=src&r1=1.15&r2=1.16
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/fr30-dis.c.diff?cvsroot=src&r1=1.20&r2=1.21
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/fr30-opc.c.diff?cvsroot=src&r1=1.14&r2=1.15
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/frv-desc.c.diff?cvsroot=src&r1=1.21&r2=1.22
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/frv-desc.h.diff?cvsroot=src&r1=1.13&r2=1.14
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/frv-dis.c.diff?cvsroot=src&r1=1.12&r2=1.13
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/frv-opc.c.diff?cvsroot=src&r1=1.18&r2=1.19
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/frv-opc.h.diff?cvsroot=src&r1=1.13&r2=1.14
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/ip2k-desc.c.diff?cvsroot=src&r1=1.8&r2=1.9
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/ip2k-desc.h.diff?cvsroot=src&r1=1.6&r2=1.7
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/ip2k-dis.c.diff?cvsroot=src&r1=1.9&r2=1.10
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/ip2k-opc.c.diff?cvsroot=src&r1=1.7&r2=1.8
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/m32c-asm.c.diff?cvsroot=src&r1=1.7&r2=1.8
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/m32c-desc.c.diff?cvsroot=src&r1=1.6&r2=1.7
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/m32c-desc.h.diff?cvsroot=src&r1=1.6&r2=1.7
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/m32c-dis.c.diff?cvsroot=src&r1=1.7&r2=1.8
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/m32c-opc.c.diff?cvsroot=src&r1=1.6&r2=1.7
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/m32r-desc.c.diff?cvsroot=src&r1=1.23&r2=1.24
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/m32r-desc.h.diff?cvsroot=src&r1=1.17&r2=1.18
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/m32r-dis.c.diff?cvsroot=src&r1=1.24&r2=1.25
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/m32r-opc.c.diff?cvsroot=src&r1=1.18&r2=1.19
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/ms1-desc.c.diff?cvsroot=src&r1=1.2&r2=1.3
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/ms1-desc.h.diff?cvsroot=src&r1=1.1&r2=1.2
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/ms1-dis.c.diff?cvsroot=src&r1=1.3&r2=1.4
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/openrisc-desc.c.diff?cvsroot=src&r1=1.15&r2=1.16
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/openrisc-desc.h.diff?cvsroot=src&r1=1.7&r2=1.8
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/openrisc-dis.c.diff?cvsroot=src&r1=1.13&r2=1.14
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/openrisc-opc.c.diff?cvsroot=src&r1=1.10&r2=1.11
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/xstormy16-desc.c.diff?cvsroot=src&r1=1.12&r2=1.13
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/xstormy16-desc.h.diff?cvsroot=src&r1=1.7&r2=1.8
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/xstormy16-dis.c.diff?cvsroot=src&r1=1.9&r2=1.10
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/xstormy16-opc.c.diff?cvsroot=src&r1=1.9&r2=1.10