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src cpu/ChangeLog cpu/m32c.cpu cpu/m32c.opc op ...
- From: dj at sourceware dot org
- To: binutils-cvs at sources dot redhat dot com
- Date: 26 Oct 2005 14:59:12 -0000
- Subject: src cpu/ChangeLog cpu/m32c.cpu cpu/m32c.opc op ...
CVSROOT: /cvs/src
Module name: src
Changes by: dj@sourceware.org 2005-10-26 14:59:12
Modified files:
cpu : ChangeLog m32c.cpu m32c.opc
opcodes : ChangeLog m32c-asm.c m32c-desc.c m32c-desc.h
m32c-dis.c m32c-ibld.c m32c-opc.c m32c-opc.h
Log message:
* m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
(mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
dsp8[sp] is signed.
(mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
(mov.BW:S r0,r1): Fix typo r1l->r1.
(tst): Allow :G suffix.
* m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
* m32c-asm.c: Regenerate.
* m32c-desc.c: Regenerate.
* m32c-desc.h: Regenerate.
* m32c-dis.c: Regenerate.
* m32c-ibld.c: Regenerate.
* m32c-opc.c: Regenerate.
* m32c-opc.h: Regenerate.
Patches:
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/cpu/ChangeLog.diff?cvsroot=src&r1=1.54&r2=1.55
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/cpu/m32c.cpu.diff?cvsroot=src&r1=1.5&r2=1.6
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/cpu/m32c.opc.diff?cvsroot=src&r1=1.5&r2=1.6
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/ChangeLog.diff?cvsroot=src&r1=1.860&r2=1.861
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/m32c-asm.c.diff?cvsroot=src&r1=1.5&r2=1.6
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/m32c-desc.c.diff?cvsroot=src&r1=1.4&r2=1.5
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/m32c-desc.h.diff?cvsroot=src&r1=1.4&r2=1.5
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/m32c-dis.c.diff?cvsroot=src&r1=1.5&r2=1.6
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/m32c-ibld.c.diff?cvsroot=src&r1=1.4&r2=1.5
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/m32c-opc.c.diff?cvsroot=src&r1=1.4&r2=1.5
http://sources.redhat.com/cgi-bin/cvsweb.cgi/src/opcodes/m32c-opc.h.diff?cvsroot=src&r1=1.4&r2=1.5