I960 Architecture Documentation
DISCLAIMER: This documentation is derived from the cgen cpu description
of this architecture, and does not represent official documentation
of the chip maker.
In cgen-parlance, an architecture consists of machines and models.
A `machine' is the specification of a variant of the architecture,
and a `model' is the implementation of that specification.
Typically there is a one-to-one correspondance between machine and model.
The distinction allows for separation of what application programs see
(the machine), and how to tune for the chip (what the compiler sees).
A "cpu family" is a cgen concoction to help organize the generated code.
Chip variants that are quite dissimilar can be treated separately by the
generated code even though they're both members of the same architecture.
I960 Architecture
This section describes various things about the cgen description of
the I960 architecture. Familiarity with cgen cpu descriptions
is assumed.
Bit number orientation (arch.lsb0?): msb = 0
ISA description
-
i960 -
- default-insn-word-bitsize: 32
- default-insn-bitsize: 32
- base-insn-bitsize: 32
- decode-assist: 0 1 2 3 4 5 6 7
- decode-splits:
CPU Families
-
i960base - Intel 80960 cpu family
Machines:
-
i960:ca - I960 CA processor
Models:
-
i960CA - I960 CA processor
-
i960:ka_sa - I960 KA and SA processors
Models:
-
i960KA - I960 KA processor
Machine variants
i960:ca - I960 CA processor
-
bfd-name: i960:ca
-
isas: i960
i960:ka_sa - I960 KA and SA processors
-
bfd-name: i960:ka_sa
-
isas: i960
Model variants
i960CA - I960 CA processor
i960KA - I960 KA processor
Registers
h-cc - condition code
-
machines: base
-
bitsize: 32
h-gr - general registers
-
machines: base
-
bitsize: 32
-
array: [32]
names:
fp |
31 |
sp |
1 |
r0 |
0 |
r1 |
1 |
r2 |
2 |
r3 |
3 |
r4 |
4 |
r5 |
5 |
r6 |
6 |
r7 |
7 |
r8 |
8 |
r9 |
9 |
r10 |
10 |
r11 |
11 |
r12 |
12 |
r13 |
13 |
r14 |
14 |
r15 |
15 |
g0 |
16 |
g1 |
17 |
g2 |
18 |
g3 |
19 |
g4 |
20 |
g5 |
21 |
g6 |
22 |
g7 |
23 |
g8 |
24 |
g9 |
25 |
g10 |
26 |
g11 |
27 |
g12 |
28 |
g13 |
29 |
g14 |
30 |
g15 |
31 |
h-pc - program counter
-
machines: base
-
bitsize: 32
Assembler supplemental
This documentation was machine generated from the cgen cpu description
files for this architecture.
http://sources.redhat.com/cgen/